xref: /openbmc/qemu/hw/audio/es1370.c (revision 856a6fe4)
1 /*
2  * QEMU ES1370 emulation
3  *
4  * Copyright (c) 2005 Vassili Karpov (malc)
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #define DEBUG_ES1370 0
26 #define VERBOSE_ES1370 0
27 
28 #include "qemu/osdep.h"
29 #include "hw/audio/soundhw.h"
30 #include "audio/audio.h"
31 #include "hw/pci/pci_device.h"
32 #include "migration/vmstate.h"
33 #include "qemu/cutils.h"
34 #include "qemu/module.h"
35 #include "sysemu/dma.h"
36 #include "qom/object.h"
37 #include "trace.h"
38 
39 /* Missing stuff:
40    SCTRL_P[12](END|ST)INC
41    SCTRL_P1SCTRLD
42    SCTRL_P2DACSEN
43    CTRL_DAC_SYNC
44    MIDI
45    non looped mode
46    surely more
47 */
48 
49 /*
50   Following macros and samplerate array were copied verbatim from
51   Linux kernel 2.4.30: drivers/sound/es1370.c
52 
53   Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
54 */
55 
56 /* Start blatant GPL violation */
57 
58 #define ES1370_REG_CONTROL        0x00
59 #define ES1370_REG_STATUS         0x04
60 #define ES1370_REG_UART_DATA      0x08
61 #define ES1370_REG_UART_STATUS    0x09
62 #define ES1370_REG_UART_CONTROL   0x09
63 #define ES1370_REG_UART_TEST      0x0a
64 #define ES1370_REG_MEMPAGE        0x0c
65 #define ES1370_REG_CODEC          0x10
66 #define ES1370_REG_SERIAL_CONTROL 0x20
67 #define ES1370_REG_DAC1_SCOUNT    0x24
68 #define ES1370_REG_DAC2_SCOUNT    0x28
69 #define ES1370_REG_ADC_SCOUNT     0x2c
70 
71 #define ES1370_REG_DAC1_FRAMEADR    0xc30
72 #define ES1370_REG_DAC1_FRAMECNT    0xc34
73 #define ES1370_REG_DAC2_FRAMEADR    0xc38
74 #define ES1370_REG_DAC2_FRAMECNT    0xc3c
75 #define ES1370_REG_ADC_FRAMEADR     0xd30
76 #define ES1370_REG_ADC_FRAMECNT     0xd34
77 #define ES1370_REG_PHANTOM_FRAMEADR 0xd38
78 #define ES1370_REG_PHANTOM_FRAMECNT 0xd3c
79 
80 static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 };
81 
82 #define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2)
83 #define DAC2_DIVTOSR(x) (1411200/((x)+2))
84 
85 #define CTRL_ADC_STOP   0x80000000  /* 1 = ADC stopped */
86 #define CTRL_XCTL1      0x40000000  /* electret mic bias */
87 #define CTRL_OPEN       0x20000000  /* no function, can be read and written */
88 #define CTRL_PCLKDIV    0x1fff0000  /* ADC/DAC2 clock divider */
89 #define CTRL_SH_PCLKDIV 16
90 #define CTRL_MSFMTSEL   0x00008000  /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
91 #define CTRL_M_SBB      0x00004000  /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */
92 #define CTRL_WTSRSEL    0x00003000  /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */
93 #define CTRL_SH_WTSRSEL 12
94 #define CTRL_DAC_SYNC   0x00000800  /* 1 = DAC2 runs off DAC1 clock */
95 #define CTRL_CCB_INTRM  0x00000400  /* 1 = CCB "voice" ints enabled */
96 #define CTRL_M_CB       0x00000200  /* recording source: 0 = ADC, 1 = MPEG */
97 #define CTRL_XCTL0      0x00000100  /* 0 = Line in, 1 = Line out */
98 #define CTRL_BREQ       0x00000080  /* 1 = test mode (internal mem test) */
99 #define CTRL_DAC1_EN    0x00000040  /* enable DAC1 */
100 #define CTRL_DAC2_EN    0x00000020  /* enable DAC2 */
101 #define CTRL_ADC_EN     0x00000010  /* enable ADC */
102 #define CTRL_UART_EN    0x00000008  /* enable MIDI uart */
103 #define CTRL_JYSTK_EN   0x00000004  /* enable Joystick port (presumably at address 0x200) */
104 #define CTRL_CDC_EN     0x00000002  /* enable serial (CODEC) interface */
105 #define CTRL_SERR_DIS   0x00000001  /* 1 = disable PCI SERR signal */
106 
107 #define STAT_INTR       0x80000000  /* wired or of all interrupt bits */
108 #define STAT_CSTAT      0x00000400  /* 1 = codec busy or codec write in progress */
109 #define STAT_CBUSY      0x00000200  /* 1 = codec busy */
110 #define STAT_CWRIP      0x00000100  /* 1 = codec write in progress */
111 #define STAT_VC         0x00000060  /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
112 #define STAT_SH_VC      5
113 #define STAT_MCCB       0x00000010  /* CCB int pending */
114 #define STAT_UART       0x00000008  /* UART int pending */
115 #define STAT_DAC1       0x00000004  /* DAC1 int pending */
116 #define STAT_DAC2       0x00000002  /* DAC2 int pending */
117 #define STAT_ADC        0x00000001  /* ADC int pending */
118 
119 #define USTAT_RXINT     0x80        /* UART rx int pending */
120 #define USTAT_TXINT     0x04        /* UART tx int pending */
121 #define USTAT_TXRDY     0x02        /* UART tx ready */
122 #define USTAT_RXRDY     0x01        /* UART rx ready */
123 
124 #define UCTRL_RXINTEN   0x80        /* 1 = enable RX ints */
125 #define UCTRL_TXINTEN   0x60        /* TX int enable field mask */
126 #define UCTRL_ENA_TXINT 0x20        /* enable TX int */
127 #define UCTRL_CNTRL     0x03        /* control field */
128 #define UCTRL_CNTRL_SWR 0x03        /* software reset command */
129 
130 #define SCTRL_P2ENDINC    0x00380000  /*  */
131 #define SCTRL_SH_P2ENDINC 19
132 #define SCTRL_P2STINC     0x00070000  /*  */
133 #define SCTRL_SH_P2STINC  16
134 #define SCTRL_R1LOOPSEL   0x00008000  /* 0 = loop mode */
135 #define SCTRL_P2LOOPSEL   0x00004000  /* 0 = loop mode */
136 #define SCTRL_P1LOOPSEL   0x00002000  /* 0 = loop mode */
137 #define SCTRL_P2PAUSE     0x00001000  /* 1 = pause mode */
138 #define SCTRL_P1PAUSE     0x00000800  /* 1 = pause mode */
139 #define SCTRL_R1INTEN     0x00000400  /* enable interrupt */
140 #define SCTRL_P2INTEN     0x00000200  /* enable interrupt */
141 #define SCTRL_P1INTEN     0x00000100  /* enable interrupt */
142 #define SCTRL_P1SCTRLD    0x00000080  /* reload sample count register for DAC1 */
143 #define SCTRL_P2DACSEN    0x00000040  /* 1 = DAC2 play back last sample when disabled */
144 #define SCTRL_R1SEB       0x00000020  /* 1 = 16bit */
145 #define SCTRL_R1SMB       0x00000010  /* 1 = stereo */
146 #define SCTRL_R1FMT       0x00000030  /* format mask */
147 #define SCTRL_SH_R1FMT    4
148 #define SCTRL_P2SEB       0x00000008  /* 1 = 16bit */
149 #define SCTRL_P2SMB       0x00000004  /* 1 = stereo */
150 #define SCTRL_P2FMT       0x0000000c  /* format mask */
151 #define SCTRL_SH_P2FMT    2
152 #define SCTRL_P1SEB       0x00000002  /* 1 = 16bit */
153 #define SCTRL_P1SMB       0x00000001  /* 1 = stereo */
154 #define SCTRL_P1FMT       0x00000003  /* format mask */
155 #define SCTRL_SH_P1FMT    0
156 
157 /* End blatant GPL violation */
158 
159 #define NB_CHANNELS 3
160 #define DAC1_CHANNEL 0
161 #define DAC2_CHANNEL 1
162 #define ADC_CHANNEL 2
163 
164 static void es1370_dac1_callback (void *opaque, int free);
165 static void es1370_dac2_callback (void *opaque, int free);
166 static void es1370_adc_callback (void *opaque, int avail);
167 
print_ctl(uint32_t val)168 static void print_ctl(uint32_t val)
169 {
170     if (DEBUG_ES1370) {
171         char buf[1024];
172 
173         buf[0] = '\0';
174 #define a(n) if (val & CTRL_##n) pstrcat(buf, sizeof(buf), " "#n)
175         a(ADC_STOP);
176         a(XCTL1);
177         a(OPEN);
178         a(MSFMTSEL);
179         a(M_SBB);
180         a(DAC_SYNC);
181         a(CCB_INTRM);
182         a(M_CB);
183         a(XCTL0);
184         a(BREQ);
185         a(DAC1_EN);
186         a(DAC2_EN);
187         a(ADC_EN);
188         a(UART_EN);
189         a(JYSTK_EN);
190         a(CDC_EN);
191         a(SERR_DIS);
192 #undef a
193         AUD_log("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n",
194                 (val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV,
195                 DAC2_DIVTOSR((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV),
196                 dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL],
197                 buf);
198     }
199 }
200 
print_sctl(uint32_t val)201 static void print_sctl(uint32_t val)
202 {
203     if (DEBUG_ES1370) {
204         static const char *fmt_names[] = {"8M", "8S", "16M", "16S"};
205         char buf[1024];
206 
207         buf[0] = '\0';
208 
209 #define a(n) if (val & SCTRL_##n) pstrcat(buf, sizeof(buf), " "#n)
210 #define b(n) if (!(val & SCTRL_##n)) pstrcat(buf, sizeof(buf), " "#n)
211         b(R1LOOPSEL);
212         b(P2LOOPSEL);
213         b(P1LOOPSEL);
214         a(P2PAUSE);
215         a(P1PAUSE);
216         a(R1INTEN);
217         a(P2INTEN);
218         a(P1INTEN);
219         a(P1SCTRLD);
220         a(P2DACSEN);
221         if (buf[0]) {
222             pstrcat(buf, sizeof(buf), "\n        ");
223         } else {
224             buf[0] = ' ';
225             buf[1] = '\0';
226         }
227 #undef b
228 #undef a
229         AUD_log("es1370",
230                 "%s p2_end_inc %d, p2_st_inc %d,"
231                 " r1_fmt %s, p2_fmt %s, p1_fmt %s\n",
232                 buf,
233                 (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC,
234                 (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC,
235                 fmt_names[(val >> SCTRL_SH_R1FMT) & 3],
236                 fmt_names[(val >> SCTRL_SH_P2FMT) & 3],
237                 fmt_names[(val >> SCTRL_SH_P1FMT) & 3]);
238     }
239 }
240 
241 #define lwarn(...) \
242 do { \
243     if (VERBOSE_ES1370) { \
244         AUD_log("es1370: warning", __VA_ARGS__); \
245     } \
246 } while (0)
247 
248 #define TYPE_ES1370 "ES1370"
249 OBJECT_DECLARE_SIMPLE_TYPE(ES1370State, ES1370)
250 
251 struct chan {
252     uint32_t shift;
253     uint32_t leftover;
254     uint32_t scount;
255     uint32_t frame_addr;
256     uint32_t frame_cnt;
257 };
258 
259 struct ES1370State {
260     PCIDevice dev;
261     QEMUSoundCard card;
262     MemoryRegion io;
263     struct chan chan[NB_CHANNELS];
264     SWVoiceOut *dac_voice[2];
265     SWVoiceIn *adc_voice;
266 
267     uint32_t ctl;
268     uint32_t status;
269     uint32_t mempage;
270     uint32_t codec;
271     uint32_t sctl;
272 };
273 
274 struct chan_bits {
275     uint32_t ctl_en;
276     uint32_t stat_int;
277     uint32_t sctl_pause;
278     uint32_t sctl_inten;
279     uint32_t sctl_fmt;
280     uint32_t sctl_sh_fmt;
281     uint32_t sctl_loopsel;
282     void (*calc_freq) (ES1370State *s, uint32_t ctl,
283                        uint32_t *old_freq, uint32_t *new_freq);
284 };
285 
286 static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
287                                    uint32_t *old_freq, uint32_t *new_freq);
288 static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl,
289                                            uint32_t *old_freq,
290                                            uint32_t *new_freq);
291 
292 static const struct chan_bits es1370_chan_bits[] = {
293     {CTRL_DAC1_EN, STAT_DAC1, SCTRL_P1PAUSE, SCTRL_P1INTEN,
294      SCTRL_P1FMT, SCTRL_SH_P1FMT, SCTRL_P1LOOPSEL,
295      es1370_dac1_calc_freq},
296 
297     {CTRL_DAC2_EN, STAT_DAC2, SCTRL_P2PAUSE, SCTRL_P2INTEN,
298      SCTRL_P2FMT, SCTRL_SH_P2FMT, SCTRL_P2LOOPSEL,
299      es1370_dac2_and_adc_calc_freq},
300 
301     {CTRL_ADC_EN, STAT_ADC, 0, SCTRL_R1INTEN,
302      SCTRL_R1FMT, SCTRL_SH_R1FMT, SCTRL_R1LOOPSEL,
303      es1370_dac2_and_adc_calc_freq}
304 };
305 
es1370_update_status(ES1370State * s,uint32_t new_status)306 static void es1370_update_status (ES1370State *s, uint32_t new_status)
307 {
308     uint32_t level = new_status & (STAT_DAC1 | STAT_DAC2 | STAT_ADC);
309 
310     if (level) {
311         s->status = new_status | STAT_INTR;
312     } else {
313         s->status = new_status & ~STAT_INTR;
314     }
315     pci_set_irq(&s->dev, !!level);
316 }
317 
es1370_reset(ES1370State * s)318 static void es1370_reset (ES1370State *s)
319 {
320     size_t i;
321 
322     s->ctl = 1;
323     s->status = 0x60;
324     s->mempage = 0;
325     s->codec = 0;
326     s->sctl = 0;
327 
328     for (i = 0; i < NB_CHANNELS; ++i) {
329         struct chan *d = &s->chan[i];
330         d->scount = 0;
331         d->leftover = 0;
332         if (i == ADC_CHANNEL) {
333             AUD_close_in (&s->card, s->adc_voice);
334             s->adc_voice = NULL;
335         } else {
336             AUD_close_out (&s->card, s->dac_voice[i]);
337             s->dac_voice[i] = NULL;
338         }
339     }
340     pci_irq_deassert(&s->dev);
341 }
342 
es1370_maybe_lower_irq(ES1370State * s,uint32_t sctl)343 static void es1370_maybe_lower_irq (ES1370State *s, uint32_t sctl)
344 {
345     uint32_t new_status = s->status;
346 
347     if (!(sctl & SCTRL_P1INTEN) && (s->sctl & SCTRL_P1INTEN)) {
348         new_status &= ~STAT_DAC1;
349     }
350 
351     if (!(sctl & SCTRL_P2INTEN) && (s->sctl & SCTRL_P2INTEN)) {
352         new_status &= ~STAT_DAC2;
353     }
354 
355     if (!(sctl & SCTRL_R1INTEN) && (s->sctl & SCTRL_R1INTEN)) {
356         new_status &= ~STAT_ADC;
357     }
358 
359     if (new_status != s->status) {
360         es1370_update_status (s, new_status);
361     }
362 }
363 
es1370_dac1_calc_freq(ES1370State * s,uint32_t ctl,uint32_t * old_freq,uint32_t * new_freq)364 static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
365                                    uint32_t *old_freq, uint32_t *new_freq)
366 
367 {
368     *old_freq = dac1_samplerate[(s->ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
369     *new_freq = dac1_samplerate[(ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
370 }
371 
es1370_dac2_and_adc_calc_freq(ES1370State * s,uint32_t ctl,uint32_t * old_freq,uint32_t * new_freq)372 static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl,
373                                            uint32_t *old_freq,
374                                            uint32_t *new_freq)
375 
376 {
377     uint32_t old_pclkdiv, new_pclkdiv;
378 
379     new_pclkdiv = (ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV;
380     old_pclkdiv = (s->ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV;
381     *new_freq = DAC2_DIVTOSR (new_pclkdiv);
382     *old_freq = DAC2_DIVTOSR (old_pclkdiv);
383 }
384 
es1370_update_voices(ES1370State * s,uint32_t ctl,uint32_t sctl)385 static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl)
386 {
387     size_t i;
388     uint32_t old_freq, new_freq, old_fmt, new_fmt;
389 
390     for (i = 0; i < NB_CHANNELS; ++i) {
391         struct chan *d = &s->chan[i];
392         const struct chan_bits *b = &es1370_chan_bits[i];
393 
394         new_fmt = (sctl & b->sctl_fmt) >> b->sctl_sh_fmt;
395         old_fmt = (s->sctl & b->sctl_fmt) >> b->sctl_sh_fmt;
396 
397         b->calc_freq (s, ctl, &old_freq, &new_freq);
398 
399         if ((old_fmt != new_fmt) || (old_freq != new_freq)) {
400             d->shift = (new_fmt & 1) + (new_fmt >> 1);
401             trace_es1370_stream_format(i, new_freq,
402                 new_fmt & 2 ? "s16" : "u8", new_fmt & 1 ? "stereo" : "mono",
403                 d->shift);
404             if (new_freq) {
405                 struct audsettings as;
406 
407                 as.freq = new_freq;
408                 as.nchannels = 1 << (new_fmt & 1);
409                 as.fmt = (new_fmt & 2) ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8;
410                 as.endianness = 0;
411 
412                 if (i == ADC_CHANNEL) {
413                     s->adc_voice =
414                         AUD_open_in (
415                             &s->card,
416                             s->adc_voice,
417                             "es1370.adc",
418                             s,
419                             es1370_adc_callback,
420                             &as
421                             );
422                 } else {
423                     s->dac_voice[i] =
424                         AUD_open_out (
425                             &s->card,
426                             s->dac_voice[i],
427                             i ? "es1370.dac2" : "es1370.dac1",
428                             s,
429                             i ? es1370_dac2_callback : es1370_dac1_callback,
430                             &as
431                             );
432                 }
433             }
434         }
435 
436         if (((ctl ^ s->ctl) & b->ctl_en)
437             || ((sctl ^ s->sctl) & b->sctl_pause)) {
438             int on = (ctl & b->ctl_en) && !(sctl & b->sctl_pause);
439 
440             if (i == ADC_CHANNEL) {
441                 AUD_set_active_in (s->adc_voice, on);
442             } else {
443                 AUD_set_active_out (s->dac_voice[i], on);
444             }
445         }
446     }
447 
448     s->ctl = ctl;
449     s->sctl = sctl;
450 }
451 
es1370_fixup(ES1370State * s,uint32_t addr)452 static inline uint32_t es1370_fixup (ES1370State *s, uint32_t addr)
453 {
454     addr &= 0xff;
455     if (addr >= 0x30 && addr <= 0x3f) {
456         addr |= s->mempage << 8;
457     }
458     return addr;
459 }
460 
es1370_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)461 static void es1370_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
462 {
463     ES1370State *s = opaque;
464     struct chan *d = &s->chan[0];
465 
466     addr = es1370_fixup (s, addr);
467 
468     switch (addr) {
469     case ES1370_REG_CONTROL:
470         es1370_update_voices (s, val, s->sctl);
471         print_ctl (val);
472         break;
473 
474     case ES1370_REG_MEMPAGE:
475         s->mempage = val & 0xf;
476         break;
477 
478     case ES1370_REG_SERIAL_CONTROL:
479         es1370_maybe_lower_irq (s, val);
480         es1370_update_voices (s, s->ctl, val);
481         print_sctl (val);
482         break;
483 
484     case ES1370_REG_DAC1_SCOUNT:
485     case ES1370_REG_DAC2_SCOUNT:
486     case ES1370_REG_ADC_SCOUNT:
487         d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2;
488         d->scount = (val & 0xffff) << 16 | (val & 0xffff);
489         trace_es1370_sample_count_wr(d - &s->chan[0],
490             d->scount >> 16, d->scount & 0xffff);
491         break;
492 
493     case ES1370_REG_ADC_FRAMEADR:
494         d += 2;
495         goto frameadr;
496     case ES1370_REG_DAC1_FRAMEADR:
497     case ES1370_REG_DAC2_FRAMEADR:
498         d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3;
499     frameadr:
500         d->frame_addr = val;
501         trace_es1370_frame_address_wr(d - &s->chan[0], d->frame_addr);
502         break;
503 
504     case ES1370_REG_PHANTOM_FRAMECNT:
505         lwarn("writing to phantom frame count 0x%" PRIx64 "\n", val);
506         break;
507     case ES1370_REG_PHANTOM_FRAMEADR:
508         lwarn("writing to phantom frame address 0x%" PRIx64 "\n", val);
509         break;
510 
511     case ES1370_REG_ADC_FRAMECNT:
512         d += 2;
513         goto framecnt;
514     case ES1370_REG_DAC1_FRAMECNT:
515     case ES1370_REG_DAC2_FRAMECNT:
516         d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3;
517     framecnt:
518         d->frame_cnt = val;
519         d->leftover = 0;
520         trace_es1370_frame_count_wr(d - &s->chan[0],
521             d->frame_cnt >> 16, d->frame_cnt & 0xffff);
522         break;
523 
524     default:
525         lwarn("writel 0x%" PRIx64 " <- 0x%" PRIx64 "\n", addr, val);
526         break;
527     }
528 }
529 
es1370_read(void * opaque,hwaddr addr,unsigned size)530 static uint64_t es1370_read(void *opaque, hwaddr addr, unsigned size)
531 {
532     ES1370State *s = opaque;
533     uint32_t val;
534     struct chan *d = &s->chan[0];
535 
536     addr = es1370_fixup (s, addr);
537 
538     switch (addr) {
539     case ES1370_REG_CONTROL:
540         val = s->ctl;
541         break;
542     case ES1370_REG_STATUS:
543         val = s->status;
544         break;
545     case ES1370_REG_MEMPAGE:
546         val = s->mempage;
547         break;
548     case ES1370_REG_CODEC:
549         val = s->codec;
550         break;
551     case ES1370_REG_SERIAL_CONTROL:
552         val = s->sctl;
553         break;
554 
555     case ES1370_REG_DAC1_SCOUNT:
556     case ES1370_REG_DAC2_SCOUNT:
557     case ES1370_REG_ADC_SCOUNT:
558         d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2;
559         trace_es1370_sample_count_rd(d - &s->chan[0],
560             d->scount >> 16, d->scount & 0xffff);
561         val = d->scount;
562         break;
563 
564     case ES1370_REG_ADC_FRAMECNT:
565         d += 2;
566         goto framecnt;
567     case ES1370_REG_DAC1_FRAMECNT:
568     case ES1370_REG_DAC2_FRAMECNT:
569         d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3;
570     framecnt:
571         trace_es1370_frame_count_rd(d - &s->chan[0],
572             d->frame_cnt >> 16, d->frame_cnt & 0xffff);
573         val = d->frame_cnt;
574         break;
575 
576     case ES1370_REG_ADC_FRAMEADR:
577         d += 2;
578         goto frameadr;
579     case ES1370_REG_DAC1_FRAMEADR:
580     case ES1370_REG_DAC2_FRAMEADR:
581         d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3;
582     frameadr:
583         trace_es1370_frame_address_rd(d - &s->chan[0], d->frame_addr);
584         val = d->frame_addr;
585         break;
586 
587     case ES1370_REG_PHANTOM_FRAMECNT:
588         val = ~0U;
589         lwarn("reading from phantom frame count\n");
590         break;
591     case ES1370_REG_PHANTOM_FRAMEADR:
592         val = ~0U;
593         lwarn("reading from phantom frame address\n");
594         break;
595 
596     default:
597         val = ~0U;
598         lwarn("readl 0x%" PRIx64 " -> 0x%x\n", addr, val);
599         break;
600     }
601     return val;
602 }
603 
es1370_transfer_audio(ES1370State * s,struct chan * d,int loop_sel,int max,bool * irq)604 static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel,
605                                    int max, bool *irq)
606 {
607     uint8_t tmpbuf[4096];
608     size_t to_transfer;
609     uint32_t addr = d->frame_addr;
610     int sc = d->scount & 0xffff;
611     int csc = d->scount >> 16;
612     int csc_bytes = (csc + 1) << d->shift;
613     int cnt = d->frame_cnt >> 16;
614     int size = d->frame_cnt & 0xffff;
615     if (size < cnt) {
616         return;
617     }
618     int left = ((size - cnt + 1) << 2) + d->leftover;
619     int transferred = 0;
620     int index = d - &s->chan[0];
621 
622     to_transfer = MIN(max, MIN(left, csc_bytes));
623     addr += (cnt << 2) + d->leftover;
624 
625     if (index == ADC_CHANNEL) {
626         while (to_transfer > 0) {
627             int acquired, to_copy;
628 
629             to_copy = MIN(to_transfer, sizeof(tmpbuf));
630             acquired = AUD_read (s->adc_voice, tmpbuf, to_copy);
631             if (!acquired) {
632                 break;
633             }
634 
635             pci_dma_write (&s->dev, addr, tmpbuf, acquired);
636 
637             to_transfer -= acquired;
638             addr += acquired;
639             transferred += acquired;
640         }
641     } else {
642         SWVoiceOut *voice = s->dac_voice[index];
643 
644         while (to_transfer > 0) {
645             int copied, to_copy;
646 
647             to_copy = MIN(to_transfer, sizeof(tmpbuf));
648             pci_dma_read (&s->dev, addr, tmpbuf, to_copy);
649             copied = AUD_write (voice, tmpbuf, to_copy);
650             if (!copied) {
651                 break;
652             }
653             to_transfer -= copied;
654             addr += copied;
655             transferred += copied;
656         }
657     }
658 
659     if (csc_bytes == transferred) {
660         if (*irq) {
661             trace_es1370_lost_interrupt(index);
662         }
663         *irq = true;
664         d->scount = sc | (sc << 16);
665     } else {
666         *irq = false;
667         d->scount = sc | (((csc_bytes - transferred - 1) >> d->shift) << 16);
668     }
669 
670     cnt += (transferred + d->leftover) >> 2;
671 
672     if (s->sctl & loop_sel) {
673         /*
674          * loop_sel tells us which bit in the SCTL register to look at
675          * (either P1_LOOP_SEL, P2_LOOP_SEL or R1_LOOP_SEL). The sense
676          * of these bits is 0 for loop mode (set interrupt and keep recording
677          * when the sample count reaches zero) or 1 for stop mode (set
678          * interrupt and stop recording).
679          */
680         AUD_log ("es1370: warning", "non looping mode\n");
681     } else {
682         d->frame_cnt = size;
683 
684         if ((uint32_t) cnt <= d->frame_cnt) {
685             d->frame_cnt |= cnt << 16;
686         }
687     }
688 
689     d->leftover = (transferred + d->leftover) & 3;
690     trace_es1370_transfer_audio(index,
691         d->frame_cnt >> 16, d->frame_cnt & 0xffff,
692         d->scount >> 16, d->scount & 0xffff,
693         d->leftover, *irq);
694 }
695 
es1370_run_channel(ES1370State * s,size_t chan,int free_or_avail)696 static void es1370_run_channel (ES1370State *s, size_t chan, int free_or_avail)
697 {
698     uint32_t new_status = s->status;
699     int max_bytes;
700     bool irq;
701     struct chan *d = &s->chan[chan];
702     const struct chan_bits *b = &es1370_chan_bits[chan];
703 
704     if (!(s->ctl & b->ctl_en) || (s->sctl & b->sctl_pause)) {
705         return;
706     }
707 
708     max_bytes = free_or_avail;
709     max_bytes &= ~((1 << d->shift) - 1);
710     if (!max_bytes) {
711         return;
712     }
713 
714     irq = s->sctl & b->sctl_inten && s->status & b->stat_int;
715 
716     es1370_transfer_audio (s, d, b->sctl_loopsel, max_bytes, &irq);
717 
718     if (irq) {
719         if (s->sctl & b->sctl_inten) {
720             new_status |= b->stat_int;
721         }
722     }
723 
724     if (new_status != s->status) {
725         es1370_update_status (s, new_status);
726     }
727 }
728 
es1370_dac1_callback(void * opaque,int free)729 static void es1370_dac1_callback (void *opaque, int free)
730 {
731     ES1370State *s = opaque;
732 
733     es1370_run_channel (s, DAC1_CHANNEL, free);
734 }
735 
es1370_dac2_callback(void * opaque,int free)736 static void es1370_dac2_callback (void *opaque, int free)
737 {
738     ES1370State *s = opaque;
739 
740     es1370_run_channel (s, DAC2_CHANNEL, free);
741 }
742 
es1370_adc_callback(void * opaque,int avail)743 static void es1370_adc_callback (void *opaque, int avail)
744 {
745     ES1370State *s = opaque;
746 
747     es1370_run_channel (s, ADC_CHANNEL, avail);
748 }
749 
750 static const MemoryRegionOps es1370_io_ops = {
751     .read = es1370_read,
752     .write = es1370_write,
753     .valid = {
754         .min_access_size = 1,
755         .max_access_size = 4,
756     },
757     .impl = {
758         .min_access_size = 4,
759         .max_access_size = 4,
760     },
761     .endianness = DEVICE_LITTLE_ENDIAN,
762 };
763 
764 static const VMStateDescription vmstate_es1370_channel = {
765     .name = "es1370_channel",
766     .version_id = 2,
767     .minimum_version_id = 2,
768     .fields = (const VMStateField[]) {
769         VMSTATE_UINT32 (shift, struct chan),
770         VMSTATE_UINT32 (leftover, struct chan),
771         VMSTATE_UINT32 (scount, struct chan),
772         VMSTATE_UINT32 (frame_addr, struct chan),
773         VMSTATE_UINT32 (frame_cnt, struct chan),
774         VMSTATE_END_OF_LIST ()
775     }
776 };
777 
es1370_post_load(void * opaque,int version_id)778 static int es1370_post_load (void *opaque, int version_id)
779 {
780     uint32_t ctl, sctl;
781     ES1370State *s = opaque;
782     size_t i;
783 
784     for (i = 0; i < NB_CHANNELS; ++i) {
785         if (i == ADC_CHANNEL) {
786             if (s->adc_voice) {
787                 AUD_close_in (&s->card, s->adc_voice);
788                 s->adc_voice = NULL;
789             }
790         } else {
791             if (s->dac_voice[i]) {
792                 AUD_close_out (&s->card, s->dac_voice[i]);
793                 s->dac_voice[i] = NULL;
794             }
795         }
796     }
797 
798     ctl = s->ctl;
799     sctl = s->sctl;
800     s->ctl = 0;
801     s->sctl = 0;
802     es1370_update_voices (s, ctl, sctl);
803     return 0;
804 }
805 
806 static const VMStateDescription vmstate_es1370 = {
807     .name = "es1370",
808     .version_id = 2,
809     .minimum_version_id = 2,
810     .post_load = es1370_post_load,
811     .fields = (const VMStateField[]) {
812         VMSTATE_PCI_DEVICE (dev, ES1370State),
813         VMSTATE_STRUCT_ARRAY (chan, ES1370State, NB_CHANNELS, 2,
814                               vmstate_es1370_channel, struct chan),
815         VMSTATE_UINT32 (ctl, ES1370State),
816         VMSTATE_UINT32 (status, ES1370State),
817         VMSTATE_UINT32 (mempage, ES1370State),
818         VMSTATE_UINT32 (codec, ES1370State),
819         VMSTATE_UINT32 (sctl, ES1370State),
820         VMSTATE_END_OF_LIST ()
821     }
822 };
823 
es1370_on_reset(DeviceState * dev)824 static void es1370_on_reset(DeviceState *dev)
825 {
826     ES1370State *s = ES1370(dev);
827 
828     es1370_reset (s);
829 }
830 
es1370_realize(PCIDevice * dev,Error ** errp)831 static void es1370_realize(PCIDevice *dev, Error **errp)
832 {
833     ES1370State *s = ES1370(dev);
834     uint8_t *c = s->dev.config;
835 
836     if (!AUD_register_card ("es1370", &s->card, errp)) {
837         return;
838     }
839 
840     c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_SLOW >> 8;
841 
842 #if 0
843     c[PCI_CAPABILITY_LIST] = 0xdc;
844     c[PCI_INTERRUPT_LINE] = 10;
845     c[0xdc] = 0x00;
846 #endif
847 
848     c[PCI_INTERRUPT_PIN] = 1;
849     c[PCI_MIN_GNT] = 0x0c;
850     c[PCI_MAX_LAT] = 0x80;
851 
852     memory_region_init_io (&s->io, OBJECT(s), &es1370_io_ops, s, "es1370", 256);
853     pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
854 
855     es1370_reset (s);
856 }
857 
es1370_exit(PCIDevice * dev)858 static void es1370_exit(PCIDevice *dev)
859 {
860     ES1370State *s = ES1370(dev);
861     int i;
862 
863     for (i = 0; i < 2; ++i) {
864         AUD_close_out(&s->card, s->dac_voice[i]);
865     }
866 
867     AUD_close_in(&s->card, s->adc_voice);
868     AUD_remove_card(&s->card);
869 }
870 
871 static Property es1370_properties[] = {
872     DEFINE_AUDIO_PROPERTIES(ES1370State, card),
873     DEFINE_PROP_END_OF_LIST(),
874 };
875 
es1370_class_init(ObjectClass * klass,void * data)876 static void es1370_class_init (ObjectClass *klass, void *data)
877 {
878     DeviceClass *dc = DEVICE_CLASS (klass);
879     PCIDeviceClass *k = PCI_DEVICE_CLASS (klass);
880 
881     k->realize = es1370_realize;
882     k->exit = es1370_exit;
883     k->vendor_id = PCI_VENDOR_ID_ENSONIQ;
884     k->device_id = PCI_DEVICE_ID_ENSONIQ_ES1370;
885     k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
886     k->subsystem_vendor_id = 0x4942;
887     k->subsystem_id = 0x4c4c;
888     set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
889     dc->desc = "ENSONIQ AudioPCI ES1370";
890     dc->vmsd = &vmstate_es1370;
891     dc->reset = es1370_on_reset;
892     device_class_set_props(dc, es1370_properties);
893 }
894 
895 static const TypeInfo es1370_info = {
896     .name          = TYPE_ES1370,
897     .parent        = TYPE_PCI_DEVICE,
898     .instance_size = sizeof (ES1370State),
899     .class_init    = es1370_class_init,
900     .interfaces = (InterfaceInfo[]) {
901         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
902         { },
903     },
904 };
905 
es1370_register_types(void)906 static void es1370_register_types (void)
907 {
908     type_register_static (&es1370_info);
909     deprecated_register_soundhw("es1370", "ENSONIQ AudioPCI ES1370",
910                                 0, TYPE_ES1370);
911 }
912 
913 type_init (es1370_register_types)
914