1 /* 2 * Xilinx ZynqMP ZCU102 board 3 * 4 * Copyright (C) 2015 Xilinx Inc 5 * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qapi/error.h" 20 #include "hw/arm/xlnx-zynqmp.h" 21 #include "hw/boards.h" 22 #include "qemu/error-report.h" 23 #include "qemu/log.h" 24 #include "sysemu/device_tree.h" 25 #include "qom/object.h" 26 #include "net/can_emu.h" 27 #include "audio/audio.h" 28 29 struct XlnxZCU102 { 30 MachineState parent_obj; 31 32 XlnxZynqMPState soc; 33 34 bool secure; 35 bool virt; 36 37 CanBusState *canbus[XLNX_ZYNQMP_NUM_CAN]; 38 39 struct arm_boot_info binfo; 40 }; 41 42 #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102") 43 OBJECT_DECLARE_SIMPLE_TYPE(XlnxZCU102, ZCU102_MACHINE) 44 45 46 static bool zcu102_get_secure(Object *obj, Error **errp) 47 { 48 XlnxZCU102 *s = ZCU102_MACHINE(obj); 49 50 return s->secure; 51 } 52 53 static void zcu102_set_secure(Object *obj, bool value, Error **errp) 54 { 55 XlnxZCU102 *s = ZCU102_MACHINE(obj); 56 57 s->secure = value; 58 } 59 60 static bool zcu102_get_virt(Object *obj, Error **errp) 61 { 62 XlnxZCU102 *s = ZCU102_MACHINE(obj); 63 64 return s->virt; 65 } 66 67 static void zcu102_set_virt(Object *obj, bool value, Error **errp) 68 { 69 XlnxZCU102 *s = ZCU102_MACHINE(obj); 70 71 s->virt = value; 72 } 73 74 static void zcu102_modify_dtb(const struct arm_boot_info *binfo, void *fdt) 75 { 76 XlnxZCU102 *s = container_of(binfo, XlnxZCU102, binfo); 77 bool method_is_hvc; 78 char **node_path; 79 const char *r; 80 int prop_len; 81 int i; 82 83 /* If EL3 is enabled, we keep all firmware nodes active. */ 84 if (!s->secure) { 85 node_path = qemu_fdt_node_path(fdt, NULL, "xlnx,zynqmp-firmware", 86 &error_fatal); 87 88 for (i = 0; node_path && node_path[i]; i++) { 89 r = qemu_fdt_getprop(fdt, node_path[i], "method", &prop_len, NULL); 90 method_is_hvc = r && !strcmp("hvc", r); 91 92 /* Allow HVC based firmware if EL2 is enabled. */ 93 if (method_is_hvc && s->virt) { 94 continue; 95 } 96 qemu_fdt_setprop_string(fdt, node_path[i], "status", "disabled"); 97 } 98 g_strfreev(node_path); 99 } 100 } 101 102 static void bbram_attach_drive(XlnxBBRam *dev) 103 { 104 DriveInfo *dinfo; 105 BlockBackend *blk; 106 107 dinfo = drive_get_by_index(IF_PFLASH, 2); 108 blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; 109 if (blk) { 110 qdev_prop_set_drive(DEVICE(dev), "drive", blk); 111 } 112 } 113 114 static void efuse_attach_drive(XlnxEFuse *dev) 115 { 116 DriveInfo *dinfo; 117 BlockBackend *blk; 118 119 dinfo = drive_get_by_index(IF_PFLASH, 3); 120 blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; 121 if (blk) { 122 qdev_prop_set_drive(DEVICE(dev), "drive", blk); 123 } 124 } 125 126 static void xlnx_zcu102_init(MachineState *machine) 127 { 128 XlnxZCU102 *s = ZCU102_MACHINE(machine); 129 int i; 130 uint64_t ram_size = machine->ram_size; 131 132 /* Create the memory region to pass to the SoC */ 133 if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) { 134 error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of " 135 "0x%llx", ram_size, 136 XLNX_ZYNQMP_MAX_RAM_SIZE); 137 exit(1); 138 } 139 140 if (ram_size < 0x08000000) { 141 qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102", 142 ram_size); 143 } 144 145 object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_XLNX_ZYNQMP); 146 147 if (machine->audiodev) { 148 qdev_prop_set_string(DEVICE(&s->soc.dp), "audiodev", machine->audiodev); 149 } 150 151 object_property_set_link(OBJECT(&s->soc), "ddr-ram", OBJECT(machine->ram), 152 &error_abort); 153 object_property_set_bool(OBJECT(&s->soc), "secure", s->secure, 154 &error_fatal); 155 object_property_set_bool(OBJECT(&s->soc), "virtualization", s->virt, 156 &error_fatal); 157 158 for (i = 0; i < XLNX_ZYNQMP_NUM_CAN; i++) { 159 gchar *bus_name = g_strdup_printf("canbus%d", i); 160 161 object_property_set_link(OBJECT(&s->soc), bus_name, 162 OBJECT(s->canbus[i]), &error_fatal); 163 g_free(bus_name); 164 } 165 166 qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); 167 168 /* Attach bbram backend, if given */ 169 bbram_attach_drive(&s->soc.bbram); 170 171 /* Attach efuse backend, if given */ 172 efuse_attach_drive(&s->soc.efuse); 173 174 /* Create and plug in the SD cards */ 175 for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) { 176 BusState *bus; 177 DriveInfo *di = drive_get(IF_SD, 0, i); 178 BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL; 179 DeviceState *carddev; 180 char *bus_name; 181 182 bus_name = g_strdup_printf("sd-bus%d", i); 183 bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); 184 g_free(bus_name); 185 if (!bus) { 186 error_report("No SD bus found for SD card %d", i); 187 exit(1); 188 } 189 carddev = qdev_new(TYPE_SD_CARD); 190 qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal); 191 qdev_realize_and_unref(carddev, bus, &error_fatal); 192 } 193 194 for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { 195 BusState *spi_bus; 196 DeviceState *flash_dev; 197 qemu_irq cs_line; 198 DriveInfo *dinfo = drive_get(IF_MTD, 0, i); 199 gchar *bus_name = g_strdup_printf("spi%d", i); 200 201 spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); 202 g_free(bus_name); 203 204 flash_dev = qdev_new("sst25wf080"); 205 if (dinfo) { 206 qdev_prop_set_drive_err(flash_dev, "drive", 207 blk_by_legacy_dinfo(dinfo), &error_fatal); 208 } 209 qdev_prop_set_uint8(flash_dev, "cs", i); 210 qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal); 211 212 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); 213 214 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line); 215 } 216 217 for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) { 218 BusState *spi_bus; 219 DeviceState *flash_dev; 220 qemu_irq cs_line; 221 DriveInfo *dinfo = drive_get(IF_MTD, 0, XLNX_ZYNQMP_NUM_SPIS + i); 222 int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS; 223 gchar *bus_name = g_strdup_printf("qspi%d", bus); 224 225 spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); 226 g_free(bus_name); 227 228 flash_dev = qdev_new("n25q512a11"); 229 if (dinfo) { 230 qdev_prop_set_drive_err(flash_dev, "drive", 231 blk_by_legacy_dinfo(dinfo), &error_fatal); 232 } 233 qdev_prop_set_uint8(flash_dev, "cs", i); 234 qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal); 235 236 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); 237 238 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line); 239 } 240 241 /* TODO create and connect IDE devices for ide_drive_get() */ 242 243 s->binfo.ram_size = ram_size; 244 s->binfo.loader_start = 0; 245 s->binfo.modify_dtb = zcu102_modify_dtb; 246 s->binfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC; 247 arm_load_kernel(s->soc.boot_cpu_ptr, machine, &s->binfo); 248 } 249 250 static void xlnx_zcu102_machine_instance_init(Object *obj) 251 { 252 XlnxZCU102 *s = ZCU102_MACHINE(obj); 253 254 /* Default to secure mode being disabled */ 255 s->secure = false; 256 /* Default to virt (EL2) being disabled */ 257 s->virt = false; 258 object_property_add_link(obj, "canbus0", TYPE_CAN_BUS, 259 (Object **)&s->canbus[0], 260 object_property_allow_set_link, 261 0); 262 263 object_property_add_link(obj, "canbus1", TYPE_CAN_BUS, 264 (Object **)&s->canbus[1], 265 object_property_allow_set_link, 266 0); 267 } 268 269 static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) 270 { 271 MachineClass *mc = MACHINE_CLASS(oc); 272 273 mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \ 274 "the value of smp"; 275 mc->init = xlnx_zcu102_init; 276 mc->block_default_type = IF_IDE; 277 mc->units_per_default_bus = 1; 278 mc->ignore_memory_transaction_failures = true; 279 mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; 280 mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS; 281 mc->default_ram_id = "ddr-ram"; 282 283 machine_add_audiodev_property(mc); 284 object_class_property_add_bool(oc, "secure", zcu102_get_secure, 285 zcu102_set_secure); 286 object_class_property_set_description(oc, "secure", 287 "Set on/off to enable/disable the ARM " 288 "Security Extensions (TrustZone)"); 289 290 object_class_property_add_bool(oc, "virtualization", zcu102_get_virt, 291 zcu102_set_virt); 292 object_class_property_set_description(oc, "virtualization", 293 "Set on/off to enable/disable emulating a " 294 "guest CPU which implements the ARM " 295 "Virtualization Extensions"); 296 } 297 298 static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { 299 .name = TYPE_ZCU102_MACHINE, 300 .parent = TYPE_MACHINE, 301 .class_init = xlnx_zcu102_machine_class_init, 302 .instance_init = xlnx_zcu102_machine_instance_init, 303 .instance_size = sizeof(XlnxZCU102), 304 }; 305 306 static void xlnx_zcu102_machine_init_register_types(void) 307 { 308 type_register_static(&xlnx_zcu102_machine_init_typeinfo); 309 } 310 311 type_init(xlnx_zcu102_machine_init_register_types) 312