1 /* 2 * Xilinx ZynqMP ZCU102 board 3 * 4 * Copyright (C) 2015 Xilinx Inc 5 * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qapi/error.h" 20 #include "qemu-common.h" 21 #include "cpu.h" 22 #include "hw/arm/xlnx-zynqmp.h" 23 #include "hw/boards.h" 24 #include "qemu/error-report.h" 25 #include "exec/address-spaces.h" 26 #include "qemu/log.h" 27 #include "sysemu/qtest.h" 28 29 typedef struct XlnxZCU102 { 30 MachineState parent_obj; 31 32 XlnxZynqMPState soc; 33 MemoryRegion ddr_ram; 34 35 bool secure; 36 bool virt; 37 } XlnxZCU102; 38 39 #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102") 40 #define ZCU102_MACHINE(obj) \ 41 OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE) 42 43 #define TYPE_EP108_MACHINE MACHINE_TYPE_NAME("xlnx-ep108") 44 #define EP108_MACHINE(obj) \ 45 OBJECT_CHECK(XlnxZCU102, (obj), TYPE_EP108_MACHINE) 46 47 static struct arm_boot_info xlnx_zcu102_binfo; 48 49 static bool zcu102_get_secure(Object *obj, Error **errp) 50 { 51 XlnxZCU102 *s = ZCU102_MACHINE(obj); 52 53 return s->secure; 54 } 55 56 static void zcu102_set_secure(Object *obj, bool value, Error **errp) 57 { 58 XlnxZCU102 *s = ZCU102_MACHINE(obj); 59 60 s->secure = value; 61 } 62 63 static bool zcu102_get_virt(Object *obj, Error **errp) 64 { 65 XlnxZCU102 *s = ZCU102_MACHINE(obj); 66 67 return s->virt; 68 } 69 70 static void zcu102_set_virt(Object *obj, bool value, Error **errp) 71 { 72 XlnxZCU102 *s = ZCU102_MACHINE(obj); 73 74 s->virt = value; 75 } 76 77 static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine) 78 { 79 int i; 80 uint64_t ram_size = machine->ram_size; 81 82 /* Create the memory region to pass to the SoC */ 83 if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) { 84 error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of " 85 "0x%llx", ram_size, 86 XLNX_ZYNQMP_MAX_RAM_SIZE); 87 exit(1); 88 } 89 90 if (ram_size < 0x08000000) { 91 qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102", 92 ram_size); 93 } 94 95 memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram", 96 ram_size); 97 98 object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP); 99 object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), 100 &error_abort); 101 102 object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram), 103 "ddr-ram", &error_abort); 104 object_property_set_bool(OBJECT(&s->soc), s->secure, "secure", 105 &error_fatal); 106 object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization", 107 &error_fatal); 108 109 object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); 110 111 /* Create and plug in the SD cards */ 112 for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) { 113 BusState *bus; 114 DriveInfo *di = drive_get_next(IF_SD); 115 BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL; 116 DeviceState *carddev; 117 char *bus_name; 118 119 bus_name = g_strdup_printf("sd-bus%d", i); 120 bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); 121 g_free(bus_name); 122 if (!bus) { 123 error_report("No SD bus found for SD card %d", i); 124 exit(1); 125 } 126 carddev = qdev_create(bus, TYPE_SD_CARD); 127 qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); 128 object_property_set_bool(OBJECT(carddev), true, "realized", 129 &error_fatal); 130 } 131 132 for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { 133 SSIBus *spi_bus; 134 DeviceState *flash_dev; 135 qemu_irq cs_line; 136 DriveInfo *dinfo = drive_get_next(IF_MTD); 137 gchar *bus_name = g_strdup_printf("spi%d", i); 138 139 spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name); 140 g_free(bus_name); 141 142 flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080"); 143 if (dinfo) { 144 qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), 145 &error_fatal); 146 } 147 qdev_init_nofail(flash_dev); 148 149 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); 150 151 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line); 152 } 153 154 for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) { 155 SSIBus *spi_bus; 156 DeviceState *flash_dev; 157 qemu_irq cs_line; 158 DriveInfo *dinfo = drive_get_next(IF_MTD); 159 int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS; 160 gchar *bus_name = g_strdup_printf("qspi%d", bus); 161 162 spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name); 163 g_free(bus_name); 164 165 flash_dev = ssi_create_slave_no_init(spi_bus, "n25q512a11"); 166 if (dinfo) { 167 qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), 168 &error_fatal); 169 } 170 qdev_init_nofail(flash_dev); 171 172 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); 173 174 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line); 175 } 176 177 /* TODO create and connect IDE devices for ide_drive_get() */ 178 179 xlnx_zcu102_binfo.ram_size = ram_size; 180 xlnx_zcu102_binfo.kernel_filename = machine->kernel_filename; 181 xlnx_zcu102_binfo.kernel_cmdline = machine->kernel_cmdline; 182 xlnx_zcu102_binfo.initrd_filename = machine->initrd_filename; 183 xlnx_zcu102_binfo.loader_start = 0; 184 arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo); 185 } 186 187 static void xlnx_ep108_init(MachineState *machine) 188 { 189 XlnxZCU102 *s = EP108_MACHINE(machine); 190 191 if (!qtest_enabled()) { 192 info_report("The Xilinx EP108 machine is deprecated, please use the " 193 "ZCU102 machine (which has the same features) instead."); 194 } 195 196 xlnx_zynqmp_init(s, machine); 197 } 198 199 static void xlnx_ep108_machine_instance_init(Object *obj) 200 { 201 XlnxZCU102 *s = EP108_MACHINE(obj); 202 203 /* EP108, we don't support setting secure or virt */ 204 s->secure = false; 205 s->virt = false; 206 } 207 208 static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data) 209 { 210 MachineClass *mc = MACHINE_CLASS(oc); 211 212 mc->desc = "Xilinx ZynqMP EP108 board (Deprecated, please use xlnx-zcu102)"; 213 mc->init = xlnx_ep108_init; 214 mc->block_default_type = IF_IDE; 215 mc->units_per_default_bus = 1; 216 mc->ignore_memory_transaction_failures = true; 217 mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; 218 mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS; 219 } 220 221 static const TypeInfo xlnx_ep108_machine_init_typeinfo = { 222 .name = MACHINE_TYPE_NAME("xlnx-ep108"), 223 .parent = TYPE_MACHINE, 224 .class_init = xlnx_ep108_machine_class_init, 225 .instance_init = xlnx_ep108_machine_instance_init, 226 .instance_size = sizeof(XlnxZCU102), 227 }; 228 229 static void xlnx_ep108_machine_init_register_types(void) 230 { 231 type_register_static(&xlnx_ep108_machine_init_typeinfo); 232 } 233 234 static void xlnx_zcu102_init(MachineState *machine) 235 { 236 XlnxZCU102 *s = ZCU102_MACHINE(machine); 237 238 xlnx_zynqmp_init(s, machine); 239 } 240 241 static void xlnx_zcu102_machine_instance_init(Object *obj) 242 { 243 XlnxZCU102 *s = ZCU102_MACHINE(obj); 244 245 /* Default to secure mode being disabled */ 246 s->secure = false; 247 object_property_add_bool(obj, "secure", zcu102_get_secure, 248 zcu102_set_secure, NULL); 249 object_property_set_description(obj, "secure", 250 "Set on/off to enable/disable the ARM " 251 "Security Extensions (TrustZone)", 252 NULL); 253 254 /* Default to virt (EL2) being disabled */ 255 s->virt = false; 256 object_property_add_bool(obj, "virtualization", zcu102_get_virt, 257 zcu102_set_virt, NULL); 258 object_property_set_description(obj, "virtualization", 259 "Set on/off to enable/disable emulating a " 260 "guest CPU which implements the ARM " 261 "Virtualization Extensions", 262 NULL); 263 } 264 265 static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) 266 { 267 MachineClass *mc = MACHINE_CLASS(oc); 268 269 mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5s based on " \ 270 "the value of smp"; 271 mc->init = xlnx_zcu102_init; 272 mc->block_default_type = IF_IDE; 273 mc->units_per_default_bus = 1; 274 mc->ignore_memory_transaction_failures = true; 275 mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; 276 mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS; 277 } 278 279 static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { 280 .name = MACHINE_TYPE_NAME("xlnx-zcu102"), 281 .parent = TYPE_MACHINE, 282 .class_init = xlnx_zcu102_machine_class_init, 283 .instance_init = xlnx_zcu102_machine_instance_init, 284 .instance_size = sizeof(XlnxZCU102), 285 }; 286 287 static void xlnx_zcu102_machine_init_register_types(void) 288 { 289 type_register_static(&xlnx_zcu102_machine_init_typeinfo); 290 } 291 292 type_init(xlnx_zcu102_machine_init_register_types) 293 type_init(xlnx_ep108_machine_init_register_types) 294