1 /* 2 * Xilinx ZynqMP ZCU102 board 3 * 4 * Copyright (C) 2015 Xilinx Inc 5 * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qapi/error.h" 20 #include "cpu.h" 21 #include "hw/arm/xlnx-zynqmp.h" 22 #include "hw/boards.h" 23 #include "qemu/error-report.h" 24 #include "qemu/log.h" 25 #include "sysemu/device_tree.h" 26 #include "qom/object.h" 27 #include "net/can_emu.h" 28 29 struct XlnxZCU102 { 30 MachineState parent_obj; 31 32 XlnxZynqMPState soc; 33 34 bool secure; 35 bool virt; 36 37 CanBusState *canbus[XLNX_ZYNQMP_NUM_CAN]; 38 39 struct arm_boot_info binfo; 40 }; 41 42 #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102") 43 OBJECT_DECLARE_SIMPLE_TYPE(XlnxZCU102, ZCU102_MACHINE) 44 45 46 static bool zcu102_get_secure(Object *obj, Error **errp) 47 { 48 XlnxZCU102 *s = ZCU102_MACHINE(obj); 49 50 return s->secure; 51 } 52 53 static void zcu102_set_secure(Object *obj, bool value, Error **errp) 54 { 55 XlnxZCU102 *s = ZCU102_MACHINE(obj); 56 57 s->secure = value; 58 } 59 60 static bool zcu102_get_virt(Object *obj, Error **errp) 61 { 62 XlnxZCU102 *s = ZCU102_MACHINE(obj); 63 64 return s->virt; 65 } 66 67 static void zcu102_set_virt(Object *obj, bool value, Error **errp) 68 { 69 XlnxZCU102 *s = ZCU102_MACHINE(obj); 70 71 s->virt = value; 72 } 73 74 static void zcu102_modify_dtb(const struct arm_boot_info *binfo, void *fdt) 75 { 76 XlnxZCU102 *s = container_of(binfo, XlnxZCU102, binfo); 77 bool method_is_hvc; 78 char **node_path; 79 const char *r; 80 int prop_len; 81 int i; 82 83 /* If EL3 is enabled, we keep all firmware nodes active. */ 84 if (!s->secure) { 85 node_path = qemu_fdt_node_path(fdt, NULL, "xlnx,zynqmp-firmware", 86 &error_fatal); 87 88 for (i = 0; node_path && node_path[i]; i++) { 89 r = qemu_fdt_getprop(fdt, node_path[i], "method", &prop_len, NULL); 90 method_is_hvc = r && !strcmp("hvc", r); 91 92 /* Allow HVC based firmware if EL2 is enabled. */ 93 if (method_is_hvc && s->virt) { 94 continue; 95 } 96 qemu_fdt_setprop_string(fdt, node_path[i], "status", "disabled"); 97 } 98 g_strfreev(node_path); 99 } 100 } 101 102 static void xlnx_zcu102_init(MachineState *machine) 103 { 104 XlnxZCU102 *s = ZCU102_MACHINE(machine); 105 int i; 106 uint64_t ram_size = machine->ram_size; 107 108 /* Create the memory region to pass to the SoC */ 109 if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) { 110 error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of " 111 "0x%llx", ram_size, 112 XLNX_ZYNQMP_MAX_RAM_SIZE); 113 exit(1); 114 } 115 116 if (ram_size < 0x08000000) { 117 qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102", 118 ram_size); 119 } 120 121 object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_XLNX_ZYNQMP); 122 123 object_property_set_link(OBJECT(&s->soc), "ddr-ram", OBJECT(machine->ram), 124 &error_abort); 125 object_property_set_bool(OBJECT(&s->soc), "secure", s->secure, 126 &error_fatal); 127 object_property_set_bool(OBJECT(&s->soc), "virtualization", s->virt, 128 &error_fatal); 129 130 for (i = 0; i < XLNX_ZYNQMP_NUM_CAN; i++) { 131 gchar *bus_name = g_strdup_printf("canbus%d", i); 132 133 object_property_set_link(OBJECT(&s->soc), bus_name, 134 OBJECT(s->canbus[i]), &error_fatal); 135 g_free(bus_name); 136 } 137 138 qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); 139 140 /* Create and plug in the SD cards */ 141 for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) { 142 BusState *bus; 143 DriveInfo *di = drive_get_next(IF_SD); 144 BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL; 145 DeviceState *carddev; 146 char *bus_name; 147 148 bus_name = g_strdup_printf("sd-bus%d", i); 149 bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); 150 g_free(bus_name); 151 if (!bus) { 152 error_report("No SD bus found for SD card %d", i); 153 exit(1); 154 } 155 carddev = qdev_new(TYPE_SD_CARD); 156 qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal); 157 qdev_realize_and_unref(carddev, bus, &error_fatal); 158 } 159 160 for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { 161 BusState *spi_bus; 162 DeviceState *flash_dev; 163 qemu_irq cs_line; 164 DriveInfo *dinfo = drive_get_next(IF_MTD); 165 gchar *bus_name = g_strdup_printf("spi%d", i); 166 167 spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); 168 g_free(bus_name); 169 170 flash_dev = qdev_new("sst25wf080"); 171 if (dinfo) { 172 qdev_prop_set_drive_err(flash_dev, "drive", 173 blk_by_legacy_dinfo(dinfo), &error_fatal); 174 } 175 qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal); 176 177 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); 178 179 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line); 180 } 181 182 for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) { 183 BusState *spi_bus; 184 DeviceState *flash_dev; 185 qemu_irq cs_line; 186 DriveInfo *dinfo = drive_get_next(IF_MTD); 187 int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS; 188 gchar *bus_name = g_strdup_printf("qspi%d", bus); 189 190 spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); 191 g_free(bus_name); 192 193 flash_dev = qdev_new("n25q512a11"); 194 if (dinfo) { 195 qdev_prop_set_drive_err(flash_dev, "drive", 196 blk_by_legacy_dinfo(dinfo), &error_fatal); 197 } 198 qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal); 199 200 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); 201 202 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line); 203 } 204 205 /* TODO create and connect IDE devices for ide_drive_get() */ 206 207 s->binfo.ram_size = ram_size; 208 s->binfo.loader_start = 0; 209 s->binfo.modify_dtb = zcu102_modify_dtb; 210 arm_load_kernel(s->soc.boot_cpu_ptr, machine, &s->binfo); 211 } 212 213 static void xlnx_zcu102_machine_instance_init(Object *obj) 214 { 215 XlnxZCU102 *s = ZCU102_MACHINE(obj); 216 217 /* Default to secure mode being disabled */ 218 s->secure = false; 219 /* Default to virt (EL2) being disabled */ 220 s->virt = false; 221 object_property_add_link(obj, "canbus0", TYPE_CAN_BUS, 222 (Object **)&s->canbus[0], 223 object_property_allow_set_link, 224 0); 225 226 object_property_add_link(obj, "canbus1", TYPE_CAN_BUS, 227 (Object **)&s->canbus[1], 228 object_property_allow_set_link, 229 0); 230 } 231 232 static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) 233 { 234 MachineClass *mc = MACHINE_CLASS(oc); 235 236 mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \ 237 "the value of smp"; 238 mc->init = xlnx_zcu102_init; 239 mc->block_default_type = IF_IDE; 240 mc->units_per_default_bus = 1; 241 mc->ignore_memory_transaction_failures = true; 242 mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; 243 mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS; 244 mc->default_ram_id = "ddr-ram"; 245 246 object_class_property_add_bool(oc, "secure", zcu102_get_secure, 247 zcu102_set_secure); 248 object_class_property_set_description(oc, "secure", 249 "Set on/off to enable/disable the ARM " 250 "Security Extensions (TrustZone)"); 251 252 object_class_property_add_bool(oc, "virtualization", zcu102_get_virt, 253 zcu102_set_virt); 254 object_class_property_set_description(oc, "virtualization", 255 "Set on/off to enable/disable emulating a " 256 "guest CPU which implements the ARM " 257 "Virtualization Extensions"); 258 } 259 260 static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { 261 .name = TYPE_ZCU102_MACHINE, 262 .parent = TYPE_MACHINE, 263 .class_init = xlnx_zcu102_machine_class_init, 264 .instance_init = xlnx_zcu102_machine_instance_init, 265 .instance_size = sizeof(XlnxZCU102), 266 }; 267 268 static void xlnx_zcu102_machine_init_register_types(void) 269 { 270 type_register_static(&xlnx_zcu102_machine_init_typeinfo); 271 } 272 273 type_init(xlnx_zcu102_machine_init_register_types) 274