153018216SPaolo Bonzini /* 253018216SPaolo Bonzini * ARM Versatile Platform/Application Baseboard System emulation. 353018216SPaolo Bonzini * 453018216SPaolo Bonzini * Copyright (c) 2005-2007 CodeSourcery. 553018216SPaolo Bonzini * Written by Paul Brook 653018216SPaolo Bonzini * 753018216SPaolo Bonzini * This code is licensed under the GPL. 853018216SPaolo Bonzini */ 953018216SPaolo Bonzini 1012b16722SPeter Maydell #include "qemu/osdep.h" 11da34e65cSMarkus Armbruster #include "qapi/error.h" 124771d756SPaolo Bonzini #include "cpu.h" 1353018216SPaolo Bonzini #include "hw/sysbus.h" 14d6454270SMarkus Armbruster #include "migration/vmstate.h" 1512ec8bd5SPeter Maydell #include "hw/arm/boot.h" 16437cc27dSPhilippe Mathieu-Daudé #include "hw/net/smc91c111.h" 1753018216SPaolo Bonzini #include "net/net.h" 1853018216SPaolo Bonzini #include "sysemu/sysemu.h" 1953018216SPaolo Bonzini #include "hw/pci/pci.h" 200d09e41aSPaolo Bonzini #include "hw/i2c/i2c.h" 21440c9f95SPhilippe Mathieu-Daudé #include "hw/i2c/arm_sbcon_i2c.h" 2264552b6bSMarkus Armbruster #include "hw/irq.h" 2353018216SPaolo Bonzini #include "hw/boards.h" 2453018216SPaolo Bonzini #include "exec/address-spaces.h" 250d09e41aSPaolo Bonzini #include "hw/block/flash.h" 26223a72f1SGreg Bellows #include "qemu/error-report.h" 27f0d1d2c1Sxiaoqiang zhao #include "hw/char/pl011.h" 2826c607b8SPhilippe Mathieu-Daudé #include "hw/sd/sd.h" 29*db1015e9SEduardo Habkost #include "qom/object.h" 3053018216SPaolo Bonzini 3153018216SPaolo Bonzini #define VERSATILE_FLASH_ADDR 0x34000000 3253018216SPaolo Bonzini #define VERSATILE_FLASH_SIZE (64 * 1024 * 1024) 3353018216SPaolo Bonzini #define VERSATILE_FLASH_SECT_SIZE (256 * 1024) 3453018216SPaolo Bonzini 3553018216SPaolo Bonzini /* Primary interrupt controller. */ 3653018216SPaolo Bonzini 37cfc6b245SAndreas Färber #define TYPE_VERSATILE_PB_SIC "versatilepb_sic" 38*db1015e9SEduardo Habkost typedef struct vpb_sic_state vpb_sic_state; 39cfc6b245SAndreas Färber #define VERSATILE_PB_SIC(obj) \ 40cfc6b245SAndreas Färber OBJECT_CHECK(vpb_sic_state, (obj), TYPE_VERSATILE_PB_SIC) 41cfc6b245SAndreas Färber 42*db1015e9SEduardo Habkost struct vpb_sic_state { 43cfc6b245SAndreas Färber SysBusDevice parent_obj; 44cfc6b245SAndreas Färber 4553018216SPaolo Bonzini MemoryRegion iomem; 4653018216SPaolo Bonzini uint32_t level; 4753018216SPaolo Bonzini uint32_t mask; 4853018216SPaolo Bonzini uint32_t pic_enable; 4953018216SPaolo Bonzini qemu_irq parent[32]; 5053018216SPaolo Bonzini int irq; 51*db1015e9SEduardo Habkost }; 5253018216SPaolo Bonzini 5353018216SPaolo Bonzini static const VMStateDescription vmstate_vpb_sic = { 5453018216SPaolo Bonzini .name = "versatilepb_sic", 5553018216SPaolo Bonzini .version_id = 1, 5653018216SPaolo Bonzini .minimum_version_id = 1, 5753018216SPaolo Bonzini .fields = (VMStateField[]) { 5853018216SPaolo Bonzini VMSTATE_UINT32(level, vpb_sic_state), 5953018216SPaolo Bonzini VMSTATE_UINT32(mask, vpb_sic_state), 6053018216SPaolo Bonzini VMSTATE_UINT32(pic_enable, vpb_sic_state), 6153018216SPaolo Bonzini VMSTATE_END_OF_LIST() 6253018216SPaolo Bonzini } 6353018216SPaolo Bonzini }; 6453018216SPaolo Bonzini 6553018216SPaolo Bonzini static void vpb_sic_update(vpb_sic_state *s) 6653018216SPaolo Bonzini { 6753018216SPaolo Bonzini uint32_t flags; 6853018216SPaolo Bonzini 6953018216SPaolo Bonzini flags = s->level & s->mask; 7053018216SPaolo Bonzini qemu_set_irq(s->parent[s->irq], flags != 0); 7153018216SPaolo Bonzini } 7253018216SPaolo Bonzini 7353018216SPaolo Bonzini static void vpb_sic_update_pic(vpb_sic_state *s) 7453018216SPaolo Bonzini { 7553018216SPaolo Bonzini int i; 7653018216SPaolo Bonzini uint32_t mask; 7753018216SPaolo Bonzini 7853018216SPaolo Bonzini for (i = 21; i <= 30; i++) { 7953018216SPaolo Bonzini mask = 1u << i; 8053018216SPaolo Bonzini if (!(s->pic_enable & mask)) 8153018216SPaolo Bonzini continue; 8253018216SPaolo Bonzini qemu_set_irq(s->parent[i], (s->level & mask) != 0); 8353018216SPaolo Bonzini } 8453018216SPaolo Bonzini } 8553018216SPaolo Bonzini 8653018216SPaolo Bonzini static void vpb_sic_set_irq(void *opaque, int irq, int level) 8753018216SPaolo Bonzini { 8853018216SPaolo Bonzini vpb_sic_state *s = (vpb_sic_state *)opaque; 8953018216SPaolo Bonzini if (level) 9053018216SPaolo Bonzini s->level |= 1u << irq; 9153018216SPaolo Bonzini else 9253018216SPaolo Bonzini s->level &= ~(1u << irq); 9353018216SPaolo Bonzini if (s->pic_enable & (1u << irq)) 9453018216SPaolo Bonzini qemu_set_irq(s->parent[irq], level); 9553018216SPaolo Bonzini vpb_sic_update(s); 9653018216SPaolo Bonzini } 9753018216SPaolo Bonzini 9853018216SPaolo Bonzini static uint64_t vpb_sic_read(void *opaque, hwaddr offset, 9953018216SPaolo Bonzini unsigned size) 10053018216SPaolo Bonzini { 10153018216SPaolo Bonzini vpb_sic_state *s = (vpb_sic_state *)opaque; 10253018216SPaolo Bonzini 10353018216SPaolo Bonzini switch (offset >> 2) { 10453018216SPaolo Bonzini case 0: /* STATUS */ 10553018216SPaolo Bonzini return s->level & s->mask; 10653018216SPaolo Bonzini case 1: /* RAWSTAT */ 10753018216SPaolo Bonzini return s->level; 10853018216SPaolo Bonzini case 2: /* ENABLE */ 10953018216SPaolo Bonzini return s->mask; 11053018216SPaolo Bonzini case 4: /* SOFTINT */ 11153018216SPaolo Bonzini return s->level & 1; 11253018216SPaolo Bonzini case 8: /* PICENABLE */ 11353018216SPaolo Bonzini return s->pic_enable; 11453018216SPaolo Bonzini default: 11553018216SPaolo Bonzini printf ("vpb_sic_read: Bad register offset 0x%x\n", (int)offset); 11653018216SPaolo Bonzini return 0; 11753018216SPaolo Bonzini } 11853018216SPaolo Bonzini } 11953018216SPaolo Bonzini 12053018216SPaolo Bonzini static void vpb_sic_write(void *opaque, hwaddr offset, 12153018216SPaolo Bonzini uint64_t value, unsigned size) 12253018216SPaolo Bonzini { 12353018216SPaolo Bonzini vpb_sic_state *s = (vpb_sic_state *)opaque; 12453018216SPaolo Bonzini 12553018216SPaolo Bonzini switch (offset >> 2) { 12653018216SPaolo Bonzini case 2: /* ENSET */ 12753018216SPaolo Bonzini s->mask |= value; 12853018216SPaolo Bonzini break; 12953018216SPaolo Bonzini case 3: /* ENCLR */ 13053018216SPaolo Bonzini s->mask &= ~value; 13153018216SPaolo Bonzini break; 13253018216SPaolo Bonzini case 4: /* SOFTINTSET */ 13353018216SPaolo Bonzini if (value) 13453018216SPaolo Bonzini s->mask |= 1; 13553018216SPaolo Bonzini break; 13653018216SPaolo Bonzini case 5: /* SOFTINTCLR */ 13753018216SPaolo Bonzini if (value) 13853018216SPaolo Bonzini s->mask &= ~1u; 13953018216SPaolo Bonzini break; 14053018216SPaolo Bonzini case 8: /* PICENSET */ 14153018216SPaolo Bonzini s->pic_enable |= (value & 0x7fe00000); 14253018216SPaolo Bonzini vpb_sic_update_pic(s); 14353018216SPaolo Bonzini break; 14453018216SPaolo Bonzini case 9: /* PICENCLR */ 14553018216SPaolo Bonzini s->pic_enable &= ~value; 14653018216SPaolo Bonzini vpb_sic_update_pic(s); 14753018216SPaolo Bonzini break; 14853018216SPaolo Bonzini default: 14953018216SPaolo Bonzini printf ("vpb_sic_write: Bad register offset 0x%x\n", (int)offset); 15053018216SPaolo Bonzini return; 15153018216SPaolo Bonzini } 15253018216SPaolo Bonzini vpb_sic_update(s); 15353018216SPaolo Bonzini } 15453018216SPaolo Bonzini 15553018216SPaolo Bonzini static const MemoryRegionOps vpb_sic_ops = { 15653018216SPaolo Bonzini .read = vpb_sic_read, 15753018216SPaolo Bonzini .write = vpb_sic_write, 15853018216SPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 15953018216SPaolo Bonzini }; 16053018216SPaolo Bonzini 1610bc91ab3Sxiaoqiang.zhao static void vpb_sic_init(Object *obj) 16253018216SPaolo Bonzini { 1630bc91ab3Sxiaoqiang.zhao DeviceState *dev = DEVICE(obj); 1640bc91ab3Sxiaoqiang.zhao vpb_sic_state *s = VERSATILE_PB_SIC(obj); 1650bc91ab3Sxiaoqiang.zhao SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 16653018216SPaolo Bonzini int i; 16753018216SPaolo Bonzini 168cfc6b245SAndreas Färber qdev_init_gpio_in(dev, vpb_sic_set_irq, 32); 16953018216SPaolo Bonzini for (i = 0; i < 32; i++) { 170cfc6b245SAndreas Färber sysbus_init_irq(sbd, &s->parent[i]); 17153018216SPaolo Bonzini } 17253018216SPaolo Bonzini s->irq = 31; 1730bc91ab3Sxiaoqiang.zhao memory_region_init_io(&s->iomem, obj, &vpb_sic_ops, s, 17464bde0f3SPaolo Bonzini "vpb-sic", 0x1000); 175cfc6b245SAndreas Färber sysbus_init_mmio(sbd, &s->iomem); 17653018216SPaolo Bonzini } 17753018216SPaolo Bonzini 17853018216SPaolo Bonzini /* Board init. */ 17953018216SPaolo Bonzini 18053018216SPaolo Bonzini /* The AB and PB boards both use the same core, just with different 18153018216SPaolo Bonzini peripherals and expansion busses. For now we emulate a subset of the 18253018216SPaolo Bonzini PB peripherals and just change the board ID. */ 18353018216SPaolo Bonzini 18453018216SPaolo Bonzini static struct arm_boot_info versatile_binfo; 18553018216SPaolo Bonzini 1863ef96221SMarcel Apfelbaum static void versatile_init(MachineState *machine, int board_id) 18753018216SPaolo Bonzini { 188223a72f1SGreg Bellows Object *cpuobj; 18953018216SPaolo Bonzini ARMCPU *cpu; 19053018216SPaolo Bonzini MemoryRegion *sysmem = get_system_memory(); 19153018216SPaolo Bonzini qemu_irq pic[32]; 19253018216SPaolo Bonzini qemu_irq sic[32]; 19353018216SPaolo Bonzini DeviceState *dev, *sysctl; 19453018216SPaolo Bonzini SysBusDevice *busdev; 19553018216SPaolo Bonzini DeviceState *pl041; 19653018216SPaolo Bonzini PCIBus *pci_bus; 19753018216SPaolo Bonzini NICInfo *nd; 198a5c82852SAndreas Färber I2CBus *i2c; 19953018216SPaolo Bonzini int n; 20053018216SPaolo Bonzini int done_smc = 0; 20153018216SPaolo Bonzini DriveInfo *dinfo; 20253018216SPaolo Bonzini 2035c8c2aafSJean-Christophe Dubois if (machine->ram_size > 0x10000000) { 2045c8c2aafSJean-Christophe Dubois /* Device starting at address 0x10000000, 2055c8c2aafSJean-Christophe Dubois * and memory cannot overlap with devices. 2065c8c2aafSJean-Christophe Dubois * Refuse to run rather than behaving very confusingly. 2075c8c2aafSJean-Christophe Dubois */ 2085c8c2aafSJean-Christophe Dubois error_report("versatilepb: memory size must not exceed 256MB"); 2095c8c2aafSJean-Christophe Dubois exit(1); 2105c8c2aafSJean-Christophe Dubois } 2115c8c2aafSJean-Christophe Dubois 212ba1ba5ccSIgor Mammedov cpuobj = object_new(machine->cpu_type); 213223a72f1SGreg Bellows 21461e2f352SGreg Bellows /* By default ARM1176 CPUs have EL3 enabled. This board does not 21561e2f352SGreg Bellows * currently support EL3 so the CPU EL3 property is disabled before 21661e2f352SGreg Bellows * realization. 21761e2f352SGreg Bellows */ 21861e2f352SGreg Bellows if (object_property_find(cpuobj, "has_el3", NULL)) { 2195325cc34SMarkus Armbruster object_property_set_bool(cpuobj, "has_el3", false, &error_fatal); 22061e2f352SGreg Bellows } 22161e2f352SGreg Bellows 222ce189ab2SMarkus Armbruster qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); 223223a72f1SGreg Bellows 224223a72f1SGreg Bellows cpu = ARM_CPU(cpuobj); 225223a72f1SGreg Bellows 22653018216SPaolo Bonzini /* ??? RAM should repeat to fill physical memory space. */ 22753018216SPaolo Bonzini /* SDRAM at address zero. */ 2286cf41f55SIgor Mammedov memory_region_add_subregion(sysmem, 0, machine->ram); 22953018216SPaolo Bonzini 2303e80f690SMarkus Armbruster sysctl = qdev_new("realview_sysctl"); 23153018216SPaolo Bonzini qdev_prop_set_uint32(sysctl, "sys_id", 0x41007004); 23253018216SPaolo Bonzini qdev_prop_set_uint32(sysctl, "proc_id", 0x02000000); 2333c6ef471SMarkus Armbruster sysbus_realize_and_unref(SYS_BUS_DEVICE(sysctl), &error_fatal); 23453018216SPaolo Bonzini sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000); 23553018216SPaolo Bonzini 23653018216SPaolo Bonzini dev = sysbus_create_varargs("pl190", 0x10140000, 237bace999fSPeter Maydell qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ), 238bace999fSPeter Maydell qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ), 239bace999fSPeter Maydell NULL); 24053018216SPaolo Bonzini for (n = 0; n < 32; n++) { 24153018216SPaolo Bonzini pic[n] = qdev_get_gpio_in(dev, n); 24253018216SPaolo Bonzini } 243cfc6b245SAndreas Färber dev = sysbus_create_simple(TYPE_VERSATILE_PB_SIC, 0x10003000, NULL); 24453018216SPaolo Bonzini for (n = 0; n < 32; n++) { 24553018216SPaolo Bonzini sysbus_connect_irq(SYS_BUS_DEVICE(dev), n, pic[n]); 24653018216SPaolo Bonzini sic[n] = qdev_get_gpio_in(dev, n); 24753018216SPaolo Bonzini } 24853018216SPaolo Bonzini 24953018216SPaolo Bonzini sysbus_create_simple("pl050_keyboard", 0x10006000, sic[3]); 25053018216SPaolo Bonzini sysbus_create_simple("pl050_mouse", 0x10007000, sic[4]); 25153018216SPaolo Bonzini 2523e80f690SMarkus Armbruster dev = qdev_new("versatile_pci"); 25353018216SPaolo Bonzini busdev = SYS_BUS_DEVICE(dev); 2543c6ef471SMarkus Armbruster sysbus_realize_and_unref(busdev, &error_fatal); 2557468d73aSPeter Maydell sysbus_mmio_map(busdev, 0, 0x10001000); /* PCI controller regs */ 2567468d73aSPeter Maydell sysbus_mmio_map(busdev, 1, 0x41000000); /* PCI self-config */ 2577468d73aSPeter Maydell sysbus_mmio_map(busdev, 2, 0x42000000); /* PCI config */ 2587468d73aSPeter Maydell sysbus_mmio_map(busdev, 3, 0x43000000); /* PCI I/O */ 25989a32d32SPeter Maydell sysbus_mmio_map(busdev, 4, 0x44000000); /* PCI memory window 1 */ 26089a32d32SPeter Maydell sysbus_mmio_map(busdev, 5, 0x50000000); /* PCI memory window 2 */ 26189a32d32SPeter Maydell sysbus_mmio_map(busdev, 6, 0x60000000); /* PCI memory window 3 */ 26253018216SPaolo Bonzini sysbus_connect_irq(busdev, 0, sic[27]); 26353018216SPaolo Bonzini sysbus_connect_irq(busdev, 1, sic[28]); 26453018216SPaolo Bonzini sysbus_connect_irq(busdev, 2, sic[29]); 26553018216SPaolo Bonzini sysbus_connect_irq(busdev, 3, sic[30]); 26653018216SPaolo Bonzini pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci"); 26753018216SPaolo Bonzini 26853018216SPaolo Bonzini for(n = 0; n < nb_nics; n++) { 26953018216SPaolo Bonzini nd = &nd_table[n]; 27053018216SPaolo Bonzini 27153018216SPaolo Bonzini if (!done_smc && (!nd->model || strcmp(nd->model, "smc91c111") == 0)) { 27253018216SPaolo Bonzini smc91c111_init(nd, 0x10010000, sic[25]); 27353018216SPaolo Bonzini done_smc = 1; 27453018216SPaolo Bonzini } else { 27529b358f9SDavid Gibson pci_nic_init_nofail(nd, pci_bus, "rtl8139", NULL); 27653018216SPaolo Bonzini } 27753018216SPaolo Bonzini } 2784bcbe0b6SEduardo Habkost if (machine_usb(machine)) { 27953018216SPaolo Bonzini pci_create_simple(pci_bus, -1, "pci-ohci"); 28053018216SPaolo Bonzini } 28153018216SPaolo Bonzini n = drive_get_max_bus(IF_SCSI); 28253018216SPaolo Bonzini while (n >= 0) { 283877eb21dSMark Cave-Ayland dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 284877eb21dSMark Cave-Ayland lsi53c8xx_handle_legacy_cmdline(dev); 28553018216SPaolo Bonzini n--; 28653018216SPaolo Bonzini } 28753018216SPaolo Bonzini 2889bca0edbSPeter Maydell pl011_create(0x101f1000, pic[12], serial_hd(0)); 2899bca0edbSPeter Maydell pl011_create(0x101f2000, pic[13], serial_hd(1)); 2909bca0edbSPeter Maydell pl011_create(0x101f3000, pic[14], serial_hd(2)); 2919bca0edbSPeter Maydell pl011_create(0x10009000, sic[6], serial_hd(3)); 29253018216SPaolo Bonzini 2933e80f690SMarkus Armbruster dev = qdev_new("pl080"); 2945325cc34SMarkus Armbruster object_property_set_link(OBJECT(dev), "downstream", OBJECT(sysmem), 295112a829fSPeter Maydell &error_fatal); 296112a829fSPeter Maydell busdev = SYS_BUS_DEVICE(dev); 2973c6ef471SMarkus Armbruster sysbus_realize_and_unref(busdev, &error_fatal); 298112a829fSPeter Maydell sysbus_mmio_map(busdev, 0, 0x10130000); 299112a829fSPeter Maydell sysbus_connect_irq(busdev, 0, pic[17]); 300112a829fSPeter Maydell 30153018216SPaolo Bonzini sysbus_create_simple("sp804", 0x101e2000, pic[4]); 30253018216SPaolo Bonzini sysbus_create_simple("sp804", 0x101e3000, pic[5]); 30353018216SPaolo Bonzini 30453018216SPaolo Bonzini sysbus_create_simple("pl061", 0x101e4000, pic[6]); 30553018216SPaolo Bonzini sysbus_create_simple("pl061", 0x101e5000, pic[7]); 30653018216SPaolo Bonzini sysbus_create_simple("pl061", 0x101e6000, pic[8]); 30753018216SPaolo Bonzini sysbus_create_simple("pl061", 0x101e7000, pic[9]); 30853018216SPaolo Bonzini 30953018216SPaolo Bonzini /* The versatile/PB actually has a modified Color LCD controller 31053018216SPaolo Bonzini that includes hardware cursor support from the PL111. */ 31153018216SPaolo Bonzini dev = sysbus_create_simple("pl110_versatile", 0x10120000, pic[16]); 31253018216SPaolo Bonzini /* Wire up the mux control signals from the SYS_CLCD register */ 31353018216SPaolo Bonzini qdev_connect_gpio_out(sysctl, 0, qdev_get_gpio_in(dev, 0)); 31453018216SPaolo Bonzini 31526c607b8SPhilippe Mathieu-Daudé dev = sysbus_create_varargs("pl181", 0x10005000, sic[22], sic[1], NULL); 31626c607b8SPhilippe Mathieu-Daudé dinfo = drive_get_next(IF_SD); 31726c607b8SPhilippe Mathieu-Daudé if (dinfo) { 31826c607b8SPhilippe Mathieu-Daudé DeviceState *card; 31926c607b8SPhilippe Mathieu-Daudé 32026c607b8SPhilippe Mathieu-Daudé card = qdev_new(TYPE_SD_CARD); 32126c607b8SPhilippe Mathieu-Daudé qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo), 32226c607b8SPhilippe Mathieu-Daudé &error_fatal); 32326c607b8SPhilippe Mathieu-Daudé qdev_realize_and_unref(card, qdev_get_child_bus(dev, "sd-bus"), 32426c607b8SPhilippe Mathieu-Daudé &error_fatal); 32526c607b8SPhilippe Mathieu-Daudé } 32626c607b8SPhilippe Mathieu-Daudé 32726c607b8SPhilippe Mathieu-Daudé dev = sysbus_create_varargs("pl181", 0x1000b000, sic[23], sic[2], NULL); 32826c607b8SPhilippe Mathieu-Daudé dinfo = drive_get_next(IF_SD); 32926c607b8SPhilippe Mathieu-Daudé if (dinfo) { 33026c607b8SPhilippe Mathieu-Daudé DeviceState *card; 33126c607b8SPhilippe Mathieu-Daudé 33226c607b8SPhilippe Mathieu-Daudé card = qdev_new(TYPE_SD_CARD); 33326c607b8SPhilippe Mathieu-Daudé qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo), 33426c607b8SPhilippe Mathieu-Daudé &error_fatal); 33526c607b8SPhilippe Mathieu-Daudé qdev_realize_and_unref(card, qdev_get_child_bus(dev, "sd-bus"), 33626c607b8SPhilippe Mathieu-Daudé &error_fatal); 33726c607b8SPhilippe Mathieu-Daudé } 33853018216SPaolo Bonzini 33953018216SPaolo Bonzini /* Add PL031 Real Time Clock. */ 34053018216SPaolo Bonzini sysbus_create_simple("pl031", 0x101e8000, pic[10]); 34153018216SPaolo Bonzini 342440c9f95SPhilippe Mathieu-Daudé dev = sysbus_create_simple(TYPE_VERSATILE_I2C, 0x10002000, NULL); 343a5c82852SAndreas Färber i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c"); 3441373b15bSPhilippe Mathieu-Daudé i2c_slave_create_simple(i2c, "ds1338", 0x68); 34553018216SPaolo Bonzini 34653018216SPaolo Bonzini /* Add PL041 AACI Interface to the LM4549 codec */ 3473e80f690SMarkus Armbruster pl041 = qdev_new("pl041"); 34853018216SPaolo Bonzini qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); 3493c6ef471SMarkus Armbruster sysbus_realize_and_unref(SYS_BUS_DEVICE(pl041), &error_fatal); 35053018216SPaolo Bonzini sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000); 35153018216SPaolo Bonzini sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, sic[24]); 35253018216SPaolo Bonzini 35353018216SPaolo Bonzini /* Memory map for Versatile/PB: */ 35453018216SPaolo Bonzini /* 0x10000000 System registers. */ 35553018216SPaolo Bonzini /* 0x10001000 PCI controller config registers. */ 35653018216SPaolo Bonzini /* 0x10002000 Serial bus interface. */ 35753018216SPaolo Bonzini /* 0x10003000 Secondary interrupt controller. */ 35853018216SPaolo Bonzini /* 0x10004000 AACI (audio). */ 35953018216SPaolo Bonzini /* 0x10005000 MMCI0. */ 36053018216SPaolo Bonzini /* 0x10006000 KMI0 (keyboard). */ 36153018216SPaolo Bonzini /* 0x10007000 KMI1 (mouse). */ 36253018216SPaolo Bonzini /* 0x10008000 Character LCD Interface. */ 36353018216SPaolo Bonzini /* 0x10009000 UART3. */ 36453018216SPaolo Bonzini /* 0x1000a000 Smart card 1. */ 36553018216SPaolo Bonzini /* 0x1000b000 MMCI1. */ 36653018216SPaolo Bonzini /* 0x10010000 Ethernet. */ 36753018216SPaolo Bonzini /* 0x10020000 USB. */ 36853018216SPaolo Bonzini /* 0x10100000 SSMC. */ 36953018216SPaolo Bonzini /* 0x10110000 MPMC. */ 37053018216SPaolo Bonzini /* 0x10120000 CLCD Controller. */ 37153018216SPaolo Bonzini /* 0x10130000 DMA Controller. */ 37253018216SPaolo Bonzini /* 0x10140000 Vectored interrupt controller. */ 37353018216SPaolo Bonzini /* 0x101d0000 AHB Monitor Interface. */ 37453018216SPaolo Bonzini /* 0x101e0000 System Controller. */ 37553018216SPaolo Bonzini /* 0x101e1000 Watchdog Interface. */ 37653018216SPaolo Bonzini /* 0x101e2000 Timer 0/1. */ 37753018216SPaolo Bonzini /* 0x101e3000 Timer 2/3. */ 37853018216SPaolo Bonzini /* 0x101e4000 GPIO port 0. */ 37953018216SPaolo Bonzini /* 0x101e5000 GPIO port 1. */ 38053018216SPaolo Bonzini /* 0x101e6000 GPIO port 2. */ 38153018216SPaolo Bonzini /* 0x101e7000 GPIO port 3. */ 38253018216SPaolo Bonzini /* 0x101e8000 RTC. */ 38353018216SPaolo Bonzini /* 0x101f0000 Smart card 0. */ 38453018216SPaolo Bonzini /* 0x101f1000 UART0. */ 38553018216SPaolo Bonzini /* 0x101f2000 UART1. */ 38653018216SPaolo Bonzini /* 0x101f3000 UART2. */ 38753018216SPaolo Bonzini /* 0x101f4000 SSPI. */ 38853018216SPaolo Bonzini /* 0x34000000 NOR Flash */ 38953018216SPaolo Bonzini 39053018216SPaolo Bonzini dinfo = drive_get(IF_PFLASH, 0, 0); 391940d5b13SMarkus Armbruster if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, "versatile.flash", 392fa1d36dfSMarkus Armbruster VERSATILE_FLASH_SIZE, 3934be74634SMarkus Armbruster dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 39453018216SPaolo Bonzini VERSATILE_FLASH_SECT_SIZE, 39553018216SPaolo Bonzini 4, 0x0089, 0x0018, 0x0000, 0x0, 0)) { 39653018216SPaolo Bonzini fprintf(stderr, "qemu: Error registering flash memory.\n"); 39753018216SPaolo Bonzini } 39853018216SPaolo Bonzini 3993ef96221SMarcel Apfelbaum versatile_binfo.ram_size = machine->ram_size; 40053018216SPaolo Bonzini versatile_binfo.board_id = board_id; 4012744ece8STao Xu arm_load_kernel(cpu, machine, &versatile_binfo); 40253018216SPaolo Bonzini } 40353018216SPaolo Bonzini 4043ef96221SMarcel Apfelbaum static void vpb_init(MachineState *machine) 40553018216SPaolo Bonzini { 4063ef96221SMarcel Apfelbaum versatile_init(machine, 0x183); 40753018216SPaolo Bonzini } 40853018216SPaolo Bonzini 4093ef96221SMarcel Apfelbaum static void vab_init(MachineState *machine) 41053018216SPaolo Bonzini { 4113ef96221SMarcel Apfelbaum versatile_init(machine, 0x25e); 41253018216SPaolo Bonzini } 41353018216SPaolo Bonzini 4148a661aeaSAndreas Färber static void versatilepb_class_init(ObjectClass *oc, void *data) 41553018216SPaolo Bonzini { 4168a661aeaSAndreas Färber MachineClass *mc = MACHINE_CLASS(oc); 4178a661aeaSAndreas Färber 418e264d29dSEduardo Habkost mc->desc = "ARM Versatile/PB (ARM926EJ-S)"; 419e264d29dSEduardo Habkost mc->init = vpb_init; 420e264d29dSEduardo Habkost mc->block_default_type = IF_SCSI; 4214672cbd7SPeter Maydell mc->ignore_memory_transaction_failures = true; 422ba1ba5ccSIgor Mammedov mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926"); 4236cf41f55SIgor Mammedov mc->default_ram_id = "versatile.ram"; 42453018216SPaolo Bonzini } 42553018216SPaolo Bonzini 4268a661aeaSAndreas Färber static const TypeInfo versatilepb_type = { 4278a661aeaSAndreas Färber .name = MACHINE_TYPE_NAME("versatilepb"), 4288a661aeaSAndreas Färber .parent = TYPE_MACHINE, 4298a661aeaSAndreas Färber .class_init = versatilepb_class_init, 4308a661aeaSAndreas Färber }; 431e264d29dSEduardo Habkost 4328a661aeaSAndreas Färber static void versatileab_class_init(ObjectClass *oc, void *data) 433e264d29dSEduardo Habkost { 4348a661aeaSAndreas Färber MachineClass *mc = MACHINE_CLASS(oc); 4358a661aeaSAndreas Färber 436e264d29dSEduardo Habkost mc->desc = "ARM Versatile/AB (ARM926EJ-S)"; 437e264d29dSEduardo Habkost mc->init = vab_init; 438e264d29dSEduardo Habkost mc->block_default_type = IF_SCSI; 4394672cbd7SPeter Maydell mc->ignore_memory_transaction_failures = true; 440ba1ba5ccSIgor Mammedov mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926"); 4416cf41f55SIgor Mammedov mc->default_ram_id = "versatile.ram"; 442e264d29dSEduardo Habkost } 443e264d29dSEduardo Habkost 4448a661aeaSAndreas Färber static const TypeInfo versatileab_type = { 4458a661aeaSAndreas Färber .name = MACHINE_TYPE_NAME("versatileab"), 4468a661aeaSAndreas Färber .parent = TYPE_MACHINE, 4478a661aeaSAndreas Färber .class_init = versatileab_class_init, 4488a661aeaSAndreas Färber }; 4498a661aeaSAndreas Färber 4508a661aeaSAndreas Färber static void versatile_machine_init(void) 4518a661aeaSAndreas Färber { 4528a661aeaSAndreas Färber type_register_static(&versatilepb_type); 4538a661aeaSAndreas Färber type_register_static(&versatileab_type); 4548a661aeaSAndreas Färber } 4558a661aeaSAndreas Färber 4560e6aac87SEduardo Habkost type_init(versatile_machine_init) 45753018216SPaolo Bonzini 45853018216SPaolo Bonzini static void vpb_sic_class_init(ObjectClass *klass, void *data) 45953018216SPaolo Bonzini { 46053018216SPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 46153018216SPaolo Bonzini 46253018216SPaolo Bonzini dc->vmsd = &vmstate_vpb_sic; 46353018216SPaolo Bonzini } 46453018216SPaolo Bonzini 46553018216SPaolo Bonzini static const TypeInfo vpb_sic_info = { 466cfc6b245SAndreas Färber .name = TYPE_VERSATILE_PB_SIC, 46753018216SPaolo Bonzini .parent = TYPE_SYS_BUS_DEVICE, 46853018216SPaolo Bonzini .instance_size = sizeof(vpb_sic_state), 4690bc91ab3Sxiaoqiang.zhao .instance_init = vpb_sic_init, 47053018216SPaolo Bonzini .class_init = vpb_sic_class_init, 47153018216SPaolo Bonzini }; 47253018216SPaolo Bonzini 47353018216SPaolo Bonzini static void versatilepb_register_types(void) 47453018216SPaolo Bonzini { 47553018216SPaolo Bonzini type_register_static(&vpb_sic_info); 47653018216SPaolo Bonzini } 47753018216SPaolo Bonzini 47853018216SPaolo Bonzini type_init(versatilepb_register_types) 479