1 /* 2 * PXA270-based Clamshell PDA platforms. 3 * 4 * Copyright (c) 2006 Openedhand Ltd. 5 * Written by Andrzej Zaborowski <balrog@zabor.org> 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qapi/error.h" 15 #include "hw/arm/pxa.h" 16 #include "hw/arm/boot.h" 17 #include "sysemu/runstate.h" 18 #include "sysemu/sysemu.h" 19 #include "hw/pcmcia.h" 20 #include "hw/qdev-properties.h" 21 #include "hw/i2c/i2c.h" 22 #include "hw/irq.h" 23 #include "hw/ssi/ssi.h" 24 #include "hw/block/flash.h" 25 #include "qemu/timer.h" 26 #include "qemu/log.h" 27 #include "hw/arm/sharpsl.h" 28 #include "ui/console.h" 29 #include "hw/audio/wm8750.h" 30 #include "audio/audio.h" 31 #include "hw/boards.h" 32 #include "hw/sysbus.h" 33 #include "hw/misc/max111x.h" 34 #include "migration/vmstate.h" 35 #include "exec/address-spaces.h" 36 #include "cpu.h" 37 #include "qom/object.h" 38 39 enum spitz_model_e { spitz, akita, borzoi, terrier }; 40 41 struct SpitzMachineClass { 42 MachineClass parent; 43 enum spitz_model_e model; 44 int arm_id; 45 }; 46 typedef struct SpitzMachineClass SpitzMachineClass; 47 48 struct SpitzMachineState { 49 MachineState parent; 50 PXA2xxState *mpu; 51 DeviceState *mux; 52 DeviceState *lcdtg; 53 DeviceState *ads7846; 54 DeviceState *max1111; 55 DeviceState *scp0; 56 DeviceState *scp1; 57 DeviceState *misc_gpio; 58 }; 59 typedef struct SpitzMachineState SpitzMachineState; 60 61 #define TYPE_SPITZ_MACHINE "spitz-common" 62 DECLARE_OBJ_CHECKERS(SpitzMachineState, SpitzMachineClass, 63 SPITZ_MACHINE, TYPE_SPITZ_MACHINE) 64 65 #define zaurus_printf(format, ...) \ 66 fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__) 67 68 /* Spitz Flash */ 69 #define FLASH_BASE 0x0c000000 70 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ 71 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ 72 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ 73 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ 74 #define FLASH_ECCCLRR 0x10 /* Clear ECC */ 75 #define FLASH_FLASHIO 0x14 /* Flash I/O */ 76 #define FLASH_FLASHCTL 0x18 /* Flash Control */ 77 78 #define FLASHCTL_CE0 (1 << 0) 79 #define FLASHCTL_CLE (1 << 1) 80 #define FLASHCTL_ALE (1 << 2) 81 #define FLASHCTL_WP (1 << 3) 82 #define FLASHCTL_CE1 (1 << 4) 83 #define FLASHCTL_RYBY (1 << 5) 84 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) 85 86 #define TYPE_SL_NAND "sl-nand" 87 typedef struct SLNANDState SLNANDState; 88 DECLARE_INSTANCE_CHECKER(SLNANDState, SL_NAND, 89 TYPE_SL_NAND) 90 91 struct SLNANDState { 92 SysBusDevice parent_obj; 93 94 MemoryRegion iomem; 95 DeviceState *nand; 96 uint8_t ctl; 97 uint8_t manf_id; 98 uint8_t chip_id; 99 ECCState ecc; 100 }; 101 102 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) 103 { 104 SLNANDState *s = (SLNANDState *) opaque; 105 int ryby; 106 107 switch (addr) { 108 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) 109 case FLASH_ECCLPLB: 110 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | 111 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); 112 113 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) 114 case FLASH_ECCLPUB: 115 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | 116 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); 117 118 case FLASH_ECCCP: 119 return s->ecc.cp; 120 121 case FLASH_ECCCNTR: 122 return s->ecc.count & 0xff; 123 124 case FLASH_FLASHCTL: 125 nand_getpins(s->nand, &ryby); 126 if (ryby) 127 return s->ctl | FLASHCTL_RYBY; 128 else 129 return s->ctl; 130 131 case FLASH_FLASHIO: 132 if (size == 4) { 133 return ecc_digest(&s->ecc, nand_getio(s->nand)) | 134 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); 135 } 136 return ecc_digest(&s->ecc, nand_getio(s->nand)); 137 138 default: 139 qemu_log_mask(LOG_GUEST_ERROR, 140 "sl_read: bad register offset 0x%02" HWADDR_PRIx "\n", 141 addr); 142 } 143 return 0; 144 } 145 146 static void sl_write(void *opaque, hwaddr addr, 147 uint64_t value, unsigned size) 148 { 149 SLNANDState *s = (SLNANDState *) opaque; 150 151 switch (addr) { 152 case FLASH_ECCCLRR: 153 /* Value is ignored. */ 154 ecc_reset(&s->ecc); 155 break; 156 157 case FLASH_FLASHCTL: 158 s->ctl = value & 0xff & ~FLASHCTL_RYBY; 159 nand_setpins(s->nand, 160 s->ctl & FLASHCTL_CLE, 161 s->ctl & FLASHCTL_ALE, 162 s->ctl & FLASHCTL_NCE, 163 s->ctl & FLASHCTL_WP, 164 0); 165 break; 166 167 case FLASH_FLASHIO: 168 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); 169 break; 170 171 default: 172 qemu_log_mask(LOG_GUEST_ERROR, 173 "sl_write: bad register offset 0x%02" HWADDR_PRIx "\n", 174 addr); 175 } 176 } 177 178 enum { 179 FLASH_128M, 180 FLASH_1024M, 181 }; 182 183 static const MemoryRegionOps sl_ops = { 184 .read = sl_read, 185 .write = sl_write, 186 .endianness = DEVICE_NATIVE_ENDIAN, 187 }; 188 189 static void sl_flash_register(PXA2xxState *cpu, int size) 190 { 191 DeviceState *dev; 192 193 dev = qdev_new(TYPE_SL_NAND); 194 195 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); 196 if (size == FLASH_128M) 197 qdev_prop_set_uint8(dev, "chip_id", 0x73); 198 else if (size == FLASH_1024M) 199 qdev_prop_set_uint8(dev, "chip_id", 0xf1); 200 201 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 202 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); 203 } 204 205 static void sl_nand_init(Object *obj) 206 { 207 SLNANDState *s = SL_NAND(obj); 208 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 209 210 s->ctl = 0; 211 212 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40); 213 sysbus_init_mmio(dev, &s->iomem); 214 } 215 216 static void sl_nand_realize(DeviceState *dev, Error **errp) 217 { 218 SLNANDState *s = SL_NAND(dev); 219 DriveInfo *nand; 220 221 /* FIXME use a qdev drive property instead of drive_get() */ 222 nand = drive_get(IF_MTD, 0, 0); 223 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, 224 s->manf_id, s->chip_id); 225 } 226 227 /* Spitz Keyboard */ 228 229 #define SPITZ_KEY_STROBE_NUM 11 230 #define SPITZ_KEY_SENSE_NUM 7 231 232 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { 233 12, 17, 91, 34, 36, 38, 39 234 }; 235 236 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { 237 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 238 }; 239 240 /* Eighth additional row maps the special keys */ 241 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { 242 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, 243 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, 244 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, 245 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, 246 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, 247 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, 248 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, 249 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, 250 }; 251 252 #define SPITZ_GPIO_AK_INT 13 /* Remote control */ 253 #define SPITZ_GPIO_SYNC 16 /* Sync button */ 254 #define SPITZ_GPIO_ON_KEY 95 /* Power button */ 255 #define SPITZ_GPIO_SWA 97 /* Lid */ 256 #define SPITZ_GPIO_SWB 96 /* Tablet mode */ 257 258 /* The special buttons are mapped to unused keys */ 259 static const int spitz_gpiomap[5] = { 260 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, 261 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, 262 }; 263 264 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" 265 typedef struct SpitzKeyboardState SpitzKeyboardState; 266 DECLARE_INSTANCE_CHECKER(SpitzKeyboardState, SPITZ_KEYBOARD, 267 TYPE_SPITZ_KEYBOARD) 268 269 struct SpitzKeyboardState { 270 SysBusDevice parent_obj; 271 272 qemu_irq sense[SPITZ_KEY_SENSE_NUM]; 273 qemu_irq gpiomap[5]; 274 int keymap[0x80]; 275 uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; 276 uint16_t strobe_state; 277 uint16_t sense_state; 278 279 uint16_t pre_map[0x100]; 280 uint16_t modifiers; 281 uint16_t imodifiers; 282 uint8_t fifo[16]; 283 int fifopos, fifolen; 284 QEMUTimer *kbdtimer; 285 }; 286 287 static void spitz_keyboard_sense_update(SpitzKeyboardState *s) 288 { 289 int i; 290 uint16_t strobe, sense = 0; 291 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { 292 strobe = s->keyrow[i] & s->strobe_state; 293 if (strobe) { 294 sense |= 1 << i; 295 if (!(s->sense_state & (1 << i))) 296 qemu_irq_raise(s->sense[i]); 297 } else if (s->sense_state & (1 << i)) 298 qemu_irq_lower(s->sense[i]); 299 } 300 301 s->sense_state = sense; 302 } 303 304 static void spitz_keyboard_strobe(void *opaque, int line, int level) 305 { 306 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 307 308 if (level) 309 s->strobe_state |= 1 << line; 310 else 311 s->strobe_state &= ~(1 << line); 312 spitz_keyboard_sense_update(s); 313 } 314 315 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) 316 { 317 int spitz_keycode = s->keymap[keycode & 0x7f]; 318 if (spitz_keycode == -1) 319 return; 320 321 /* Handle the additional keys */ 322 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { 323 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); 324 return; 325 } 326 327 if (keycode & 0x80) 328 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); 329 else 330 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); 331 332 spitz_keyboard_sense_update(s); 333 } 334 335 #define SPITZ_MOD_SHIFT (1 << 7) 336 #define SPITZ_MOD_CTRL (1 << 8) 337 #define SPITZ_MOD_FN (1 << 9) 338 339 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c 340 341 static void spitz_keyboard_handler(void *opaque, int keycode) 342 { 343 SpitzKeyboardState *s = opaque; 344 uint16_t code; 345 int mapcode; 346 switch (keycode) { 347 case 0x2a: /* Left Shift */ 348 s->modifiers |= 1; 349 break; 350 case 0xaa: 351 s->modifiers &= ~1; 352 break; 353 case 0x36: /* Right Shift */ 354 s->modifiers |= 2; 355 break; 356 case 0xb6: 357 s->modifiers &= ~2; 358 break; 359 case 0x1d: /* Control */ 360 s->modifiers |= 4; 361 break; 362 case 0x9d: 363 s->modifiers &= ~4; 364 break; 365 case 0x38: /* Alt */ 366 s->modifiers |= 8; 367 break; 368 case 0xb8: 369 s->modifiers &= ~8; 370 break; 371 } 372 373 code = s->pre_map[mapcode = ((s->modifiers & 3) ? 374 (keycode | SPITZ_MOD_SHIFT) : 375 (keycode & ~SPITZ_MOD_SHIFT))]; 376 377 if (code != mapcode) { 378 #if 0 379 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { 380 QUEUE_KEY(0x2a | (keycode & 0x80)); 381 } 382 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { 383 QUEUE_KEY(0x1d | (keycode & 0x80)); 384 } 385 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { 386 QUEUE_KEY(0x38 | (keycode & 0x80)); 387 } 388 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { 389 QUEUE_KEY(0x2a | (~keycode & 0x80)); 390 } 391 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { 392 QUEUE_KEY(0x36 | (~keycode & 0x80)); 393 } 394 #else 395 if (keycode & 0x80) { 396 if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) 397 QUEUE_KEY(0x2a | 0x80); 398 if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) 399 QUEUE_KEY(0x1d | 0x80); 400 if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) 401 QUEUE_KEY(0x38 | 0x80); 402 if ((s->imodifiers & 0x10) && (s->modifiers & 1)) 403 QUEUE_KEY(0x2a); 404 if ((s->imodifiers & 0x20) && (s->modifiers & 2)) 405 QUEUE_KEY(0x36); 406 s->imodifiers = 0; 407 } else { 408 if ((code & SPITZ_MOD_SHIFT) && 409 !((s->modifiers | s->imodifiers) & 1)) { 410 QUEUE_KEY(0x2a); 411 s->imodifiers |= 1; 412 } 413 if ((code & SPITZ_MOD_CTRL) && 414 !((s->modifiers | s->imodifiers) & 4)) { 415 QUEUE_KEY(0x1d); 416 s->imodifiers |= 4; 417 } 418 if ((code & SPITZ_MOD_FN) && 419 !((s->modifiers | s->imodifiers) & 8)) { 420 QUEUE_KEY(0x38); 421 s->imodifiers |= 8; 422 } 423 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && 424 !(s->imodifiers & 0x10)) { 425 QUEUE_KEY(0x2a | 0x80); 426 s->imodifiers |= 0x10; 427 } 428 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && 429 !(s->imodifiers & 0x20)) { 430 QUEUE_KEY(0x36 | 0x80); 431 s->imodifiers |= 0x20; 432 } 433 } 434 #endif 435 } 436 437 QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); 438 } 439 440 static void spitz_keyboard_tick(void *opaque) 441 { 442 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 443 444 if (s->fifolen) { 445 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); 446 s->fifolen --; 447 if (s->fifopos >= 16) 448 s->fifopos = 0; 449 } 450 451 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 452 NANOSECONDS_PER_SECOND / 32); 453 } 454 455 static void spitz_keyboard_pre_map(SpitzKeyboardState *s) 456 { 457 int i; 458 for (i = 0; i < 0x100; i ++) 459 s->pre_map[i] = i; 460 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ 461 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ 462 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ 463 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ 464 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ 465 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ 466 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ 467 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ 468 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ 469 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ 470 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ 471 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ 472 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ 473 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ 474 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ 475 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ 476 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ 477 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ 478 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ 479 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ 480 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ 481 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ 482 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ 483 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ 484 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ 485 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ 486 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ 487 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ 488 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ 489 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ 490 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ 491 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ 492 493 s->modifiers = 0; 494 s->imodifiers = 0; 495 s->fifopos = 0; 496 s->fifolen = 0; 497 } 498 499 #undef SPITZ_MOD_SHIFT 500 #undef SPITZ_MOD_CTRL 501 #undef SPITZ_MOD_FN 502 503 static int spitz_keyboard_post_load(void *opaque, int version_id) 504 { 505 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 506 507 /* Release all pressed keys */ 508 memset(s->keyrow, 0, sizeof(s->keyrow)); 509 spitz_keyboard_sense_update(s); 510 s->modifiers = 0; 511 s->imodifiers = 0; 512 s->fifopos = 0; 513 s->fifolen = 0; 514 515 return 0; 516 } 517 518 static void spitz_keyboard_register(PXA2xxState *cpu) 519 { 520 int i; 521 DeviceState *dev; 522 SpitzKeyboardState *s; 523 524 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); 525 s = SPITZ_KEYBOARD(dev); 526 527 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) 528 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); 529 530 for (i = 0; i < 5; i ++) 531 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); 532 533 if (!graphic_rotate) 534 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); 535 536 for (i = 0; i < 5; i++) 537 qemu_set_irq(s->gpiomap[i], 0); 538 539 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) 540 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], 541 qdev_get_gpio_in(dev, i)); 542 543 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 544 545 qemu_add_kbd_event_handler(spitz_keyboard_handler, s); 546 } 547 548 static void spitz_keyboard_init(Object *obj) 549 { 550 DeviceState *dev = DEVICE(obj); 551 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj); 552 int i, j; 553 554 for (i = 0; i < 0x80; i ++) 555 s->keymap[i] = -1; 556 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) 557 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) 558 if (spitz_keymap[i][j] != -1) 559 s->keymap[spitz_keymap[i][j]] = (i << 4) | j; 560 561 spitz_keyboard_pre_map(s); 562 563 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); 564 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); 565 } 566 567 static void spitz_keyboard_realize(DeviceState *dev, Error **errp) 568 { 569 SpitzKeyboardState *s = SPITZ_KEYBOARD(dev); 570 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); 571 } 572 573 /* LCD backlight controller */ 574 575 #define LCDTG_RESCTL 0x00 576 #define LCDTG_PHACTRL 0x01 577 #define LCDTG_DUTYCTRL 0x02 578 #define LCDTG_POWERREG0 0x03 579 #define LCDTG_POWERREG1 0x04 580 #define LCDTG_GPOR3 0x05 581 #define LCDTG_PICTRL 0x06 582 #define LCDTG_POLCTRL 0x07 583 584 #define TYPE_SPITZ_LCDTG "spitz-lcdtg" 585 typedef struct SpitzLCDTG SpitzLCDTG; 586 DECLARE_INSTANCE_CHECKER(SpitzLCDTG, SPITZ_LCDTG, 587 TYPE_SPITZ_LCDTG) 588 589 struct SpitzLCDTG { 590 SSISlave ssidev; 591 uint32_t bl_intensity; 592 uint32_t bl_power; 593 }; 594 595 static void spitz_bl_update(SpitzLCDTG *s) 596 { 597 if (s->bl_power && s->bl_intensity) 598 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity); 599 else 600 zaurus_printf("LCD Backlight now off\n"); 601 } 602 603 static inline void spitz_bl_bit5(void *opaque, int line, int level) 604 { 605 SpitzLCDTG *s = opaque; 606 int prev = s->bl_intensity; 607 608 if (level) 609 s->bl_intensity &= ~0x20; 610 else 611 s->bl_intensity |= 0x20; 612 613 if (s->bl_power && prev != s->bl_intensity) 614 spitz_bl_update(s); 615 } 616 617 static inline void spitz_bl_power(void *opaque, int line, int level) 618 { 619 SpitzLCDTG *s = opaque; 620 s->bl_power = !!level; 621 spitz_bl_update(s); 622 } 623 624 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value) 625 { 626 SpitzLCDTG *s = SPITZ_LCDTG(dev); 627 int addr; 628 addr = value >> 5; 629 value &= 0x1f; 630 631 switch (addr) { 632 case LCDTG_RESCTL: 633 if (value) 634 zaurus_printf("LCD in QVGA mode\n"); 635 else 636 zaurus_printf("LCD in VGA mode\n"); 637 break; 638 639 case LCDTG_DUTYCTRL: 640 s->bl_intensity &= ~0x1f; 641 s->bl_intensity |= value; 642 if (s->bl_power) 643 spitz_bl_update(s); 644 break; 645 646 case LCDTG_POWERREG0: 647 /* Set common voltage to M62332FP */ 648 break; 649 } 650 return 0; 651 } 652 653 static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp) 654 { 655 SpitzLCDTG *s = SPITZ_LCDTG(ssi); 656 DeviceState *dev = DEVICE(s); 657 658 s->bl_power = 0; 659 s->bl_intensity = 0x20; 660 661 qdev_init_gpio_in_named(dev, spitz_bl_bit5, "bl_bit5", 1); 662 qdev_init_gpio_in_named(dev, spitz_bl_power, "bl_power", 1); 663 } 664 665 /* SSP devices */ 666 667 #define CORGI_SSP_PORT 2 668 669 #define SPITZ_GPIO_LCDCON_CS 53 670 #define SPITZ_GPIO_ADS7846_CS 14 671 #define SPITZ_GPIO_MAX1111_CS 20 672 #define SPITZ_GPIO_TP_INT 11 673 674 #define TYPE_CORGI_SSP "corgi-ssp" 675 typedef struct CorgiSSPState CorgiSSPState; 676 DECLARE_INSTANCE_CHECKER(CorgiSSPState, CORGI_SSP, 677 TYPE_CORGI_SSP) 678 679 /* "Demux" the signal based on current chipselect */ 680 struct CorgiSSPState { 681 SSISlave ssidev; 682 SSIBus *bus[3]; 683 uint32_t enable[3]; 684 }; 685 686 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) 687 { 688 CorgiSSPState *s = CORGI_SSP(dev); 689 int i; 690 691 for (i = 0; i < 3; i++) { 692 if (s->enable[i]) { 693 return ssi_transfer(s->bus[i], value); 694 } 695 } 696 return 0; 697 } 698 699 static void corgi_ssp_gpio_cs(void *opaque, int line, int level) 700 { 701 CorgiSSPState *s = (CorgiSSPState *)opaque; 702 assert(line >= 0 && line < 3); 703 s->enable[line] = !level; 704 } 705 706 #define MAX1111_BATT_VOLT 1 707 #define MAX1111_BATT_TEMP 2 708 #define MAX1111_ACIN_VOLT 3 709 710 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ 711 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ 712 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ 713 714 static void corgi_ssp_realize(SSISlave *d, Error **errp) 715 { 716 DeviceState *dev = DEVICE(d); 717 CorgiSSPState *s = CORGI_SSP(d); 718 719 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); 720 s->bus[0] = ssi_create_bus(dev, "ssi0"); 721 s->bus[1] = ssi_create_bus(dev, "ssi1"); 722 s->bus[2] = ssi_create_bus(dev, "ssi2"); 723 } 724 725 static void spitz_ssp_attach(SpitzMachineState *sms) 726 { 727 void *bus; 728 729 sms->mux = ssi_create_slave(sms->mpu->ssp[CORGI_SSP_PORT - 1], 730 TYPE_CORGI_SSP); 731 732 bus = qdev_get_child_bus(sms->mux, "ssi0"); 733 sms->lcdtg = ssi_create_slave(bus, TYPE_SPITZ_LCDTG); 734 735 bus = qdev_get_child_bus(sms->mux, "ssi1"); 736 sms->ads7846 = ssi_create_slave(bus, "ads7846"); 737 qdev_connect_gpio_out(sms->ads7846, 0, 738 qdev_get_gpio_in(sms->mpu->gpio, SPITZ_GPIO_TP_INT)); 739 740 bus = qdev_get_child_bus(sms->mux, "ssi2"); 741 sms->max1111 = qdev_new(TYPE_MAX_1111); 742 qdev_prop_set_uint8(sms->max1111, "input1" /* BATT_VOLT */, 743 SPITZ_BATTERY_VOLT); 744 qdev_prop_set_uint8(sms->max1111, "input2" /* BATT_TEMP */, 0); 745 qdev_prop_set_uint8(sms->max1111, "input3" /* ACIN_VOLT */, 746 SPITZ_CHARGEON_ACIN); 747 ssi_realize_and_unref(sms->max1111, bus, &error_fatal); 748 749 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS, 750 qdev_get_gpio_in(sms->mux, 0)); 751 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS, 752 qdev_get_gpio_in(sms->mux, 1)); 753 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS, 754 qdev_get_gpio_in(sms->mux, 2)); 755 } 756 757 /* CF Microdrive */ 758 759 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) 760 { 761 PCMCIACardState *md; 762 DriveInfo *dinfo; 763 764 dinfo = drive_get(IF_IDE, 0, 0); 765 if (!dinfo || dinfo->media_cd) 766 return; 767 md = dscm1xxxx_init(dinfo); 768 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); 769 } 770 771 /* Wm8750 and Max7310 on I2C */ 772 773 #define AKITA_MAX_ADDR 0x18 774 #define SPITZ_WM_ADDRL 0x1b 775 #define SPITZ_WM_ADDRH 0x1a 776 777 #define SPITZ_GPIO_WM 5 778 779 static void spitz_wm8750_addr(void *opaque, int line, int level) 780 { 781 I2CSlave *wm = (I2CSlave *) opaque; 782 if (level) 783 i2c_set_slave_address(wm, SPITZ_WM_ADDRH); 784 else 785 i2c_set_slave_address(wm, SPITZ_WM_ADDRL); 786 } 787 788 static void spitz_i2c_setup(PXA2xxState *cpu) 789 { 790 /* Attach the CPU on one end of our I2C bus. */ 791 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); 792 793 DeviceState *wm; 794 795 /* Attach a WM8750 to the bus */ 796 wm = DEVICE(i2c_slave_create_simple(bus, TYPE_WM8750, 0)); 797 798 spitz_wm8750_addr(wm, 0, 0); 799 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, 800 qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); 801 /* .. and to the sound interface. */ 802 cpu->i2s->opaque = wm; 803 cpu->i2s->codec_out = wm8750_dac_dat; 804 cpu->i2s->codec_in = wm8750_adc_dat; 805 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); 806 } 807 808 static void spitz_akita_i2c_setup(PXA2xxState *cpu) 809 { 810 /* Attach a Max7310 to Akita I2C bus. */ 811 i2c_slave_create_simple(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", 812 AKITA_MAX_ADDR); 813 } 814 815 /* Other peripherals */ 816 817 /* 818 * Encapsulation of some miscellaneous GPIO line behaviour for the Spitz boards. 819 * 820 * QEMU interface: 821 * + named GPIO inputs "green-led", "orange-led", "charging", "discharging": 822 * these currently just print messages that the line has been signalled 823 * + named GPIO input "adc-temp-on": set to cause the battery-temperature 824 * value to be passed to the max111x ADC 825 * + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x 826 */ 827 #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio" 828 typedef struct SpitzMiscGPIOState SpitzMiscGPIOState; 829 DECLARE_INSTANCE_CHECKER(SpitzMiscGPIOState, SPITZ_MISC_GPIO, 830 TYPE_SPITZ_MISC_GPIO) 831 832 struct SpitzMiscGPIOState { 833 SysBusDevice parent_obj; 834 835 qemu_irq adc_value; 836 }; 837 838 static void spitz_misc_charging(void *opaque, int n, int level) 839 { 840 zaurus_printf("Charging %s.\n", level ? "off" : "on"); 841 } 842 843 static void spitz_misc_discharging(void *opaque, int n, int level) 844 { 845 zaurus_printf("Discharging %s.\n", level ? "off" : "on"); 846 } 847 848 static void spitz_misc_green_led(void *opaque, int n, int level) 849 { 850 zaurus_printf("Green LED %s.\n", level ? "off" : "on"); 851 } 852 853 static void spitz_misc_orange_led(void *opaque, int n, int level) 854 { 855 zaurus_printf("Orange LED %s.\n", level ? "off" : "on"); 856 } 857 858 static void spitz_misc_adc_temp(void *opaque, int n, int level) 859 { 860 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(opaque); 861 int batt_temp = level ? SPITZ_BATTERY_TEMP : 0; 862 863 qemu_set_irq(s->adc_value, batt_temp); 864 } 865 866 static void spitz_misc_gpio_init(Object *obj) 867 { 868 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(obj); 869 DeviceState *dev = DEVICE(obj); 870 871 qdev_init_gpio_in_named(dev, spitz_misc_charging, "charging", 1); 872 qdev_init_gpio_in_named(dev, spitz_misc_discharging, "discharging", 1); 873 qdev_init_gpio_in_named(dev, spitz_misc_green_led, "green-led", 1); 874 qdev_init_gpio_in_named(dev, spitz_misc_orange_led, "orange-led", 1); 875 qdev_init_gpio_in_named(dev, spitz_misc_adc_temp, "adc-temp-on", 1); 876 877 qdev_init_gpio_out_named(dev, &s->adc_value, "adc-temp", 1); 878 } 879 880 #define SPITZ_SCP_LED_GREEN 1 881 #define SPITZ_SCP_JK_B 2 882 #define SPITZ_SCP_CHRG_ON 3 883 #define SPITZ_SCP_MUTE_L 4 884 #define SPITZ_SCP_MUTE_R 5 885 #define SPITZ_SCP_CF_POWER 6 886 #define SPITZ_SCP_LED_ORANGE 7 887 #define SPITZ_SCP_JK_A 8 888 #define SPITZ_SCP_ADC_TEMP_ON 9 889 #define SPITZ_SCP2_IR_ON 1 890 #define SPITZ_SCP2_AKIN_PULLUP 2 891 #define SPITZ_SCP2_BACKLIGHT_CONT 7 892 #define SPITZ_SCP2_BACKLIGHT_ON 8 893 #define SPITZ_SCP2_MIC_BIAS 9 894 895 static void spitz_scoop_gpio_setup(SpitzMachineState *sms) 896 { 897 DeviceState *miscdev = sysbus_create_simple(TYPE_SPITZ_MISC_GPIO, -1, NULL); 898 899 sms->misc_gpio = miscdev; 900 901 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_CHRG_ON, 902 qdev_get_gpio_in_named(miscdev, "charging", 0)); 903 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_JK_B, 904 qdev_get_gpio_in_named(miscdev, "discharging", 0)); 905 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_GREEN, 906 qdev_get_gpio_in_named(miscdev, "green-led", 0)); 907 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_ORANGE, 908 qdev_get_gpio_in_named(miscdev, "orange-led", 0)); 909 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_ADC_TEMP_ON, 910 qdev_get_gpio_in_named(miscdev, "adc-temp-on", 0)); 911 qdev_connect_gpio_out_named(miscdev, "adc-temp", 0, 912 qdev_get_gpio_in(sms->max1111, MAX1111_BATT_TEMP)); 913 914 if (sms->scp1) { 915 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_CONT, 916 qdev_get_gpio_in_named(sms->lcdtg, "bl_bit5", 0)); 917 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_ON, 918 qdev_get_gpio_in_named(sms->lcdtg, "bl_power", 0)); 919 } 920 } 921 922 #define SPITZ_GPIO_HSYNC 22 923 #define SPITZ_GPIO_SD_DETECT 9 924 #define SPITZ_GPIO_SD_WP 81 925 #define SPITZ_GPIO_ON_RESET 89 926 #define SPITZ_GPIO_BAT_COVER 90 927 #define SPITZ_GPIO_CF1_IRQ 105 928 #define SPITZ_GPIO_CF1_CD 94 929 #define SPITZ_GPIO_CF2_IRQ 106 930 #define SPITZ_GPIO_CF2_CD 93 931 932 static int spitz_hsync; 933 934 static void spitz_lcd_hsync_handler(void *opaque, int line, int level) 935 { 936 PXA2xxState *cpu = (PXA2xxState *) opaque; 937 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); 938 spitz_hsync ^= 1; 939 } 940 941 static void spitz_reset(void *opaque, int line, int level) 942 { 943 if (level) { 944 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 945 } 946 } 947 948 static void spitz_gpio_setup(PXA2xxState *cpu, int slots) 949 { 950 qemu_irq lcd_hsync; 951 qemu_irq reset; 952 953 /* 954 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status 955 * read to satisfy broken guests that poll-wait for hsync. 956 * Simulating a real hsync event would be less practical and 957 * wouldn't guarantee that a guest ever exits the loop. 958 */ 959 spitz_hsync = 0; 960 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); 961 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); 962 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); 963 964 /* MMC/SD host */ 965 pxa2xx_mmci_handlers(cpu->mmc, 966 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), 967 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); 968 969 /* Battery lock always closed */ 970 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); 971 972 /* Handle reset */ 973 reset = qemu_allocate_irq(spitz_reset, cpu, 0); 974 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset); 975 976 /* PCMCIA signals: card's IRQ and Card-Detect */ 977 if (slots >= 1) 978 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], 979 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), 980 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); 981 if (slots >= 2) 982 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], 983 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), 984 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); 985 } 986 987 /* Board init. */ 988 #define SPITZ_RAM 0x04000000 989 #define SPITZ_ROM 0x00800000 990 991 static struct arm_boot_info spitz_binfo = { 992 .loader_start = PXA2XX_SDRAM_BASE, 993 .ram_size = 0x04000000, 994 }; 995 996 static void spitz_common_init(MachineState *machine) 997 { 998 SpitzMachineClass *smc = SPITZ_MACHINE_GET_CLASS(machine); 999 SpitzMachineState *sms = SPITZ_MACHINE(machine); 1000 enum spitz_model_e model = smc->model; 1001 PXA2xxState *mpu; 1002 MemoryRegion *address_space_mem = get_system_memory(); 1003 MemoryRegion *rom = g_new(MemoryRegion, 1); 1004 1005 /* Setup CPU & memory */ 1006 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, 1007 machine->cpu_type); 1008 sms->mpu = mpu; 1009 1010 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); 1011 1012 memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); 1013 memory_region_add_subregion(address_space_mem, 0, rom); 1014 1015 /* Setup peripherals */ 1016 spitz_keyboard_register(mpu); 1017 1018 spitz_ssp_attach(sms); 1019 1020 sms->scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); 1021 if (model != akita) { 1022 sms->scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); 1023 } else { 1024 sms->scp1 = NULL; 1025 } 1026 1027 spitz_scoop_gpio_setup(sms); 1028 1029 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); 1030 1031 spitz_i2c_setup(mpu); 1032 1033 if (model == akita) 1034 spitz_akita_i2c_setup(mpu); 1035 1036 if (model == terrier) 1037 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ 1038 spitz_microdrive_attach(mpu, 1); 1039 else if (model != akita) 1040 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ 1041 spitz_microdrive_attach(mpu, 0); 1042 1043 spitz_binfo.board_id = smc->arm_id; 1044 arm_load_kernel(mpu->cpu, machine, &spitz_binfo); 1045 sl_bootparam_write(SL_PXA_PARAM_BASE); 1046 } 1047 1048 static void spitz_common_class_init(ObjectClass *oc, void *data) 1049 { 1050 MachineClass *mc = MACHINE_CLASS(oc); 1051 1052 mc->block_default_type = IF_IDE; 1053 mc->ignore_memory_transaction_failures = true; 1054 mc->init = spitz_common_init; 1055 } 1056 1057 static const TypeInfo spitz_common_info = { 1058 .name = TYPE_SPITZ_MACHINE, 1059 .parent = TYPE_MACHINE, 1060 .abstract = true, 1061 .instance_size = sizeof(SpitzMachineState), 1062 .class_size = sizeof(SpitzMachineClass), 1063 .class_init = spitz_common_class_init, 1064 }; 1065 1066 static void akitapda_class_init(ObjectClass *oc, void *data) 1067 { 1068 MachineClass *mc = MACHINE_CLASS(oc); 1069 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1070 1071 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; 1072 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1073 smc->model = akita; 1074 smc->arm_id = 0x2e8; 1075 } 1076 1077 static const TypeInfo akitapda_type = { 1078 .name = MACHINE_TYPE_NAME("akita"), 1079 .parent = TYPE_SPITZ_MACHINE, 1080 .class_init = akitapda_class_init, 1081 }; 1082 1083 static void spitzpda_class_init(ObjectClass *oc, void *data) 1084 { 1085 MachineClass *mc = MACHINE_CLASS(oc); 1086 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1087 1088 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; 1089 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1090 smc->model = spitz; 1091 smc->arm_id = 0x2c9; 1092 } 1093 1094 static const TypeInfo spitzpda_type = { 1095 .name = MACHINE_TYPE_NAME("spitz"), 1096 .parent = TYPE_SPITZ_MACHINE, 1097 .class_init = spitzpda_class_init, 1098 }; 1099 1100 static void borzoipda_class_init(ObjectClass *oc, void *data) 1101 { 1102 MachineClass *mc = MACHINE_CLASS(oc); 1103 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1104 1105 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; 1106 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1107 smc->model = borzoi; 1108 smc->arm_id = 0x33f; 1109 } 1110 1111 static const TypeInfo borzoipda_type = { 1112 .name = MACHINE_TYPE_NAME("borzoi"), 1113 .parent = TYPE_SPITZ_MACHINE, 1114 .class_init = borzoipda_class_init, 1115 }; 1116 1117 static void terrierpda_class_init(ObjectClass *oc, void *data) 1118 { 1119 MachineClass *mc = MACHINE_CLASS(oc); 1120 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1121 1122 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; 1123 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5"); 1124 smc->model = terrier; 1125 smc->arm_id = 0x33f; 1126 } 1127 1128 static const TypeInfo terrierpda_type = { 1129 .name = MACHINE_TYPE_NAME("terrier"), 1130 .parent = TYPE_SPITZ_MACHINE, 1131 .class_init = terrierpda_class_init, 1132 }; 1133 1134 static void spitz_machine_init(void) 1135 { 1136 type_register_static(&spitz_common_info); 1137 type_register_static(&akitapda_type); 1138 type_register_static(&spitzpda_type); 1139 type_register_static(&borzoipda_type); 1140 type_register_static(&terrierpda_type); 1141 } 1142 1143 type_init(spitz_machine_init) 1144 1145 static bool is_version_0(void *opaque, int version_id) 1146 { 1147 return version_id == 0; 1148 } 1149 1150 static VMStateDescription vmstate_sl_nand_info = { 1151 .name = "sl-nand", 1152 .version_id = 0, 1153 .minimum_version_id = 0, 1154 .fields = (VMStateField[]) { 1155 VMSTATE_UINT8(ctl, SLNANDState), 1156 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), 1157 VMSTATE_END_OF_LIST(), 1158 }, 1159 }; 1160 1161 static Property sl_nand_properties[] = { 1162 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), 1163 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), 1164 DEFINE_PROP_END_OF_LIST(), 1165 }; 1166 1167 static void sl_nand_class_init(ObjectClass *klass, void *data) 1168 { 1169 DeviceClass *dc = DEVICE_CLASS(klass); 1170 1171 dc->vmsd = &vmstate_sl_nand_info; 1172 device_class_set_props(dc, sl_nand_properties); 1173 dc->realize = sl_nand_realize; 1174 /* Reason: init() method uses drive_get() */ 1175 dc->user_creatable = false; 1176 } 1177 1178 static const TypeInfo sl_nand_info = { 1179 .name = TYPE_SL_NAND, 1180 .parent = TYPE_SYS_BUS_DEVICE, 1181 .instance_size = sizeof(SLNANDState), 1182 .instance_init = sl_nand_init, 1183 .class_init = sl_nand_class_init, 1184 }; 1185 1186 static VMStateDescription vmstate_spitz_kbd = { 1187 .name = "spitz-keyboard", 1188 .version_id = 1, 1189 .minimum_version_id = 0, 1190 .post_load = spitz_keyboard_post_load, 1191 .fields = (VMStateField[]) { 1192 VMSTATE_UINT16(sense_state, SpitzKeyboardState), 1193 VMSTATE_UINT16(strobe_state, SpitzKeyboardState), 1194 VMSTATE_UNUSED_TEST(is_version_0, 5), 1195 VMSTATE_END_OF_LIST(), 1196 }, 1197 }; 1198 1199 static void spitz_keyboard_class_init(ObjectClass *klass, void *data) 1200 { 1201 DeviceClass *dc = DEVICE_CLASS(klass); 1202 1203 dc->vmsd = &vmstate_spitz_kbd; 1204 dc->realize = spitz_keyboard_realize; 1205 } 1206 1207 static const TypeInfo spitz_keyboard_info = { 1208 .name = TYPE_SPITZ_KEYBOARD, 1209 .parent = TYPE_SYS_BUS_DEVICE, 1210 .instance_size = sizeof(SpitzKeyboardState), 1211 .instance_init = spitz_keyboard_init, 1212 .class_init = spitz_keyboard_class_init, 1213 }; 1214 1215 static const VMStateDescription vmstate_corgi_ssp_regs = { 1216 .name = "corgi-ssp", 1217 .version_id = 2, 1218 .minimum_version_id = 2, 1219 .fields = (VMStateField[]) { 1220 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState), 1221 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), 1222 VMSTATE_END_OF_LIST(), 1223 } 1224 }; 1225 1226 static void corgi_ssp_class_init(ObjectClass *klass, void *data) 1227 { 1228 DeviceClass *dc = DEVICE_CLASS(klass); 1229 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1230 1231 k->realize = corgi_ssp_realize; 1232 k->transfer = corgi_ssp_transfer; 1233 dc->vmsd = &vmstate_corgi_ssp_regs; 1234 } 1235 1236 static const TypeInfo corgi_ssp_info = { 1237 .name = TYPE_CORGI_SSP, 1238 .parent = TYPE_SSI_SLAVE, 1239 .instance_size = sizeof(CorgiSSPState), 1240 .class_init = corgi_ssp_class_init, 1241 }; 1242 1243 static const VMStateDescription vmstate_spitz_lcdtg_regs = { 1244 .name = "spitz-lcdtg", 1245 .version_id = 1, 1246 .minimum_version_id = 1, 1247 .fields = (VMStateField[]) { 1248 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG), 1249 VMSTATE_UINT32(bl_intensity, SpitzLCDTG), 1250 VMSTATE_UINT32(bl_power, SpitzLCDTG), 1251 VMSTATE_END_OF_LIST(), 1252 } 1253 }; 1254 1255 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) 1256 { 1257 DeviceClass *dc = DEVICE_CLASS(klass); 1258 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1259 1260 k->realize = spitz_lcdtg_realize; 1261 k->transfer = spitz_lcdtg_transfer; 1262 dc->vmsd = &vmstate_spitz_lcdtg_regs; 1263 } 1264 1265 static const TypeInfo spitz_lcdtg_info = { 1266 .name = TYPE_SPITZ_LCDTG, 1267 .parent = TYPE_SSI_SLAVE, 1268 .instance_size = sizeof(SpitzLCDTG), 1269 .class_init = spitz_lcdtg_class_init, 1270 }; 1271 1272 static const TypeInfo spitz_misc_gpio_info = { 1273 .name = TYPE_SPITZ_MISC_GPIO, 1274 .parent = TYPE_SYS_BUS_DEVICE, 1275 .instance_size = sizeof(SpitzMiscGPIOState), 1276 .instance_init = spitz_misc_gpio_init, 1277 /* 1278 * No class_init required: device has no internal state so does not 1279 * need to set up reset or vmstate, and does not have a realize method. 1280 */ 1281 }; 1282 1283 static void spitz_register_types(void) 1284 { 1285 type_register_static(&corgi_ssp_info); 1286 type_register_static(&spitz_lcdtg_info); 1287 type_register_static(&spitz_keyboard_info); 1288 type_register_static(&sl_nand_info); 1289 type_register_static(&spitz_misc_gpio_info); 1290 } 1291 1292 type_init(spitz_register_types) 1293