1 /* 2 * PXA270-based Clamshell PDA platforms. 3 * 4 * Copyright (c) 2006 Openedhand Ltd. 5 * Written by Andrzej Zaborowski <balrog@zabor.org> 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qapi/error.h" 15 #include "hw/arm/pxa.h" 16 #include "hw/arm/boot.h" 17 #include "sysemu/runstate.h" 18 #include "sysemu/sysemu.h" 19 #include "hw/pcmcia.h" 20 #include "hw/qdev-properties.h" 21 #include "hw/i2c/i2c.h" 22 #include "hw/irq.h" 23 #include "hw/ssi/ssi.h" 24 #include "hw/block/flash.h" 25 #include "qemu/timer.h" 26 #include "qemu/log.h" 27 #include "hw/arm/sharpsl.h" 28 #include "ui/console.h" 29 #include "hw/audio/wm8750.h" 30 #include "audio/audio.h" 31 #include "hw/boards.h" 32 #include "hw/sysbus.h" 33 #include "hw/misc/max111x.h" 34 #include "migration/vmstate.h" 35 #include "exec/address-spaces.h" 36 #include "cpu.h" 37 #include "qom/object.h" 38 39 enum spitz_model_e { spitz, akita, borzoi, terrier }; 40 41 struct SpitzMachineClass { 42 MachineClass parent; 43 enum spitz_model_e model; 44 int arm_id; 45 }; 46 47 struct SpitzMachineState { 48 MachineState parent; 49 PXA2xxState *mpu; 50 DeviceState *mux; 51 DeviceState *lcdtg; 52 DeviceState *ads7846; 53 DeviceState *max1111; 54 DeviceState *scp0; 55 DeviceState *scp1; 56 DeviceState *misc_gpio; 57 }; 58 59 #define TYPE_SPITZ_MACHINE "spitz-common" 60 OBJECT_DECLARE_TYPE(SpitzMachineState, SpitzMachineClass, SPITZ_MACHINE) 61 62 #define zaurus_printf(format, ...) \ 63 fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__) 64 65 /* Spitz Flash */ 66 #define FLASH_BASE 0x0c000000 67 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ 68 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ 69 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ 70 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ 71 #define FLASH_ECCCLRR 0x10 /* Clear ECC */ 72 #define FLASH_FLASHIO 0x14 /* Flash I/O */ 73 #define FLASH_FLASHCTL 0x18 /* Flash Control */ 74 75 #define FLASHCTL_CE0 (1 << 0) 76 #define FLASHCTL_CLE (1 << 1) 77 #define FLASHCTL_ALE (1 << 2) 78 #define FLASHCTL_WP (1 << 3) 79 #define FLASHCTL_CE1 (1 << 4) 80 #define FLASHCTL_RYBY (1 << 5) 81 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) 82 83 #define TYPE_SL_NAND "sl-nand" 84 typedef struct SLNANDState SLNANDState; 85 DECLARE_INSTANCE_CHECKER(SLNANDState, SL_NAND, 86 TYPE_SL_NAND) 87 88 struct SLNANDState { 89 SysBusDevice parent_obj; 90 91 MemoryRegion iomem; 92 DeviceState *nand; 93 uint8_t ctl; 94 uint8_t manf_id; 95 uint8_t chip_id; 96 ECCState ecc; 97 }; 98 99 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) 100 { 101 SLNANDState *s = (SLNANDState *) opaque; 102 int ryby; 103 104 switch (addr) { 105 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) 106 case FLASH_ECCLPLB: 107 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | 108 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); 109 110 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) 111 case FLASH_ECCLPUB: 112 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | 113 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); 114 115 case FLASH_ECCCP: 116 return s->ecc.cp; 117 118 case FLASH_ECCCNTR: 119 return s->ecc.count & 0xff; 120 121 case FLASH_FLASHCTL: 122 nand_getpins(s->nand, &ryby); 123 if (ryby) 124 return s->ctl | FLASHCTL_RYBY; 125 else 126 return s->ctl; 127 128 case FLASH_FLASHIO: 129 if (size == 4) { 130 return ecc_digest(&s->ecc, nand_getio(s->nand)) | 131 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); 132 } 133 return ecc_digest(&s->ecc, nand_getio(s->nand)); 134 135 default: 136 qemu_log_mask(LOG_GUEST_ERROR, 137 "sl_read: bad register offset 0x%02" HWADDR_PRIx "\n", 138 addr); 139 } 140 return 0; 141 } 142 143 static void sl_write(void *opaque, hwaddr addr, 144 uint64_t value, unsigned size) 145 { 146 SLNANDState *s = (SLNANDState *) opaque; 147 148 switch (addr) { 149 case FLASH_ECCCLRR: 150 /* Value is ignored. */ 151 ecc_reset(&s->ecc); 152 break; 153 154 case FLASH_FLASHCTL: 155 s->ctl = value & 0xff & ~FLASHCTL_RYBY; 156 nand_setpins(s->nand, 157 s->ctl & FLASHCTL_CLE, 158 s->ctl & FLASHCTL_ALE, 159 s->ctl & FLASHCTL_NCE, 160 s->ctl & FLASHCTL_WP, 161 0); 162 break; 163 164 case FLASH_FLASHIO: 165 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); 166 break; 167 168 default: 169 qemu_log_mask(LOG_GUEST_ERROR, 170 "sl_write: bad register offset 0x%02" HWADDR_PRIx "\n", 171 addr); 172 } 173 } 174 175 enum { 176 FLASH_128M, 177 FLASH_1024M, 178 }; 179 180 static const MemoryRegionOps sl_ops = { 181 .read = sl_read, 182 .write = sl_write, 183 .endianness = DEVICE_NATIVE_ENDIAN, 184 }; 185 186 static void sl_flash_register(PXA2xxState *cpu, int size) 187 { 188 DeviceState *dev; 189 190 dev = qdev_new(TYPE_SL_NAND); 191 192 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); 193 if (size == FLASH_128M) 194 qdev_prop_set_uint8(dev, "chip_id", 0x73); 195 else if (size == FLASH_1024M) 196 qdev_prop_set_uint8(dev, "chip_id", 0xf1); 197 198 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 199 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); 200 } 201 202 static void sl_nand_init(Object *obj) 203 { 204 SLNANDState *s = SL_NAND(obj); 205 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 206 207 s->ctl = 0; 208 209 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40); 210 sysbus_init_mmio(dev, &s->iomem); 211 } 212 213 static void sl_nand_realize(DeviceState *dev, Error **errp) 214 { 215 SLNANDState *s = SL_NAND(dev); 216 DriveInfo *nand; 217 218 /* FIXME use a qdev drive property instead of drive_get() */ 219 nand = drive_get(IF_MTD, 0, 0); 220 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, 221 s->manf_id, s->chip_id); 222 } 223 224 /* Spitz Keyboard */ 225 226 #define SPITZ_KEY_STROBE_NUM 11 227 #define SPITZ_KEY_SENSE_NUM 7 228 229 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { 230 12, 17, 91, 34, 36, 38, 39 231 }; 232 233 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { 234 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 235 }; 236 237 /* Eighth additional row maps the special keys */ 238 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { 239 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, 240 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, 241 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, 242 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, 243 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, 244 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, 245 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, 246 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, 247 }; 248 249 #define SPITZ_GPIO_AK_INT 13 /* Remote control */ 250 #define SPITZ_GPIO_SYNC 16 /* Sync button */ 251 #define SPITZ_GPIO_ON_KEY 95 /* Power button */ 252 #define SPITZ_GPIO_SWA 97 /* Lid */ 253 #define SPITZ_GPIO_SWB 96 /* Tablet mode */ 254 255 /* The special buttons are mapped to unused keys */ 256 static const int spitz_gpiomap[5] = { 257 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, 258 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, 259 }; 260 261 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" 262 typedef struct SpitzKeyboardState SpitzKeyboardState; 263 DECLARE_INSTANCE_CHECKER(SpitzKeyboardState, SPITZ_KEYBOARD, 264 TYPE_SPITZ_KEYBOARD) 265 266 struct SpitzKeyboardState { 267 SysBusDevice parent_obj; 268 269 qemu_irq sense[SPITZ_KEY_SENSE_NUM]; 270 qemu_irq gpiomap[5]; 271 int keymap[0x80]; 272 uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; 273 uint16_t strobe_state; 274 uint16_t sense_state; 275 276 uint16_t pre_map[0x100]; 277 uint16_t modifiers; 278 uint16_t imodifiers; 279 uint8_t fifo[16]; 280 int fifopos, fifolen; 281 QEMUTimer *kbdtimer; 282 }; 283 284 static void spitz_keyboard_sense_update(SpitzKeyboardState *s) 285 { 286 int i; 287 uint16_t strobe, sense = 0; 288 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { 289 strobe = s->keyrow[i] & s->strobe_state; 290 if (strobe) { 291 sense |= 1 << i; 292 if (!(s->sense_state & (1 << i))) 293 qemu_irq_raise(s->sense[i]); 294 } else if (s->sense_state & (1 << i)) 295 qemu_irq_lower(s->sense[i]); 296 } 297 298 s->sense_state = sense; 299 } 300 301 static void spitz_keyboard_strobe(void *opaque, int line, int level) 302 { 303 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 304 305 if (level) 306 s->strobe_state |= 1 << line; 307 else 308 s->strobe_state &= ~(1 << line); 309 spitz_keyboard_sense_update(s); 310 } 311 312 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) 313 { 314 int spitz_keycode = s->keymap[keycode & 0x7f]; 315 if (spitz_keycode == -1) 316 return; 317 318 /* Handle the additional keys */ 319 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { 320 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); 321 return; 322 } 323 324 if (keycode & 0x80) 325 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); 326 else 327 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); 328 329 spitz_keyboard_sense_update(s); 330 } 331 332 #define SPITZ_MOD_SHIFT (1 << 7) 333 #define SPITZ_MOD_CTRL (1 << 8) 334 #define SPITZ_MOD_FN (1 << 9) 335 336 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c 337 338 static void spitz_keyboard_handler(void *opaque, int keycode) 339 { 340 SpitzKeyboardState *s = opaque; 341 uint16_t code; 342 int mapcode; 343 switch (keycode) { 344 case 0x2a: /* Left Shift */ 345 s->modifiers |= 1; 346 break; 347 case 0xaa: 348 s->modifiers &= ~1; 349 break; 350 case 0x36: /* Right Shift */ 351 s->modifiers |= 2; 352 break; 353 case 0xb6: 354 s->modifiers &= ~2; 355 break; 356 case 0x1d: /* Control */ 357 s->modifiers |= 4; 358 break; 359 case 0x9d: 360 s->modifiers &= ~4; 361 break; 362 case 0x38: /* Alt */ 363 s->modifiers |= 8; 364 break; 365 case 0xb8: 366 s->modifiers &= ~8; 367 break; 368 } 369 370 code = s->pre_map[mapcode = ((s->modifiers & 3) ? 371 (keycode | SPITZ_MOD_SHIFT) : 372 (keycode & ~SPITZ_MOD_SHIFT))]; 373 374 if (code != mapcode) { 375 #if 0 376 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { 377 QUEUE_KEY(0x2a | (keycode & 0x80)); 378 } 379 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { 380 QUEUE_KEY(0x1d | (keycode & 0x80)); 381 } 382 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { 383 QUEUE_KEY(0x38 | (keycode & 0x80)); 384 } 385 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { 386 QUEUE_KEY(0x2a | (~keycode & 0x80)); 387 } 388 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { 389 QUEUE_KEY(0x36 | (~keycode & 0x80)); 390 } 391 #else 392 if (keycode & 0x80) { 393 if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) 394 QUEUE_KEY(0x2a | 0x80); 395 if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) 396 QUEUE_KEY(0x1d | 0x80); 397 if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) 398 QUEUE_KEY(0x38 | 0x80); 399 if ((s->imodifiers & 0x10) && (s->modifiers & 1)) 400 QUEUE_KEY(0x2a); 401 if ((s->imodifiers & 0x20) && (s->modifiers & 2)) 402 QUEUE_KEY(0x36); 403 s->imodifiers = 0; 404 } else { 405 if ((code & SPITZ_MOD_SHIFT) && 406 !((s->modifiers | s->imodifiers) & 1)) { 407 QUEUE_KEY(0x2a); 408 s->imodifiers |= 1; 409 } 410 if ((code & SPITZ_MOD_CTRL) && 411 !((s->modifiers | s->imodifiers) & 4)) { 412 QUEUE_KEY(0x1d); 413 s->imodifiers |= 4; 414 } 415 if ((code & SPITZ_MOD_FN) && 416 !((s->modifiers | s->imodifiers) & 8)) { 417 QUEUE_KEY(0x38); 418 s->imodifiers |= 8; 419 } 420 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && 421 !(s->imodifiers & 0x10)) { 422 QUEUE_KEY(0x2a | 0x80); 423 s->imodifiers |= 0x10; 424 } 425 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && 426 !(s->imodifiers & 0x20)) { 427 QUEUE_KEY(0x36 | 0x80); 428 s->imodifiers |= 0x20; 429 } 430 } 431 #endif 432 } 433 434 QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); 435 } 436 437 static void spitz_keyboard_tick(void *opaque) 438 { 439 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 440 441 if (s->fifolen) { 442 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); 443 s->fifolen --; 444 if (s->fifopos >= 16) 445 s->fifopos = 0; 446 } 447 448 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 449 NANOSECONDS_PER_SECOND / 32); 450 } 451 452 static void spitz_keyboard_pre_map(SpitzKeyboardState *s) 453 { 454 int i; 455 for (i = 0; i < 0x100; i ++) 456 s->pre_map[i] = i; 457 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ 458 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ 459 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ 460 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ 461 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ 462 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ 463 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ 464 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ 465 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ 466 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ 467 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ 468 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ 469 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ 470 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ 471 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ 472 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ 473 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ 474 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ 475 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ 476 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ 477 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ 478 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ 479 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ 480 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ 481 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ 482 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ 483 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ 484 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ 485 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ 486 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ 487 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ 488 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ 489 490 s->modifiers = 0; 491 s->imodifiers = 0; 492 s->fifopos = 0; 493 s->fifolen = 0; 494 } 495 496 #undef SPITZ_MOD_SHIFT 497 #undef SPITZ_MOD_CTRL 498 #undef SPITZ_MOD_FN 499 500 static int spitz_keyboard_post_load(void *opaque, int version_id) 501 { 502 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 503 504 /* Release all pressed keys */ 505 memset(s->keyrow, 0, sizeof(s->keyrow)); 506 spitz_keyboard_sense_update(s); 507 s->modifiers = 0; 508 s->imodifiers = 0; 509 s->fifopos = 0; 510 s->fifolen = 0; 511 512 return 0; 513 } 514 515 static void spitz_keyboard_register(PXA2xxState *cpu) 516 { 517 int i; 518 DeviceState *dev; 519 SpitzKeyboardState *s; 520 521 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); 522 s = SPITZ_KEYBOARD(dev); 523 524 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) 525 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); 526 527 for (i = 0; i < 5; i ++) 528 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); 529 530 if (!graphic_rotate) 531 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); 532 533 for (i = 0; i < 5; i++) 534 qemu_set_irq(s->gpiomap[i], 0); 535 536 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) 537 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], 538 qdev_get_gpio_in(dev, i)); 539 540 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 541 542 qemu_add_kbd_event_handler(spitz_keyboard_handler, s); 543 } 544 545 static void spitz_keyboard_init(Object *obj) 546 { 547 DeviceState *dev = DEVICE(obj); 548 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj); 549 int i, j; 550 551 for (i = 0; i < 0x80; i ++) 552 s->keymap[i] = -1; 553 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) 554 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) 555 if (spitz_keymap[i][j] != -1) 556 s->keymap[spitz_keymap[i][j]] = (i << 4) | j; 557 558 spitz_keyboard_pre_map(s); 559 560 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); 561 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); 562 } 563 564 static void spitz_keyboard_realize(DeviceState *dev, Error **errp) 565 { 566 SpitzKeyboardState *s = SPITZ_KEYBOARD(dev); 567 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); 568 } 569 570 /* LCD backlight controller */ 571 572 #define LCDTG_RESCTL 0x00 573 #define LCDTG_PHACTRL 0x01 574 #define LCDTG_DUTYCTRL 0x02 575 #define LCDTG_POWERREG0 0x03 576 #define LCDTG_POWERREG1 0x04 577 #define LCDTG_GPOR3 0x05 578 #define LCDTG_PICTRL 0x06 579 #define LCDTG_POLCTRL 0x07 580 581 #define TYPE_SPITZ_LCDTG "spitz-lcdtg" 582 typedef struct SpitzLCDTG SpitzLCDTG; 583 DECLARE_INSTANCE_CHECKER(SpitzLCDTG, SPITZ_LCDTG, 584 TYPE_SPITZ_LCDTG) 585 586 struct SpitzLCDTG { 587 SSISlave ssidev; 588 uint32_t bl_intensity; 589 uint32_t bl_power; 590 }; 591 592 static void spitz_bl_update(SpitzLCDTG *s) 593 { 594 if (s->bl_power && s->bl_intensity) 595 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity); 596 else 597 zaurus_printf("LCD Backlight now off\n"); 598 } 599 600 static inline void spitz_bl_bit5(void *opaque, int line, int level) 601 { 602 SpitzLCDTG *s = opaque; 603 int prev = s->bl_intensity; 604 605 if (level) 606 s->bl_intensity &= ~0x20; 607 else 608 s->bl_intensity |= 0x20; 609 610 if (s->bl_power && prev != s->bl_intensity) 611 spitz_bl_update(s); 612 } 613 614 static inline void spitz_bl_power(void *opaque, int line, int level) 615 { 616 SpitzLCDTG *s = opaque; 617 s->bl_power = !!level; 618 spitz_bl_update(s); 619 } 620 621 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value) 622 { 623 SpitzLCDTG *s = SPITZ_LCDTG(dev); 624 int addr; 625 addr = value >> 5; 626 value &= 0x1f; 627 628 switch (addr) { 629 case LCDTG_RESCTL: 630 if (value) 631 zaurus_printf("LCD in QVGA mode\n"); 632 else 633 zaurus_printf("LCD in VGA mode\n"); 634 break; 635 636 case LCDTG_DUTYCTRL: 637 s->bl_intensity &= ~0x1f; 638 s->bl_intensity |= value; 639 if (s->bl_power) 640 spitz_bl_update(s); 641 break; 642 643 case LCDTG_POWERREG0: 644 /* Set common voltage to M62332FP */ 645 break; 646 } 647 return 0; 648 } 649 650 static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp) 651 { 652 SpitzLCDTG *s = SPITZ_LCDTG(ssi); 653 DeviceState *dev = DEVICE(s); 654 655 s->bl_power = 0; 656 s->bl_intensity = 0x20; 657 658 qdev_init_gpio_in_named(dev, spitz_bl_bit5, "bl_bit5", 1); 659 qdev_init_gpio_in_named(dev, spitz_bl_power, "bl_power", 1); 660 } 661 662 /* SSP devices */ 663 664 #define CORGI_SSP_PORT 2 665 666 #define SPITZ_GPIO_LCDCON_CS 53 667 #define SPITZ_GPIO_ADS7846_CS 14 668 #define SPITZ_GPIO_MAX1111_CS 20 669 #define SPITZ_GPIO_TP_INT 11 670 671 #define TYPE_CORGI_SSP "corgi-ssp" 672 typedef struct CorgiSSPState CorgiSSPState; 673 DECLARE_INSTANCE_CHECKER(CorgiSSPState, CORGI_SSP, 674 TYPE_CORGI_SSP) 675 676 /* "Demux" the signal based on current chipselect */ 677 struct CorgiSSPState { 678 SSISlave ssidev; 679 SSIBus *bus[3]; 680 uint32_t enable[3]; 681 }; 682 683 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) 684 { 685 CorgiSSPState *s = CORGI_SSP(dev); 686 int i; 687 688 for (i = 0; i < 3; i++) { 689 if (s->enable[i]) { 690 return ssi_transfer(s->bus[i], value); 691 } 692 } 693 return 0; 694 } 695 696 static void corgi_ssp_gpio_cs(void *opaque, int line, int level) 697 { 698 CorgiSSPState *s = (CorgiSSPState *)opaque; 699 assert(line >= 0 && line < 3); 700 s->enable[line] = !level; 701 } 702 703 #define MAX1111_BATT_VOLT 1 704 #define MAX1111_BATT_TEMP 2 705 #define MAX1111_ACIN_VOLT 3 706 707 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ 708 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ 709 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ 710 711 static void corgi_ssp_realize(SSISlave *d, Error **errp) 712 { 713 DeviceState *dev = DEVICE(d); 714 CorgiSSPState *s = CORGI_SSP(d); 715 716 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); 717 s->bus[0] = ssi_create_bus(dev, "ssi0"); 718 s->bus[1] = ssi_create_bus(dev, "ssi1"); 719 s->bus[2] = ssi_create_bus(dev, "ssi2"); 720 } 721 722 static void spitz_ssp_attach(SpitzMachineState *sms) 723 { 724 void *bus; 725 726 sms->mux = ssi_create_slave(sms->mpu->ssp[CORGI_SSP_PORT - 1], 727 TYPE_CORGI_SSP); 728 729 bus = qdev_get_child_bus(sms->mux, "ssi0"); 730 sms->lcdtg = ssi_create_slave(bus, TYPE_SPITZ_LCDTG); 731 732 bus = qdev_get_child_bus(sms->mux, "ssi1"); 733 sms->ads7846 = ssi_create_slave(bus, "ads7846"); 734 qdev_connect_gpio_out(sms->ads7846, 0, 735 qdev_get_gpio_in(sms->mpu->gpio, SPITZ_GPIO_TP_INT)); 736 737 bus = qdev_get_child_bus(sms->mux, "ssi2"); 738 sms->max1111 = qdev_new(TYPE_MAX_1111); 739 qdev_prop_set_uint8(sms->max1111, "input1" /* BATT_VOLT */, 740 SPITZ_BATTERY_VOLT); 741 qdev_prop_set_uint8(sms->max1111, "input2" /* BATT_TEMP */, 0); 742 qdev_prop_set_uint8(sms->max1111, "input3" /* ACIN_VOLT */, 743 SPITZ_CHARGEON_ACIN); 744 ssi_realize_and_unref(sms->max1111, bus, &error_fatal); 745 746 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS, 747 qdev_get_gpio_in(sms->mux, 0)); 748 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS, 749 qdev_get_gpio_in(sms->mux, 1)); 750 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS, 751 qdev_get_gpio_in(sms->mux, 2)); 752 } 753 754 /* CF Microdrive */ 755 756 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) 757 { 758 PCMCIACardState *md; 759 DriveInfo *dinfo; 760 761 dinfo = drive_get(IF_IDE, 0, 0); 762 if (!dinfo || dinfo->media_cd) 763 return; 764 md = dscm1xxxx_init(dinfo); 765 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); 766 } 767 768 /* Wm8750 and Max7310 on I2C */ 769 770 #define AKITA_MAX_ADDR 0x18 771 #define SPITZ_WM_ADDRL 0x1b 772 #define SPITZ_WM_ADDRH 0x1a 773 774 #define SPITZ_GPIO_WM 5 775 776 static void spitz_wm8750_addr(void *opaque, int line, int level) 777 { 778 I2CSlave *wm = (I2CSlave *) opaque; 779 if (level) 780 i2c_set_slave_address(wm, SPITZ_WM_ADDRH); 781 else 782 i2c_set_slave_address(wm, SPITZ_WM_ADDRL); 783 } 784 785 static void spitz_i2c_setup(PXA2xxState *cpu) 786 { 787 /* Attach the CPU on one end of our I2C bus. */ 788 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); 789 790 DeviceState *wm; 791 792 /* Attach a WM8750 to the bus */ 793 wm = DEVICE(i2c_slave_create_simple(bus, TYPE_WM8750, 0)); 794 795 spitz_wm8750_addr(wm, 0, 0); 796 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, 797 qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); 798 /* .. and to the sound interface. */ 799 cpu->i2s->opaque = wm; 800 cpu->i2s->codec_out = wm8750_dac_dat; 801 cpu->i2s->codec_in = wm8750_adc_dat; 802 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); 803 } 804 805 static void spitz_akita_i2c_setup(PXA2xxState *cpu) 806 { 807 /* Attach a Max7310 to Akita I2C bus. */ 808 i2c_slave_create_simple(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", 809 AKITA_MAX_ADDR); 810 } 811 812 /* Other peripherals */ 813 814 /* 815 * Encapsulation of some miscellaneous GPIO line behaviour for the Spitz boards. 816 * 817 * QEMU interface: 818 * + named GPIO inputs "green-led", "orange-led", "charging", "discharging": 819 * these currently just print messages that the line has been signalled 820 * + named GPIO input "adc-temp-on": set to cause the battery-temperature 821 * value to be passed to the max111x ADC 822 * + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x 823 */ 824 #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio" 825 typedef struct SpitzMiscGPIOState SpitzMiscGPIOState; 826 DECLARE_INSTANCE_CHECKER(SpitzMiscGPIOState, SPITZ_MISC_GPIO, 827 TYPE_SPITZ_MISC_GPIO) 828 829 struct SpitzMiscGPIOState { 830 SysBusDevice parent_obj; 831 832 qemu_irq adc_value; 833 }; 834 835 static void spitz_misc_charging(void *opaque, int n, int level) 836 { 837 zaurus_printf("Charging %s.\n", level ? "off" : "on"); 838 } 839 840 static void spitz_misc_discharging(void *opaque, int n, int level) 841 { 842 zaurus_printf("Discharging %s.\n", level ? "off" : "on"); 843 } 844 845 static void spitz_misc_green_led(void *opaque, int n, int level) 846 { 847 zaurus_printf("Green LED %s.\n", level ? "off" : "on"); 848 } 849 850 static void spitz_misc_orange_led(void *opaque, int n, int level) 851 { 852 zaurus_printf("Orange LED %s.\n", level ? "off" : "on"); 853 } 854 855 static void spitz_misc_adc_temp(void *opaque, int n, int level) 856 { 857 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(opaque); 858 int batt_temp = level ? SPITZ_BATTERY_TEMP : 0; 859 860 qemu_set_irq(s->adc_value, batt_temp); 861 } 862 863 static void spitz_misc_gpio_init(Object *obj) 864 { 865 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(obj); 866 DeviceState *dev = DEVICE(obj); 867 868 qdev_init_gpio_in_named(dev, spitz_misc_charging, "charging", 1); 869 qdev_init_gpio_in_named(dev, spitz_misc_discharging, "discharging", 1); 870 qdev_init_gpio_in_named(dev, spitz_misc_green_led, "green-led", 1); 871 qdev_init_gpio_in_named(dev, spitz_misc_orange_led, "orange-led", 1); 872 qdev_init_gpio_in_named(dev, spitz_misc_adc_temp, "adc-temp-on", 1); 873 874 qdev_init_gpio_out_named(dev, &s->adc_value, "adc-temp", 1); 875 } 876 877 #define SPITZ_SCP_LED_GREEN 1 878 #define SPITZ_SCP_JK_B 2 879 #define SPITZ_SCP_CHRG_ON 3 880 #define SPITZ_SCP_MUTE_L 4 881 #define SPITZ_SCP_MUTE_R 5 882 #define SPITZ_SCP_CF_POWER 6 883 #define SPITZ_SCP_LED_ORANGE 7 884 #define SPITZ_SCP_JK_A 8 885 #define SPITZ_SCP_ADC_TEMP_ON 9 886 #define SPITZ_SCP2_IR_ON 1 887 #define SPITZ_SCP2_AKIN_PULLUP 2 888 #define SPITZ_SCP2_BACKLIGHT_CONT 7 889 #define SPITZ_SCP2_BACKLIGHT_ON 8 890 #define SPITZ_SCP2_MIC_BIAS 9 891 892 static void spitz_scoop_gpio_setup(SpitzMachineState *sms) 893 { 894 DeviceState *miscdev = sysbus_create_simple(TYPE_SPITZ_MISC_GPIO, -1, NULL); 895 896 sms->misc_gpio = miscdev; 897 898 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_CHRG_ON, 899 qdev_get_gpio_in_named(miscdev, "charging", 0)); 900 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_JK_B, 901 qdev_get_gpio_in_named(miscdev, "discharging", 0)); 902 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_GREEN, 903 qdev_get_gpio_in_named(miscdev, "green-led", 0)); 904 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_ORANGE, 905 qdev_get_gpio_in_named(miscdev, "orange-led", 0)); 906 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_ADC_TEMP_ON, 907 qdev_get_gpio_in_named(miscdev, "adc-temp-on", 0)); 908 qdev_connect_gpio_out_named(miscdev, "adc-temp", 0, 909 qdev_get_gpio_in(sms->max1111, MAX1111_BATT_TEMP)); 910 911 if (sms->scp1) { 912 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_CONT, 913 qdev_get_gpio_in_named(sms->lcdtg, "bl_bit5", 0)); 914 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_ON, 915 qdev_get_gpio_in_named(sms->lcdtg, "bl_power", 0)); 916 } 917 } 918 919 #define SPITZ_GPIO_HSYNC 22 920 #define SPITZ_GPIO_SD_DETECT 9 921 #define SPITZ_GPIO_SD_WP 81 922 #define SPITZ_GPIO_ON_RESET 89 923 #define SPITZ_GPIO_BAT_COVER 90 924 #define SPITZ_GPIO_CF1_IRQ 105 925 #define SPITZ_GPIO_CF1_CD 94 926 #define SPITZ_GPIO_CF2_IRQ 106 927 #define SPITZ_GPIO_CF2_CD 93 928 929 static int spitz_hsync; 930 931 static void spitz_lcd_hsync_handler(void *opaque, int line, int level) 932 { 933 PXA2xxState *cpu = (PXA2xxState *) opaque; 934 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); 935 spitz_hsync ^= 1; 936 } 937 938 static void spitz_reset(void *opaque, int line, int level) 939 { 940 if (level) { 941 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 942 } 943 } 944 945 static void spitz_gpio_setup(PXA2xxState *cpu, int slots) 946 { 947 qemu_irq lcd_hsync; 948 qemu_irq reset; 949 950 /* 951 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status 952 * read to satisfy broken guests that poll-wait for hsync. 953 * Simulating a real hsync event would be less practical and 954 * wouldn't guarantee that a guest ever exits the loop. 955 */ 956 spitz_hsync = 0; 957 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); 958 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); 959 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); 960 961 /* MMC/SD host */ 962 pxa2xx_mmci_handlers(cpu->mmc, 963 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), 964 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); 965 966 /* Battery lock always closed */ 967 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); 968 969 /* Handle reset */ 970 reset = qemu_allocate_irq(spitz_reset, cpu, 0); 971 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset); 972 973 /* PCMCIA signals: card's IRQ and Card-Detect */ 974 if (slots >= 1) 975 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], 976 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), 977 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); 978 if (slots >= 2) 979 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], 980 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), 981 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); 982 } 983 984 /* Board init. */ 985 #define SPITZ_RAM 0x04000000 986 #define SPITZ_ROM 0x00800000 987 988 static struct arm_boot_info spitz_binfo = { 989 .loader_start = PXA2XX_SDRAM_BASE, 990 .ram_size = 0x04000000, 991 }; 992 993 static void spitz_common_init(MachineState *machine) 994 { 995 SpitzMachineClass *smc = SPITZ_MACHINE_GET_CLASS(machine); 996 SpitzMachineState *sms = SPITZ_MACHINE(machine); 997 enum spitz_model_e model = smc->model; 998 PXA2xxState *mpu; 999 MemoryRegion *address_space_mem = get_system_memory(); 1000 MemoryRegion *rom = g_new(MemoryRegion, 1); 1001 1002 /* Setup CPU & memory */ 1003 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, 1004 machine->cpu_type); 1005 sms->mpu = mpu; 1006 1007 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); 1008 1009 memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); 1010 memory_region_add_subregion(address_space_mem, 0, rom); 1011 1012 /* Setup peripherals */ 1013 spitz_keyboard_register(mpu); 1014 1015 spitz_ssp_attach(sms); 1016 1017 sms->scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); 1018 if (model != akita) { 1019 sms->scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); 1020 } else { 1021 sms->scp1 = NULL; 1022 } 1023 1024 spitz_scoop_gpio_setup(sms); 1025 1026 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); 1027 1028 spitz_i2c_setup(mpu); 1029 1030 if (model == akita) 1031 spitz_akita_i2c_setup(mpu); 1032 1033 if (model == terrier) 1034 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ 1035 spitz_microdrive_attach(mpu, 1); 1036 else if (model != akita) 1037 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ 1038 spitz_microdrive_attach(mpu, 0); 1039 1040 spitz_binfo.board_id = smc->arm_id; 1041 arm_load_kernel(mpu->cpu, machine, &spitz_binfo); 1042 sl_bootparam_write(SL_PXA_PARAM_BASE); 1043 } 1044 1045 static void spitz_common_class_init(ObjectClass *oc, void *data) 1046 { 1047 MachineClass *mc = MACHINE_CLASS(oc); 1048 1049 mc->block_default_type = IF_IDE; 1050 mc->ignore_memory_transaction_failures = true; 1051 mc->init = spitz_common_init; 1052 } 1053 1054 static const TypeInfo spitz_common_info = { 1055 .name = TYPE_SPITZ_MACHINE, 1056 .parent = TYPE_MACHINE, 1057 .abstract = true, 1058 .instance_size = sizeof(SpitzMachineState), 1059 .class_size = sizeof(SpitzMachineClass), 1060 .class_init = spitz_common_class_init, 1061 }; 1062 1063 static void akitapda_class_init(ObjectClass *oc, void *data) 1064 { 1065 MachineClass *mc = MACHINE_CLASS(oc); 1066 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1067 1068 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; 1069 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1070 smc->model = akita; 1071 smc->arm_id = 0x2e8; 1072 } 1073 1074 static const TypeInfo akitapda_type = { 1075 .name = MACHINE_TYPE_NAME("akita"), 1076 .parent = TYPE_SPITZ_MACHINE, 1077 .class_init = akitapda_class_init, 1078 }; 1079 1080 static void spitzpda_class_init(ObjectClass *oc, void *data) 1081 { 1082 MachineClass *mc = MACHINE_CLASS(oc); 1083 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1084 1085 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; 1086 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1087 smc->model = spitz; 1088 smc->arm_id = 0x2c9; 1089 } 1090 1091 static const TypeInfo spitzpda_type = { 1092 .name = MACHINE_TYPE_NAME("spitz"), 1093 .parent = TYPE_SPITZ_MACHINE, 1094 .class_init = spitzpda_class_init, 1095 }; 1096 1097 static void borzoipda_class_init(ObjectClass *oc, void *data) 1098 { 1099 MachineClass *mc = MACHINE_CLASS(oc); 1100 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1101 1102 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; 1103 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1104 smc->model = borzoi; 1105 smc->arm_id = 0x33f; 1106 } 1107 1108 static const TypeInfo borzoipda_type = { 1109 .name = MACHINE_TYPE_NAME("borzoi"), 1110 .parent = TYPE_SPITZ_MACHINE, 1111 .class_init = borzoipda_class_init, 1112 }; 1113 1114 static void terrierpda_class_init(ObjectClass *oc, void *data) 1115 { 1116 MachineClass *mc = MACHINE_CLASS(oc); 1117 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1118 1119 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; 1120 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5"); 1121 smc->model = terrier; 1122 smc->arm_id = 0x33f; 1123 } 1124 1125 static const TypeInfo terrierpda_type = { 1126 .name = MACHINE_TYPE_NAME("terrier"), 1127 .parent = TYPE_SPITZ_MACHINE, 1128 .class_init = terrierpda_class_init, 1129 }; 1130 1131 static void spitz_machine_init(void) 1132 { 1133 type_register_static(&spitz_common_info); 1134 type_register_static(&akitapda_type); 1135 type_register_static(&spitzpda_type); 1136 type_register_static(&borzoipda_type); 1137 type_register_static(&terrierpda_type); 1138 } 1139 1140 type_init(spitz_machine_init) 1141 1142 static bool is_version_0(void *opaque, int version_id) 1143 { 1144 return version_id == 0; 1145 } 1146 1147 static VMStateDescription vmstate_sl_nand_info = { 1148 .name = "sl-nand", 1149 .version_id = 0, 1150 .minimum_version_id = 0, 1151 .fields = (VMStateField[]) { 1152 VMSTATE_UINT8(ctl, SLNANDState), 1153 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), 1154 VMSTATE_END_OF_LIST(), 1155 }, 1156 }; 1157 1158 static Property sl_nand_properties[] = { 1159 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), 1160 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), 1161 DEFINE_PROP_END_OF_LIST(), 1162 }; 1163 1164 static void sl_nand_class_init(ObjectClass *klass, void *data) 1165 { 1166 DeviceClass *dc = DEVICE_CLASS(klass); 1167 1168 dc->vmsd = &vmstate_sl_nand_info; 1169 device_class_set_props(dc, sl_nand_properties); 1170 dc->realize = sl_nand_realize; 1171 /* Reason: init() method uses drive_get() */ 1172 dc->user_creatable = false; 1173 } 1174 1175 static const TypeInfo sl_nand_info = { 1176 .name = TYPE_SL_NAND, 1177 .parent = TYPE_SYS_BUS_DEVICE, 1178 .instance_size = sizeof(SLNANDState), 1179 .instance_init = sl_nand_init, 1180 .class_init = sl_nand_class_init, 1181 }; 1182 1183 static VMStateDescription vmstate_spitz_kbd = { 1184 .name = "spitz-keyboard", 1185 .version_id = 1, 1186 .minimum_version_id = 0, 1187 .post_load = spitz_keyboard_post_load, 1188 .fields = (VMStateField[]) { 1189 VMSTATE_UINT16(sense_state, SpitzKeyboardState), 1190 VMSTATE_UINT16(strobe_state, SpitzKeyboardState), 1191 VMSTATE_UNUSED_TEST(is_version_0, 5), 1192 VMSTATE_END_OF_LIST(), 1193 }, 1194 }; 1195 1196 static void spitz_keyboard_class_init(ObjectClass *klass, void *data) 1197 { 1198 DeviceClass *dc = DEVICE_CLASS(klass); 1199 1200 dc->vmsd = &vmstate_spitz_kbd; 1201 dc->realize = spitz_keyboard_realize; 1202 } 1203 1204 static const TypeInfo spitz_keyboard_info = { 1205 .name = TYPE_SPITZ_KEYBOARD, 1206 .parent = TYPE_SYS_BUS_DEVICE, 1207 .instance_size = sizeof(SpitzKeyboardState), 1208 .instance_init = spitz_keyboard_init, 1209 .class_init = spitz_keyboard_class_init, 1210 }; 1211 1212 static const VMStateDescription vmstate_corgi_ssp_regs = { 1213 .name = "corgi-ssp", 1214 .version_id = 2, 1215 .minimum_version_id = 2, 1216 .fields = (VMStateField[]) { 1217 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState), 1218 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), 1219 VMSTATE_END_OF_LIST(), 1220 } 1221 }; 1222 1223 static void corgi_ssp_class_init(ObjectClass *klass, void *data) 1224 { 1225 DeviceClass *dc = DEVICE_CLASS(klass); 1226 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1227 1228 k->realize = corgi_ssp_realize; 1229 k->transfer = corgi_ssp_transfer; 1230 dc->vmsd = &vmstate_corgi_ssp_regs; 1231 } 1232 1233 static const TypeInfo corgi_ssp_info = { 1234 .name = TYPE_CORGI_SSP, 1235 .parent = TYPE_SSI_SLAVE, 1236 .instance_size = sizeof(CorgiSSPState), 1237 .class_init = corgi_ssp_class_init, 1238 }; 1239 1240 static const VMStateDescription vmstate_spitz_lcdtg_regs = { 1241 .name = "spitz-lcdtg", 1242 .version_id = 1, 1243 .minimum_version_id = 1, 1244 .fields = (VMStateField[]) { 1245 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG), 1246 VMSTATE_UINT32(bl_intensity, SpitzLCDTG), 1247 VMSTATE_UINT32(bl_power, SpitzLCDTG), 1248 VMSTATE_END_OF_LIST(), 1249 } 1250 }; 1251 1252 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) 1253 { 1254 DeviceClass *dc = DEVICE_CLASS(klass); 1255 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1256 1257 k->realize = spitz_lcdtg_realize; 1258 k->transfer = spitz_lcdtg_transfer; 1259 dc->vmsd = &vmstate_spitz_lcdtg_regs; 1260 } 1261 1262 static const TypeInfo spitz_lcdtg_info = { 1263 .name = TYPE_SPITZ_LCDTG, 1264 .parent = TYPE_SSI_SLAVE, 1265 .instance_size = sizeof(SpitzLCDTG), 1266 .class_init = spitz_lcdtg_class_init, 1267 }; 1268 1269 static const TypeInfo spitz_misc_gpio_info = { 1270 .name = TYPE_SPITZ_MISC_GPIO, 1271 .parent = TYPE_SYS_BUS_DEVICE, 1272 .instance_size = sizeof(SpitzMiscGPIOState), 1273 .instance_init = spitz_misc_gpio_init, 1274 /* 1275 * No class_init required: device has no internal state so does not 1276 * need to set up reset or vmstate, and does not have a realize method. 1277 */ 1278 }; 1279 1280 static void spitz_register_types(void) 1281 { 1282 type_register_static(&corgi_ssp_info); 1283 type_register_static(&spitz_lcdtg_info); 1284 type_register_static(&spitz_keyboard_info); 1285 type_register_static(&sl_nand_info); 1286 type_register_static(&spitz_misc_gpio_info); 1287 } 1288 1289 type_init(spitz_register_types) 1290