1 /* 2 * PXA270-based Clamshell PDA platforms. 3 * 4 * Copyright (c) 2006 Openedhand Ltd. 5 * Written by Andrzej Zaborowski <balrog@zabor.org> 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qapi/error.h" 15 #include "hw/arm/pxa.h" 16 #include "hw/arm/boot.h" 17 #include "sysemu/runstate.h" 18 #include "sysemu/sysemu.h" 19 #include "hw/pcmcia.h" 20 #include "hw/qdev-properties.h" 21 #include "hw/i2c/i2c.h" 22 #include "hw/irq.h" 23 #include "hw/ssi/ssi.h" 24 #include "hw/block/flash.h" 25 #include "qemu/timer.h" 26 #include "qemu/log.h" 27 #include "hw/arm/sharpsl.h" 28 #include "ui/console.h" 29 #include "hw/audio/wm8750.h" 30 #include "audio/audio.h" 31 #include "hw/boards.h" 32 #include "hw/sysbus.h" 33 #include "hw/adc/max111x.h" 34 #include "migration/vmstate.h" 35 #include "exec/address-spaces.h" 36 #include "cpu.h" 37 #include "qom/object.h" 38 #include "audio/audio.h" 39 40 enum spitz_model_e { spitz, akita, borzoi, terrier }; 41 42 struct SpitzMachineClass { 43 MachineClass parent; 44 enum spitz_model_e model; 45 int arm_id; 46 }; 47 48 struct SpitzMachineState { 49 MachineState parent; 50 PXA2xxState *mpu; 51 DeviceState *mux; 52 DeviceState *lcdtg; 53 DeviceState *ads7846; 54 DeviceState *max1111; 55 DeviceState *scp0; 56 DeviceState *scp1; 57 DeviceState *misc_gpio; 58 }; 59 60 #define TYPE_SPITZ_MACHINE "spitz-common" 61 OBJECT_DECLARE_TYPE(SpitzMachineState, SpitzMachineClass, SPITZ_MACHINE) 62 63 #define zaurus_printf(format, ...) \ 64 fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__) 65 66 /* Spitz Flash */ 67 #define FLASH_BASE 0x0c000000 68 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ 69 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ 70 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ 71 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ 72 #define FLASH_ECCCLRR 0x10 /* Clear ECC */ 73 #define FLASH_FLASHIO 0x14 /* Flash I/O */ 74 #define FLASH_FLASHCTL 0x18 /* Flash Control */ 75 76 #define FLASHCTL_CE0 (1 << 0) 77 #define FLASHCTL_CLE (1 << 1) 78 #define FLASHCTL_ALE (1 << 2) 79 #define FLASHCTL_WP (1 << 3) 80 #define FLASHCTL_CE1 (1 << 4) 81 #define FLASHCTL_RYBY (1 << 5) 82 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) 83 84 #define TYPE_SL_NAND "sl-nand" 85 OBJECT_DECLARE_SIMPLE_TYPE(SLNANDState, SL_NAND) 86 87 struct SLNANDState { 88 SysBusDevice parent_obj; 89 90 MemoryRegion iomem; 91 DeviceState *nand; 92 uint8_t ctl; 93 uint8_t manf_id; 94 uint8_t chip_id; 95 ECCState ecc; 96 }; 97 98 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) 99 { 100 SLNANDState *s = (SLNANDState *) opaque; 101 int ryby; 102 103 switch (addr) { 104 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) 105 case FLASH_ECCLPLB: 106 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | 107 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); 108 109 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) 110 case FLASH_ECCLPUB: 111 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | 112 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); 113 114 case FLASH_ECCCP: 115 return s->ecc.cp; 116 117 case FLASH_ECCCNTR: 118 return s->ecc.count & 0xff; 119 120 case FLASH_FLASHCTL: 121 nand_getpins(s->nand, &ryby); 122 if (ryby) 123 return s->ctl | FLASHCTL_RYBY; 124 else 125 return s->ctl; 126 127 case FLASH_FLASHIO: 128 if (size == 4) { 129 return ecc_digest(&s->ecc, nand_getio(s->nand)) | 130 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); 131 } 132 return ecc_digest(&s->ecc, nand_getio(s->nand)); 133 134 default: 135 qemu_log_mask(LOG_GUEST_ERROR, 136 "sl_read: bad register offset 0x%02" HWADDR_PRIx "\n", 137 addr); 138 } 139 return 0; 140 } 141 142 static void sl_write(void *opaque, hwaddr addr, 143 uint64_t value, unsigned size) 144 { 145 SLNANDState *s = (SLNANDState *) opaque; 146 147 switch (addr) { 148 case FLASH_ECCCLRR: 149 /* Value is ignored. */ 150 ecc_reset(&s->ecc); 151 break; 152 153 case FLASH_FLASHCTL: 154 s->ctl = value & 0xff & ~FLASHCTL_RYBY; 155 nand_setpins(s->nand, 156 s->ctl & FLASHCTL_CLE, 157 s->ctl & FLASHCTL_ALE, 158 s->ctl & FLASHCTL_NCE, 159 s->ctl & FLASHCTL_WP, 160 0); 161 break; 162 163 case FLASH_FLASHIO: 164 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); 165 break; 166 167 default: 168 qemu_log_mask(LOG_GUEST_ERROR, 169 "sl_write: bad register offset 0x%02" HWADDR_PRIx "\n", 170 addr); 171 } 172 } 173 174 enum { 175 FLASH_128M, 176 FLASH_1024M, 177 }; 178 179 static const MemoryRegionOps sl_ops = { 180 .read = sl_read, 181 .write = sl_write, 182 .endianness = DEVICE_NATIVE_ENDIAN, 183 }; 184 185 static void sl_flash_register(PXA2xxState *cpu, int size) 186 { 187 DeviceState *dev; 188 189 dev = qdev_new(TYPE_SL_NAND); 190 191 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); 192 if (size == FLASH_128M) 193 qdev_prop_set_uint8(dev, "chip_id", 0x73); 194 else if (size == FLASH_1024M) 195 qdev_prop_set_uint8(dev, "chip_id", 0xf1); 196 197 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 198 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); 199 } 200 201 static void sl_nand_init(Object *obj) 202 { 203 SLNANDState *s = SL_NAND(obj); 204 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 205 206 s->ctl = 0; 207 208 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40); 209 sysbus_init_mmio(dev, &s->iomem); 210 } 211 212 static void sl_nand_realize(DeviceState *dev, Error **errp) 213 { 214 SLNANDState *s = SL_NAND(dev); 215 DriveInfo *nand; 216 217 /* FIXME use a qdev drive property instead of drive_get() */ 218 nand = drive_get(IF_MTD, 0, 0); 219 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, 220 s->manf_id, s->chip_id); 221 } 222 223 /* Spitz Keyboard */ 224 225 #define SPITZ_KEY_STROBE_NUM 11 226 #define SPITZ_KEY_SENSE_NUM 7 227 228 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { 229 12, 17, 91, 34, 36, 38, 39 230 }; 231 232 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { 233 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 234 }; 235 236 /* Eighth additional row maps the special keys */ 237 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { 238 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, 239 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, 240 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, 241 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, 242 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, 243 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, 244 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, 245 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, 246 }; 247 248 #define SPITZ_GPIO_AK_INT 13 /* Remote control */ 249 #define SPITZ_GPIO_SYNC 16 /* Sync button */ 250 #define SPITZ_GPIO_ON_KEY 95 /* Power button */ 251 #define SPITZ_GPIO_SWA 97 /* Lid */ 252 #define SPITZ_GPIO_SWB 96 /* Tablet mode */ 253 254 /* The special buttons are mapped to unused keys */ 255 static const int spitz_gpiomap[5] = { 256 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, 257 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, 258 }; 259 260 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" 261 OBJECT_DECLARE_SIMPLE_TYPE(SpitzKeyboardState, SPITZ_KEYBOARD) 262 263 struct SpitzKeyboardState { 264 SysBusDevice parent_obj; 265 266 qemu_irq sense[SPITZ_KEY_SENSE_NUM]; 267 qemu_irq gpiomap[5]; 268 int keymap[0x80]; 269 uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; 270 uint16_t strobe_state; 271 uint16_t sense_state; 272 273 uint16_t pre_map[0x100]; 274 uint16_t modifiers; 275 uint16_t imodifiers; 276 uint8_t fifo[16]; 277 int fifopos, fifolen; 278 QEMUTimer *kbdtimer; 279 }; 280 281 static void spitz_keyboard_sense_update(SpitzKeyboardState *s) 282 { 283 int i; 284 uint16_t strobe, sense = 0; 285 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { 286 strobe = s->keyrow[i] & s->strobe_state; 287 if (strobe) { 288 sense |= 1 << i; 289 if (!(s->sense_state & (1 << i))) 290 qemu_irq_raise(s->sense[i]); 291 } else if (s->sense_state & (1 << i)) 292 qemu_irq_lower(s->sense[i]); 293 } 294 295 s->sense_state = sense; 296 } 297 298 static void spitz_keyboard_strobe(void *opaque, int line, int level) 299 { 300 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 301 302 if (level) 303 s->strobe_state |= 1 << line; 304 else 305 s->strobe_state &= ~(1 << line); 306 spitz_keyboard_sense_update(s); 307 } 308 309 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) 310 { 311 int spitz_keycode = s->keymap[keycode & 0x7f]; 312 if (spitz_keycode == -1) 313 return; 314 315 /* Handle the additional keys */ 316 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { 317 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); 318 return; 319 } 320 321 if (keycode & 0x80) 322 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); 323 else 324 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); 325 326 spitz_keyboard_sense_update(s); 327 } 328 329 #define SPITZ_MOD_SHIFT (1 << 7) 330 #define SPITZ_MOD_CTRL (1 << 8) 331 #define SPITZ_MOD_FN (1 << 9) 332 333 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c 334 335 static void spitz_keyboard_handler(void *opaque, int keycode) 336 { 337 SpitzKeyboardState *s = opaque; 338 uint16_t code; 339 int mapcode; 340 switch (keycode) { 341 case 0x2a: /* Left Shift */ 342 s->modifiers |= 1; 343 break; 344 case 0xaa: 345 s->modifiers &= ~1; 346 break; 347 case 0x36: /* Right Shift */ 348 s->modifiers |= 2; 349 break; 350 case 0xb6: 351 s->modifiers &= ~2; 352 break; 353 case 0x1d: /* Control */ 354 s->modifiers |= 4; 355 break; 356 case 0x9d: 357 s->modifiers &= ~4; 358 break; 359 case 0x38: /* Alt */ 360 s->modifiers |= 8; 361 break; 362 case 0xb8: 363 s->modifiers &= ~8; 364 break; 365 } 366 367 code = s->pre_map[mapcode = ((s->modifiers & 3) ? 368 (keycode | SPITZ_MOD_SHIFT) : 369 (keycode & ~SPITZ_MOD_SHIFT))]; 370 371 if (code != mapcode) { 372 #if 0 373 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { 374 QUEUE_KEY(0x2a | (keycode & 0x80)); 375 } 376 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { 377 QUEUE_KEY(0x1d | (keycode & 0x80)); 378 } 379 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { 380 QUEUE_KEY(0x38 | (keycode & 0x80)); 381 } 382 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { 383 QUEUE_KEY(0x2a | (~keycode & 0x80)); 384 } 385 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { 386 QUEUE_KEY(0x36 | (~keycode & 0x80)); 387 } 388 #else 389 if (keycode & 0x80) { 390 if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) 391 QUEUE_KEY(0x2a | 0x80); 392 if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) 393 QUEUE_KEY(0x1d | 0x80); 394 if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) 395 QUEUE_KEY(0x38 | 0x80); 396 if ((s->imodifiers & 0x10) && (s->modifiers & 1)) 397 QUEUE_KEY(0x2a); 398 if ((s->imodifiers & 0x20) && (s->modifiers & 2)) 399 QUEUE_KEY(0x36); 400 s->imodifiers = 0; 401 } else { 402 if ((code & SPITZ_MOD_SHIFT) && 403 !((s->modifiers | s->imodifiers) & 1)) { 404 QUEUE_KEY(0x2a); 405 s->imodifiers |= 1; 406 } 407 if ((code & SPITZ_MOD_CTRL) && 408 !((s->modifiers | s->imodifiers) & 4)) { 409 QUEUE_KEY(0x1d); 410 s->imodifiers |= 4; 411 } 412 if ((code & SPITZ_MOD_FN) && 413 !((s->modifiers | s->imodifiers) & 8)) { 414 QUEUE_KEY(0x38); 415 s->imodifiers |= 8; 416 } 417 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && 418 !(s->imodifiers & 0x10)) { 419 QUEUE_KEY(0x2a | 0x80); 420 s->imodifiers |= 0x10; 421 } 422 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && 423 !(s->imodifiers & 0x20)) { 424 QUEUE_KEY(0x36 | 0x80); 425 s->imodifiers |= 0x20; 426 } 427 } 428 #endif 429 } 430 431 QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); 432 } 433 434 static void spitz_keyboard_tick(void *opaque) 435 { 436 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 437 438 if (s->fifolen) { 439 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); 440 s->fifolen --; 441 if (s->fifopos >= 16) 442 s->fifopos = 0; 443 } 444 445 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 446 NANOSECONDS_PER_SECOND / 32); 447 } 448 449 static void spitz_keyboard_pre_map(SpitzKeyboardState *s) 450 { 451 int i; 452 for (i = 0; i < 0x100; i ++) 453 s->pre_map[i] = i; 454 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ 455 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ 456 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ 457 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ 458 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ 459 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ 460 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ 461 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ 462 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ 463 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ 464 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ 465 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ 466 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ 467 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ 468 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ 469 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ 470 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ 471 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ 472 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ 473 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ 474 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ 475 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ 476 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ 477 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ 478 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ 479 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ 480 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ 481 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ 482 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ 483 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ 484 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ 485 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ 486 487 s->modifiers = 0; 488 s->imodifiers = 0; 489 s->fifopos = 0; 490 s->fifolen = 0; 491 } 492 493 #undef SPITZ_MOD_SHIFT 494 #undef SPITZ_MOD_CTRL 495 #undef SPITZ_MOD_FN 496 497 static int spitz_keyboard_post_load(void *opaque, int version_id) 498 { 499 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 500 501 /* Release all pressed keys */ 502 memset(s->keyrow, 0, sizeof(s->keyrow)); 503 spitz_keyboard_sense_update(s); 504 s->modifiers = 0; 505 s->imodifiers = 0; 506 s->fifopos = 0; 507 s->fifolen = 0; 508 509 return 0; 510 } 511 512 static void spitz_keyboard_register(PXA2xxState *cpu) 513 { 514 int i; 515 DeviceState *dev; 516 SpitzKeyboardState *s; 517 518 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); 519 s = SPITZ_KEYBOARD(dev); 520 521 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) 522 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); 523 524 for (i = 0; i < 5; i ++) 525 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); 526 527 if (!graphic_rotate) 528 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); 529 530 for (i = 0; i < 5; i++) 531 qemu_set_irq(s->gpiomap[i], 0); 532 533 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) 534 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], 535 qdev_get_gpio_in(dev, i)); 536 537 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 538 539 qemu_add_kbd_event_handler(spitz_keyboard_handler, s); 540 } 541 542 static void spitz_keyboard_init(Object *obj) 543 { 544 DeviceState *dev = DEVICE(obj); 545 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj); 546 int i, j; 547 548 for (i = 0; i < 0x80; i ++) 549 s->keymap[i] = -1; 550 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) 551 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) 552 if (spitz_keymap[i][j] != -1) 553 s->keymap[spitz_keymap[i][j]] = (i << 4) | j; 554 555 spitz_keyboard_pre_map(s); 556 557 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); 558 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); 559 } 560 561 static void spitz_keyboard_realize(DeviceState *dev, Error **errp) 562 { 563 SpitzKeyboardState *s = SPITZ_KEYBOARD(dev); 564 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); 565 } 566 567 /* LCD backlight controller */ 568 569 #define LCDTG_RESCTL 0x00 570 #define LCDTG_PHACTRL 0x01 571 #define LCDTG_DUTYCTRL 0x02 572 #define LCDTG_POWERREG0 0x03 573 #define LCDTG_POWERREG1 0x04 574 #define LCDTG_GPOR3 0x05 575 #define LCDTG_PICTRL 0x06 576 #define LCDTG_POLCTRL 0x07 577 578 #define TYPE_SPITZ_LCDTG "spitz-lcdtg" 579 OBJECT_DECLARE_SIMPLE_TYPE(SpitzLCDTG, SPITZ_LCDTG) 580 581 struct SpitzLCDTG { 582 SSIPeripheral ssidev; 583 uint32_t bl_intensity; 584 uint32_t bl_power; 585 }; 586 587 static void spitz_bl_update(SpitzLCDTG *s) 588 { 589 if (s->bl_power && s->bl_intensity) 590 zaurus_printf("LCD Backlight now at %u/63\n", s->bl_intensity); 591 else 592 zaurus_printf("LCD Backlight now off\n"); 593 } 594 595 static inline void spitz_bl_bit5(void *opaque, int line, int level) 596 { 597 SpitzLCDTG *s = opaque; 598 int prev = s->bl_intensity; 599 600 if (level) 601 s->bl_intensity &= ~0x20; 602 else 603 s->bl_intensity |= 0x20; 604 605 if (s->bl_power && prev != s->bl_intensity) 606 spitz_bl_update(s); 607 } 608 609 static inline void spitz_bl_power(void *opaque, int line, int level) 610 { 611 SpitzLCDTG *s = opaque; 612 s->bl_power = !!level; 613 spitz_bl_update(s); 614 } 615 616 static uint32_t spitz_lcdtg_transfer(SSIPeripheral *dev, uint32_t value) 617 { 618 SpitzLCDTG *s = SPITZ_LCDTG(dev); 619 int addr; 620 addr = value >> 5; 621 value &= 0x1f; 622 623 switch (addr) { 624 case LCDTG_RESCTL: 625 if (value) 626 zaurus_printf("LCD in QVGA mode\n"); 627 else 628 zaurus_printf("LCD in VGA mode\n"); 629 break; 630 631 case LCDTG_DUTYCTRL: 632 s->bl_intensity &= ~0x1f; 633 s->bl_intensity |= value; 634 if (s->bl_power) 635 spitz_bl_update(s); 636 break; 637 638 case LCDTG_POWERREG0: 639 /* Set common voltage to M62332FP */ 640 break; 641 } 642 return 0; 643 } 644 645 static void spitz_lcdtg_realize(SSIPeripheral *ssi, Error **errp) 646 { 647 SpitzLCDTG *s = SPITZ_LCDTG(ssi); 648 DeviceState *dev = DEVICE(s); 649 650 s->bl_power = 0; 651 s->bl_intensity = 0x20; 652 653 qdev_init_gpio_in_named(dev, spitz_bl_bit5, "bl_bit5", 1); 654 qdev_init_gpio_in_named(dev, spitz_bl_power, "bl_power", 1); 655 } 656 657 /* SSP devices */ 658 659 #define CORGI_SSP_PORT 2 660 661 #define SPITZ_GPIO_LCDCON_CS 53 662 #define SPITZ_GPIO_ADS7846_CS 14 663 #define SPITZ_GPIO_MAX1111_CS 20 664 #define SPITZ_GPIO_TP_INT 11 665 666 #define TYPE_CORGI_SSP "corgi-ssp" 667 OBJECT_DECLARE_SIMPLE_TYPE(CorgiSSPState, CORGI_SSP) 668 669 /* "Demux" the signal based on current chipselect */ 670 struct CorgiSSPState { 671 SSIPeripheral ssidev; 672 SSIBus *bus[3]; 673 uint32_t enable[3]; 674 }; 675 676 static uint32_t corgi_ssp_transfer(SSIPeripheral *dev, uint32_t value) 677 { 678 CorgiSSPState *s = CORGI_SSP(dev); 679 int i; 680 681 for (i = 0; i < 3; i++) { 682 if (s->enable[i]) { 683 return ssi_transfer(s->bus[i], value); 684 } 685 } 686 return 0; 687 } 688 689 static void corgi_ssp_gpio_cs(void *opaque, int line, int level) 690 { 691 CorgiSSPState *s = (CorgiSSPState *)opaque; 692 assert(line >= 0 && line < 3); 693 s->enable[line] = !level; 694 } 695 696 #define MAX1111_BATT_VOLT 1 697 #define MAX1111_BATT_TEMP 2 698 #define MAX1111_ACIN_VOLT 3 699 700 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ 701 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ 702 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ 703 704 static void corgi_ssp_realize(SSIPeripheral *d, Error **errp) 705 { 706 DeviceState *dev = DEVICE(d); 707 CorgiSSPState *s = CORGI_SSP(d); 708 709 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); 710 s->bus[0] = ssi_create_bus(dev, "ssi0"); 711 s->bus[1] = ssi_create_bus(dev, "ssi1"); 712 s->bus[2] = ssi_create_bus(dev, "ssi2"); 713 } 714 715 static void spitz_ssp_attach(SpitzMachineState *sms) 716 { 717 void *bus; 718 719 sms->mux = ssi_create_peripheral(sms->mpu->ssp[CORGI_SSP_PORT - 1], 720 TYPE_CORGI_SSP); 721 722 bus = qdev_get_child_bus(sms->mux, "ssi0"); 723 sms->lcdtg = ssi_create_peripheral(bus, TYPE_SPITZ_LCDTG); 724 725 bus = qdev_get_child_bus(sms->mux, "ssi1"); 726 sms->ads7846 = ssi_create_peripheral(bus, "ads7846"); 727 qdev_connect_gpio_out(sms->ads7846, 0, 728 qdev_get_gpio_in(sms->mpu->gpio, SPITZ_GPIO_TP_INT)); 729 730 bus = qdev_get_child_bus(sms->mux, "ssi2"); 731 sms->max1111 = qdev_new(TYPE_MAX_1111); 732 qdev_prop_set_uint8(sms->max1111, "input1" /* BATT_VOLT */, 733 SPITZ_BATTERY_VOLT); 734 qdev_prop_set_uint8(sms->max1111, "input2" /* BATT_TEMP */, 0); 735 qdev_prop_set_uint8(sms->max1111, "input3" /* ACIN_VOLT */, 736 SPITZ_CHARGEON_ACIN); 737 ssi_realize_and_unref(sms->max1111, bus, &error_fatal); 738 739 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS, 740 qdev_get_gpio_in(sms->mux, 0)); 741 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS, 742 qdev_get_gpio_in(sms->mux, 1)); 743 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS, 744 qdev_get_gpio_in(sms->mux, 2)); 745 } 746 747 /* CF Microdrive */ 748 749 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) 750 { 751 PCMCIACardState *md; 752 DriveInfo *dinfo; 753 754 dinfo = drive_get(IF_IDE, 0, 0); 755 if (!dinfo || dinfo->media_cd) 756 return; 757 md = dscm1xxxx_init(dinfo); 758 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); 759 } 760 761 /* Wm8750 and Max7310 on I2C */ 762 763 #define AKITA_MAX_ADDR 0x18 764 #define SPITZ_WM_ADDRL 0x1b 765 #define SPITZ_WM_ADDRH 0x1a 766 767 #define SPITZ_GPIO_WM 5 768 769 static void spitz_wm8750_addr(void *opaque, int line, int level) 770 { 771 I2CSlave *wm = (I2CSlave *) opaque; 772 if (level) 773 i2c_slave_set_address(wm, SPITZ_WM_ADDRH); 774 else 775 i2c_slave_set_address(wm, SPITZ_WM_ADDRL); 776 } 777 778 static void spitz_i2c_setup(MachineState *machine, PXA2xxState *cpu) 779 { 780 /* Attach the CPU on one end of our I2C bus. */ 781 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); 782 783 /* Attach a WM8750 to the bus */ 784 I2CSlave *i2c_dev = i2c_slave_new(TYPE_WM8750, 0); 785 DeviceState *wm = DEVICE(i2c_dev); 786 787 if (machine->audiodev) { 788 qdev_prop_set_string(wm, "audiodev", machine->audiodev); 789 } 790 i2c_slave_realize_and_unref(i2c_dev, bus, &error_abort); 791 792 spitz_wm8750_addr(wm, 0, 0); 793 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, 794 qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); 795 /* .. and to the sound interface. */ 796 cpu->i2s->opaque = wm; 797 cpu->i2s->codec_out = wm8750_dac_dat; 798 cpu->i2s->codec_in = wm8750_adc_dat; 799 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); 800 } 801 802 static void spitz_akita_i2c_setup(PXA2xxState *cpu) 803 { 804 /* Attach a Max7310 to Akita I2C bus. */ 805 i2c_slave_create_simple(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", 806 AKITA_MAX_ADDR); 807 } 808 809 /* Other peripherals */ 810 811 /* 812 * Encapsulation of some miscellaneous GPIO line behaviour for the Spitz boards. 813 * 814 * QEMU interface: 815 * + named GPIO inputs "green-led", "orange-led", "charging", "discharging": 816 * these currently just print messages that the line has been signalled 817 * + named GPIO input "adc-temp-on": set to cause the battery-temperature 818 * value to be passed to the max111x ADC 819 * + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x 820 */ 821 #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio" 822 OBJECT_DECLARE_SIMPLE_TYPE(SpitzMiscGPIOState, SPITZ_MISC_GPIO) 823 824 struct SpitzMiscGPIOState { 825 SysBusDevice parent_obj; 826 827 qemu_irq adc_value; 828 }; 829 830 static void spitz_misc_charging(void *opaque, int n, int level) 831 { 832 zaurus_printf("Charging %s.\n", level ? "off" : "on"); 833 } 834 835 static void spitz_misc_discharging(void *opaque, int n, int level) 836 { 837 zaurus_printf("Discharging %s.\n", level ? "off" : "on"); 838 } 839 840 static void spitz_misc_green_led(void *opaque, int n, int level) 841 { 842 zaurus_printf("Green LED %s.\n", level ? "off" : "on"); 843 } 844 845 static void spitz_misc_orange_led(void *opaque, int n, int level) 846 { 847 zaurus_printf("Orange LED %s.\n", level ? "off" : "on"); 848 } 849 850 static void spitz_misc_adc_temp(void *opaque, int n, int level) 851 { 852 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(opaque); 853 int batt_temp = level ? SPITZ_BATTERY_TEMP : 0; 854 855 qemu_set_irq(s->adc_value, batt_temp); 856 } 857 858 static void spitz_misc_gpio_init(Object *obj) 859 { 860 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(obj); 861 DeviceState *dev = DEVICE(obj); 862 863 qdev_init_gpio_in_named(dev, spitz_misc_charging, "charging", 1); 864 qdev_init_gpio_in_named(dev, spitz_misc_discharging, "discharging", 1); 865 qdev_init_gpio_in_named(dev, spitz_misc_green_led, "green-led", 1); 866 qdev_init_gpio_in_named(dev, spitz_misc_orange_led, "orange-led", 1); 867 qdev_init_gpio_in_named(dev, spitz_misc_adc_temp, "adc-temp-on", 1); 868 869 qdev_init_gpio_out_named(dev, &s->adc_value, "adc-temp", 1); 870 } 871 872 #define SPITZ_SCP_LED_GREEN 1 873 #define SPITZ_SCP_JK_B 2 874 #define SPITZ_SCP_CHRG_ON 3 875 #define SPITZ_SCP_MUTE_L 4 876 #define SPITZ_SCP_MUTE_R 5 877 #define SPITZ_SCP_CF_POWER 6 878 #define SPITZ_SCP_LED_ORANGE 7 879 #define SPITZ_SCP_JK_A 8 880 #define SPITZ_SCP_ADC_TEMP_ON 9 881 #define SPITZ_SCP2_IR_ON 1 882 #define SPITZ_SCP2_AKIN_PULLUP 2 883 #define SPITZ_SCP2_BACKLIGHT_CONT 7 884 #define SPITZ_SCP2_BACKLIGHT_ON 8 885 #define SPITZ_SCP2_MIC_BIAS 9 886 887 static void spitz_scoop_gpio_setup(SpitzMachineState *sms) 888 { 889 DeviceState *miscdev = sysbus_create_simple(TYPE_SPITZ_MISC_GPIO, -1, NULL); 890 891 sms->misc_gpio = miscdev; 892 893 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_CHRG_ON, 894 qdev_get_gpio_in_named(miscdev, "charging", 0)); 895 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_JK_B, 896 qdev_get_gpio_in_named(miscdev, "discharging", 0)); 897 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_GREEN, 898 qdev_get_gpio_in_named(miscdev, "green-led", 0)); 899 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_ORANGE, 900 qdev_get_gpio_in_named(miscdev, "orange-led", 0)); 901 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_ADC_TEMP_ON, 902 qdev_get_gpio_in_named(miscdev, "adc-temp-on", 0)); 903 qdev_connect_gpio_out_named(miscdev, "adc-temp", 0, 904 qdev_get_gpio_in(sms->max1111, MAX1111_BATT_TEMP)); 905 906 if (sms->scp1) { 907 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_CONT, 908 qdev_get_gpio_in_named(sms->lcdtg, "bl_bit5", 0)); 909 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_ON, 910 qdev_get_gpio_in_named(sms->lcdtg, "bl_power", 0)); 911 } 912 } 913 914 #define SPITZ_GPIO_HSYNC 22 915 #define SPITZ_GPIO_SD_DETECT 9 916 #define SPITZ_GPIO_SD_WP 81 917 #define SPITZ_GPIO_ON_RESET 89 918 #define SPITZ_GPIO_BAT_COVER 90 919 #define SPITZ_GPIO_CF1_IRQ 105 920 #define SPITZ_GPIO_CF1_CD 94 921 #define SPITZ_GPIO_CF2_IRQ 106 922 #define SPITZ_GPIO_CF2_CD 93 923 924 static int spitz_hsync; 925 926 static void spitz_lcd_hsync_handler(void *opaque, int line, int level) 927 { 928 PXA2xxState *cpu = (PXA2xxState *) opaque; 929 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); 930 spitz_hsync ^= 1; 931 } 932 933 static void spitz_reset(void *opaque, int line, int level) 934 { 935 if (level) { 936 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 937 } 938 } 939 940 static void spitz_gpio_setup(PXA2xxState *cpu, int slots) 941 { 942 qemu_irq lcd_hsync; 943 qemu_irq reset; 944 945 /* 946 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status 947 * read to satisfy broken guests that poll-wait for hsync. 948 * Simulating a real hsync event would be less practical and 949 * wouldn't guarantee that a guest ever exits the loop. 950 */ 951 spitz_hsync = 0; 952 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); 953 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); 954 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); 955 956 /* MMC/SD host */ 957 pxa2xx_mmci_handlers(cpu->mmc, 958 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), 959 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); 960 961 /* Battery lock always closed */ 962 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); 963 964 /* Handle reset */ 965 reset = qemu_allocate_irq(spitz_reset, cpu, 0); 966 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset); 967 968 /* PCMCIA signals: card's IRQ and Card-Detect */ 969 if (slots >= 1) 970 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], 971 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), 972 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); 973 if (slots >= 2) 974 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], 975 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), 976 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); 977 } 978 979 /* Board init. */ 980 #define SPITZ_RAM 0x04000000 981 #define SPITZ_ROM 0x00800000 982 983 static struct arm_boot_info spitz_binfo = { 984 .loader_start = PXA2XX_SDRAM_BASE, 985 .ram_size = 0x04000000, 986 }; 987 988 static void spitz_common_init(MachineState *machine) 989 { 990 SpitzMachineClass *smc = SPITZ_MACHINE_GET_CLASS(machine); 991 SpitzMachineState *sms = SPITZ_MACHINE(machine); 992 enum spitz_model_e model = smc->model; 993 PXA2xxState *mpu; 994 MemoryRegion *rom = g_new(MemoryRegion, 1); 995 996 /* Setup CPU & memory */ 997 mpu = pxa270_init(spitz_binfo.ram_size, machine->cpu_type); 998 sms->mpu = mpu; 999 1000 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); 1001 1002 memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); 1003 memory_region_add_subregion(get_system_memory(), 0, rom); 1004 1005 /* Setup peripherals */ 1006 spitz_keyboard_register(mpu); 1007 1008 spitz_ssp_attach(sms); 1009 1010 sms->scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); 1011 if (model != akita) { 1012 sms->scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); 1013 } else { 1014 sms->scp1 = NULL; 1015 } 1016 1017 spitz_scoop_gpio_setup(sms); 1018 1019 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); 1020 1021 spitz_i2c_setup(machine, mpu); 1022 1023 if (model == akita) 1024 spitz_akita_i2c_setup(mpu); 1025 1026 if (model == terrier) 1027 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ 1028 spitz_microdrive_attach(mpu, 1); 1029 else if (model != akita) 1030 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ 1031 spitz_microdrive_attach(mpu, 0); 1032 1033 spitz_binfo.board_id = smc->arm_id; 1034 arm_load_kernel(mpu->cpu, machine, &spitz_binfo); 1035 sl_bootparam_write(SL_PXA_PARAM_BASE); 1036 } 1037 1038 static void spitz_common_class_init(ObjectClass *oc, void *data) 1039 { 1040 MachineClass *mc = MACHINE_CLASS(oc); 1041 1042 mc->block_default_type = IF_IDE; 1043 mc->ignore_memory_transaction_failures = true; 1044 mc->init = spitz_common_init; 1045 1046 machine_add_audiodev_property(mc); 1047 } 1048 1049 static const TypeInfo spitz_common_info = { 1050 .name = TYPE_SPITZ_MACHINE, 1051 .parent = TYPE_MACHINE, 1052 .abstract = true, 1053 .instance_size = sizeof(SpitzMachineState), 1054 .class_size = sizeof(SpitzMachineClass), 1055 .class_init = spitz_common_class_init, 1056 }; 1057 1058 static void akitapda_class_init(ObjectClass *oc, void *data) 1059 { 1060 MachineClass *mc = MACHINE_CLASS(oc); 1061 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1062 1063 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; 1064 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1065 smc->model = akita; 1066 smc->arm_id = 0x2e8; 1067 } 1068 1069 static const TypeInfo akitapda_type = { 1070 .name = MACHINE_TYPE_NAME("akita"), 1071 .parent = TYPE_SPITZ_MACHINE, 1072 .class_init = akitapda_class_init, 1073 }; 1074 1075 static void spitzpda_class_init(ObjectClass *oc, void *data) 1076 { 1077 MachineClass *mc = MACHINE_CLASS(oc); 1078 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1079 1080 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; 1081 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1082 smc->model = spitz; 1083 smc->arm_id = 0x2c9; 1084 } 1085 1086 static const TypeInfo spitzpda_type = { 1087 .name = MACHINE_TYPE_NAME("spitz"), 1088 .parent = TYPE_SPITZ_MACHINE, 1089 .class_init = spitzpda_class_init, 1090 }; 1091 1092 static void borzoipda_class_init(ObjectClass *oc, void *data) 1093 { 1094 MachineClass *mc = MACHINE_CLASS(oc); 1095 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1096 1097 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; 1098 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1099 smc->model = borzoi; 1100 smc->arm_id = 0x33f; 1101 } 1102 1103 static const TypeInfo borzoipda_type = { 1104 .name = MACHINE_TYPE_NAME("borzoi"), 1105 .parent = TYPE_SPITZ_MACHINE, 1106 .class_init = borzoipda_class_init, 1107 }; 1108 1109 static void terrierpda_class_init(ObjectClass *oc, void *data) 1110 { 1111 MachineClass *mc = MACHINE_CLASS(oc); 1112 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1113 1114 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; 1115 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5"); 1116 smc->model = terrier; 1117 smc->arm_id = 0x33f; 1118 } 1119 1120 static const TypeInfo terrierpda_type = { 1121 .name = MACHINE_TYPE_NAME("terrier"), 1122 .parent = TYPE_SPITZ_MACHINE, 1123 .class_init = terrierpda_class_init, 1124 }; 1125 1126 static void spitz_machine_init(void) 1127 { 1128 type_register_static(&spitz_common_info); 1129 type_register_static(&akitapda_type); 1130 type_register_static(&spitzpda_type); 1131 type_register_static(&borzoipda_type); 1132 type_register_static(&terrierpda_type); 1133 } 1134 1135 type_init(spitz_machine_init) 1136 1137 static bool is_version_0(void *opaque, int version_id) 1138 { 1139 return version_id == 0; 1140 } 1141 1142 static const VMStateDescription vmstate_sl_nand_info = { 1143 .name = "sl-nand", 1144 .version_id = 0, 1145 .minimum_version_id = 0, 1146 .fields = (VMStateField[]) { 1147 VMSTATE_UINT8(ctl, SLNANDState), 1148 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), 1149 VMSTATE_END_OF_LIST(), 1150 }, 1151 }; 1152 1153 static Property sl_nand_properties[] = { 1154 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), 1155 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), 1156 DEFINE_PROP_END_OF_LIST(), 1157 }; 1158 1159 static void sl_nand_class_init(ObjectClass *klass, void *data) 1160 { 1161 DeviceClass *dc = DEVICE_CLASS(klass); 1162 1163 dc->vmsd = &vmstate_sl_nand_info; 1164 device_class_set_props(dc, sl_nand_properties); 1165 dc->realize = sl_nand_realize; 1166 /* Reason: init() method uses drive_get() */ 1167 dc->user_creatable = false; 1168 } 1169 1170 static const TypeInfo sl_nand_info = { 1171 .name = TYPE_SL_NAND, 1172 .parent = TYPE_SYS_BUS_DEVICE, 1173 .instance_size = sizeof(SLNANDState), 1174 .instance_init = sl_nand_init, 1175 .class_init = sl_nand_class_init, 1176 }; 1177 1178 static const VMStateDescription vmstate_spitz_kbd = { 1179 .name = "spitz-keyboard", 1180 .version_id = 1, 1181 .minimum_version_id = 0, 1182 .post_load = spitz_keyboard_post_load, 1183 .fields = (VMStateField[]) { 1184 VMSTATE_UINT16(sense_state, SpitzKeyboardState), 1185 VMSTATE_UINT16(strobe_state, SpitzKeyboardState), 1186 VMSTATE_UNUSED_TEST(is_version_0, 5), 1187 VMSTATE_END_OF_LIST(), 1188 }, 1189 }; 1190 1191 static void spitz_keyboard_class_init(ObjectClass *klass, void *data) 1192 { 1193 DeviceClass *dc = DEVICE_CLASS(klass); 1194 1195 dc->vmsd = &vmstate_spitz_kbd; 1196 dc->realize = spitz_keyboard_realize; 1197 } 1198 1199 static const TypeInfo spitz_keyboard_info = { 1200 .name = TYPE_SPITZ_KEYBOARD, 1201 .parent = TYPE_SYS_BUS_DEVICE, 1202 .instance_size = sizeof(SpitzKeyboardState), 1203 .instance_init = spitz_keyboard_init, 1204 .class_init = spitz_keyboard_class_init, 1205 }; 1206 1207 static const VMStateDescription vmstate_corgi_ssp_regs = { 1208 .name = "corgi-ssp", 1209 .version_id = 2, 1210 .minimum_version_id = 2, 1211 .fields = (VMStateField[]) { 1212 VMSTATE_SSI_PERIPHERAL(ssidev, CorgiSSPState), 1213 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), 1214 VMSTATE_END_OF_LIST(), 1215 } 1216 }; 1217 1218 static void corgi_ssp_class_init(ObjectClass *klass, void *data) 1219 { 1220 DeviceClass *dc = DEVICE_CLASS(klass); 1221 SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass); 1222 1223 k->realize = corgi_ssp_realize; 1224 k->transfer = corgi_ssp_transfer; 1225 dc->vmsd = &vmstate_corgi_ssp_regs; 1226 } 1227 1228 static const TypeInfo corgi_ssp_info = { 1229 .name = TYPE_CORGI_SSP, 1230 .parent = TYPE_SSI_PERIPHERAL, 1231 .instance_size = sizeof(CorgiSSPState), 1232 .class_init = corgi_ssp_class_init, 1233 }; 1234 1235 static const VMStateDescription vmstate_spitz_lcdtg_regs = { 1236 .name = "spitz-lcdtg", 1237 .version_id = 1, 1238 .minimum_version_id = 1, 1239 .fields = (VMStateField[]) { 1240 VMSTATE_SSI_PERIPHERAL(ssidev, SpitzLCDTG), 1241 VMSTATE_UINT32(bl_intensity, SpitzLCDTG), 1242 VMSTATE_UINT32(bl_power, SpitzLCDTG), 1243 VMSTATE_END_OF_LIST(), 1244 } 1245 }; 1246 1247 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) 1248 { 1249 DeviceClass *dc = DEVICE_CLASS(klass); 1250 SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass); 1251 1252 k->realize = spitz_lcdtg_realize; 1253 k->transfer = spitz_lcdtg_transfer; 1254 dc->vmsd = &vmstate_spitz_lcdtg_regs; 1255 } 1256 1257 static const TypeInfo spitz_lcdtg_info = { 1258 .name = TYPE_SPITZ_LCDTG, 1259 .parent = TYPE_SSI_PERIPHERAL, 1260 .instance_size = sizeof(SpitzLCDTG), 1261 .class_init = spitz_lcdtg_class_init, 1262 }; 1263 1264 static const TypeInfo spitz_misc_gpio_info = { 1265 .name = TYPE_SPITZ_MISC_GPIO, 1266 .parent = TYPE_SYS_BUS_DEVICE, 1267 .instance_size = sizeof(SpitzMiscGPIOState), 1268 .instance_init = spitz_misc_gpio_init, 1269 /* 1270 * No class_init required: device has no internal state so does not 1271 * need to set up reset or vmstate, and does not have a realize method. 1272 */ 1273 }; 1274 1275 static void spitz_register_types(void) 1276 { 1277 type_register_static(&corgi_ssp_info); 1278 type_register_static(&spitz_lcdtg_info); 1279 type_register_static(&spitz_keyboard_info); 1280 type_register_static(&sl_nand_info); 1281 type_register_static(&spitz_misc_gpio_info); 1282 } 1283 1284 type_init(spitz_register_types) 1285