1 /* 2 * PXA270-based Clamshell PDA platforms. 3 * 4 * Copyright (c) 2006 Openedhand Ltd. 5 * Written by Andrzej Zaborowski <balrog@zabor.org> 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qapi/error.h" 15 #include "hw/hw.h" 16 #include "hw/arm/pxa.h" 17 #include "hw/arm/boot.h" 18 #include "sysemu/sysemu.h" 19 #include "hw/pcmcia.h" 20 #include "hw/i2c/i2c.h" 21 #include "hw/ssi/ssi.h" 22 #include "hw/block/flash.h" 23 #include "qemu/timer.h" 24 #include "hw/arm/sharpsl.h" 25 #include "ui/console.h" 26 #include "hw/audio/wm8750.h" 27 #include "audio/audio.h" 28 #include "hw/boards.h" 29 #include "hw/sysbus.h" 30 #include "exec/address-spaces.h" 31 #include "cpu.h" 32 33 #undef REG_FMT 34 #define REG_FMT "0x%02lx" 35 36 /* Spitz Flash */ 37 #define FLASH_BASE 0x0c000000 38 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ 39 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ 40 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ 41 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ 42 #define FLASH_ECCCLRR 0x10 /* Clear ECC */ 43 #define FLASH_FLASHIO 0x14 /* Flash I/O */ 44 #define FLASH_FLASHCTL 0x18 /* Flash Control */ 45 46 #define FLASHCTL_CE0 (1 << 0) 47 #define FLASHCTL_CLE (1 << 1) 48 #define FLASHCTL_ALE (1 << 2) 49 #define FLASHCTL_WP (1 << 3) 50 #define FLASHCTL_CE1 (1 << 4) 51 #define FLASHCTL_RYBY (1 << 5) 52 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) 53 54 #define TYPE_SL_NAND "sl-nand" 55 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND) 56 57 typedef struct { 58 SysBusDevice parent_obj; 59 60 MemoryRegion iomem; 61 DeviceState *nand; 62 uint8_t ctl; 63 uint8_t manf_id; 64 uint8_t chip_id; 65 ECCState ecc; 66 } SLNANDState; 67 68 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) 69 { 70 SLNANDState *s = (SLNANDState *) opaque; 71 int ryby; 72 73 switch (addr) { 74 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) 75 case FLASH_ECCLPLB: 76 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | 77 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); 78 79 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) 80 case FLASH_ECCLPUB: 81 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | 82 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); 83 84 case FLASH_ECCCP: 85 return s->ecc.cp; 86 87 case FLASH_ECCCNTR: 88 return s->ecc.count & 0xff; 89 90 case FLASH_FLASHCTL: 91 nand_getpins(s->nand, &ryby); 92 if (ryby) 93 return s->ctl | FLASHCTL_RYBY; 94 else 95 return s->ctl; 96 97 case FLASH_FLASHIO: 98 if (size == 4) { 99 return ecc_digest(&s->ecc, nand_getio(s->nand)) | 100 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); 101 } 102 return ecc_digest(&s->ecc, nand_getio(s->nand)); 103 104 default: 105 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); 106 } 107 return 0; 108 } 109 110 static void sl_write(void *opaque, hwaddr addr, 111 uint64_t value, unsigned size) 112 { 113 SLNANDState *s = (SLNANDState *) opaque; 114 115 switch (addr) { 116 case FLASH_ECCCLRR: 117 /* Value is ignored. */ 118 ecc_reset(&s->ecc); 119 break; 120 121 case FLASH_FLASHCTL: 122 s->ctl = value & 0xff & ~FLASHCTL_RYBY; 123 nand_setpins(s->nand, 124 s->ctl & FLASHCTL_CLE, 125 s->ctl & FLASHCTL_ALE, 126 s->ctl & FLASHCTL_NCE, 127 s->ctl & FLASHCTL_WP, 128 0); 129 break; 130 131 case FLASH_FLASHIO: 132 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); 133 break; 134 135 default: 136 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); 137 } 138 } 139 140 enum { 141 FLASH_128M, 142 FLASH_1024M, 143 }; 144 145 static const MemoryRegionOps sl_ops = { 146 .read = sl_read, 147 .write = sl_write, 148 .endianness = DEVICE_NATIVE_ENDIAN, 149 }; 150 151 static void sl_flash_register(PXA2xxState *cpu, int size) 152 { 153 DeviceState *dev; 154 155 dev = qdev_create(NULL, TYPE_SL_NAND); 156 157 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); 158 if (size == FLASH_128M) 159 qdev_prop_set_uint8(dev, "chip_id", 0x73); 160 else if (size == FLASH_1024M) 161 qdev_prop_set_uint8(dev, "chip_id", 0xf1); 162 163 qdev_init_nofail(dev); 164 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); 165 } 166 167 static void sl_nand_init(Object *obj) 168 { 169 SLNANDState *s = SL_NAND(obj); 170 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 171 172 s->ctl = 0; 173 174 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40); 175 sysbus_init_mmio(dev, &s->iomem); 176 } 177 178 static void sl_nand_realize(DeviceState *dev, Error **errp) 179 { 180 SLNANDState *s = SL_NAND(dev); 181 DriveInfo *nand; 182 183 /* FIXME use a qdev drive property instead of drive_get() */ 184 nand = drive_get(IF_MTD, 0, 0); 185 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, 186 s->manf_id, s->chip_id); 187 } 188 189 /* Spitz Keyboard */ 190 191 #define SPITZ_KEY_STROBE_NUM 11 192 #define SPITZ_KEY_SENSE_NUM 7 193 194 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { 195 12, 17, 91, 34, 36, 38, 39 196 }; 197 198 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { 199 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 200 }; 201 202 /* Eighth additional row maps the special keys */ 203 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { 204 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, 205 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, 206 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, 207 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, 208 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, 209 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, 210 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, 211 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, 212 }; 213 214 #define SPITZ_GPIO_AK_INT 13 /* Remote control */ 215 #define SPITZ_GPIO_SYNC 16 /* Sync button */ 216 #define SPITZ_GPIO_ON_KEY 95 /* Power button */ 217 #define SPITZ_GPIO_SWA 97 /* Lid */ 218 #define SPITZ_GPIO_SWB 96 /* Tablet mode */ 219 220 /* The special buttons are mapped to unused keys */ 221 static const int spitz_gpiomap[5] = { 222 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, 223 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, 224 }; 225 226 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" 227 #define SPITZ_KEYBOARD(obj) \ 228 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD) 229 230 typedef struct { 231 SysBusDevice parent_obj; 232 233 qemu_irq sense[SPITZ_KEY_SENSE_NUM]; 234 qemu_irq gpiomap[5]; 235 int keymap[0x80]; 236 uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; 237 uint16_t strobe_state; 238 uint16_t sense_state; 239 240 uint16_t pre_map[0x100]; 241 uint16_t modifiers; 242 uint16_t imodifiers; 243 uint8_t fifo[16]; 244 int fifopos, fifolen; 245 QEMUTimer *kbdtimer; 246 } SpitzKeyboardState; 247 248 static void spitz_keyboard_sense_update(SpitzKeyboardState *s) 249 { 250 int i; 251 uint16_t strobe, sense = 0; 252 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { 253 strobe = s->keyrow[i] & s->strobe_state; 254 if (strobe) { 255 sense |= 1 << i; 256 if (!(s->sense_state & (1 << i))) 257 qemu_irq_raise(s->sense[i]); 258 } else if (s->sense_state & (1 << i)) 259 qemu_irq_lower(s->sense[i]); 260 } 261 262 s->sense_state = sense; 263 } 264 265 static void spitz_keyboard_strobe(void *opaque, int line, int level) 266 { 267 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 268 269 if (level) 270 s->strobe_state |= 1 << line; 271 else 272 s->strobe_state &= ~(1 << line); 273 spitz_keyboard_sense_update(s); 274 } 275 276 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) 277 { 278 int spitz_keycode = s->keymap[keycode & 0x7f]; 279 if (spitz_keycode == -1) 280 return; 281 282 /* Handle the additional keys */ 283 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { 284 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); 285 return; 286 } 287 288 if (keycode & 0x80) 289 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); 290 else 291 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); 292 293 spitz_keyboard_sense_update(s); 294 } 295 296 #define SPITZ_MOD_SHIFT (1 << 7) 297 #define SPITZ_MOD_CTRL (1 << 8) 298 #define SPITZ_MOD_FN (1 << 9) 299 300 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c 301 302 static void spitz_keyboard_handler(void *opaque, int keycode) 303 { 304 SpitzKeyboardState *s = opaque; 305 uint16_t code; 306 int mapcode; 307 switch (keycode) { 308 case 0x2a: /* Left Shift */ 309 s->modifiers |= 1; 310 break; 311 case 0xaa: 312 s->modifiers &= ~1; 313 break; 314 case 0x36: /* Right Shift */ 315 s->modifiers |= 2; 316 break; 317 case 0xb6: 318 s->modifiers &= ~2; 319 break; 320 case 0x1d: /* Control */ 321 s->modifiers |= 4; 322 break; 323 case 0x9d: 324 s->modifiers &= ~4; 325 break; 326 case 0x38: /* Alt */ 327 s->modifiers |= 8; 328 break; 329 case 0xb8: 330 s->modifiers &= ~8; 331 break; 332 } 333 334 code = s->pre_map[mapcode = ((s->modifiers & 3) ? 335 (keycode | SPITZ_MOD_SHIFT) : 336 (keycode & ~SPITZ_MOD_SHIFT))]; 337 338 if (code != mapcode) { 339 #if 0 340 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { 341 QUEUE_KEY(0x2a | (keycode & 0x80)); 342 } 343 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { 344 QUEUE_KEY(0x1d | (keycode & 0x80)); 345 } 346 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { 347 QUEUE_KEY(0x38 | (keycode & 0x80)); 348 } 349 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { 350 QUEUE_KEY(0x2a | (~keycode & 0x80)); 351 } 352 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { 353 QUEUE_KEY(0x36 | (~keycode & 0x80)); 354 } 355 #else 356 if (keycode & 0x80) { 357 if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) 358 QUEUE_KEY(0x2a | 0x80); 359 if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) 360 QUEUE_KEY(0x1d | 0x80); 361 if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) 362 QUEUE_KEY(0x38 | 0x80); 363 if ((s->imodifiers & 0x10) && (s->modifiers & 1)) 364 QUEUE_KEY(0x2a); 365 if ((s->imodifiers & 0x20) && (s->modifiers & 2)) 366 QUEUE_KEY(0x36); 367 s->imodifiers = 0; 368 } else { 369 if ((code & SPITZ_MOD_SHIFT) && 370 !((s->modifiers | s->imodifiers) & 1)) { 371 QUEUE_KEY(0x2a); 372 s->imodifiers |= 1; 373 } 374 if ((code & SPITZ_MOD_CTRL) && 375 !((s->modifiers | s->imodifiers) & 4)) { 376 QUEUE_KEY(0x1d); 377 s->imodifiers |= 4; 378 } 379 if ((code & SPITZ_MOD_FN) && 380 !((s->modifiers | s->imodifiers) & 8)) { 381 QUEUE_KEY(0x38); 382 s->imodifiers |= 8; 383 } 384 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && 385 !(s->imodifiers & 0x10)) { 386 QUEUE_KEY(0x2a | 0x80); 387 s->imodifiers |= 0x10; 388 } 389 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && 390 !(s->imodifiers & 0x20)) { 391 QUEUE_KEY(0x36 | 0x80); 392 s->imodifiers |= 0x20; 393 } 394 } 395 #endif 396 } 397 398 QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); 399 } 400 401 static void spitz_keyboard_tick(void *opaque) 402 { 403 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 404 405 if (s->fifolen) { 406 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); 407 s->fifolen --; 408 if (s->fifopos >= 16) 409 s->fifopos = 0; 410 } 411 412 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 413 NANOSECONDS_PER_SECOND / 32); 414 } 415 416 static void spitz_keyboard_pre_map(SpitzKeyboardState *s) 417 { 418 int i; 419 for (i = 0; i < 0x100; i ++) 420 s->pre_map[i] = i; 421 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ 422 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ 423 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ 424 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ 425 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ 426 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ 427 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ 428 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ 429 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ 430 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ 431 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ 432 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ 433 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ 434 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ 435 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ 436 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ 437 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ 438 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ 439 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ 440 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ 441 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ 442 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ 443 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ 444 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ 445 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ 446 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ 447 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ 448 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ 449 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ 450 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ 451 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ 452 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ 453 454 s->modifiers = 0; 455 s->imodifiers = 0; 456 s->fifopos = 0; 457 s->fifolen = 0; 458 } 459 460 #undef SPITZ_MOD_SHIFT 461 #undef SPITZ_MOD_CTRL 462 #undef SPITZ_MOD_FN 463 464 static int spitz_keyboard_post_load(void *opaque, int version_id) 465 { 466 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 467 468 /* Release all pressed keys */ 469 memset(s->keyrow, 0, sizeof(s->keyrow)); 470 spitz_keyboard_sense_update(s); 471 s->modifiers = 0; 472 s->imodifiers = 0; 473 s->fifopos = 0; 474 s->fifolen = 0; 475 476 return 0; 477 } 478 479 static void spitz_keyboard_register(PXA2xxState *cpu) 480 { 481 int i; 482 DeviceState *dev; 483 SpitzKeyboardState *s; 484 485 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); 486 s = SPITZ_KEYBOARD(dev); 487 488 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) 489 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); 490 491 for (i = 0; i < 5; i ++) 492 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); 493 494 if (!graphic_rotate) 495 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); 496 497 for (i = 0; i < 5; i++) 498 qemu_set_irq(s->gpiomap[i], 0); 499 500 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) 501 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], 502 qdev_get_gpio_in(dev, i)); 503 504 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 505 506 qemu_add_kbd_event_handler(spitz_keyboard_handler, s); 507 } 508 509 static void spitz_keyboard_init(Object *obj) 510 { 511 DeviceState *dev = DEVICE(obj); 512 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj); 513 int i, j; 514 515 for (i = 0; i < 0x80; i ++) 516 s->keymap[i] = -1; 517 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) 518 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) 519 if (spitz_keymap[i][j] != -1) 520 s->keymap[spitz_keymap[i][j]] = (i << 4) | j; 521 522 spitz_keyboard_pre_map(s); 523 524 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); 525 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); 526 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); 527 } 528 529 /* LCD backlight controller */ 530 531 #define LCDTG_RESCTL 0x00 532 #define LCDTG_PHACTRL 0x01 533 #define LCDTG_DUTYCTRL 0x02 534 #define LCDTG_POWERREG0 0x03 535 #define LCDTG_POWERREG1 0x04 536 #define LCDTG_GPOR3 0x05 537 #define LCDTG_PICTRL 0x06 538 #define LCDTG_POLCTRL 0x07 539 540 typedef struct { 541 SSISlave ssidev; 542 uint32_t bl_intensity; 543 uint32_t bl_power; 544 } SpitzLCDTG; 545 546 static void spitz_bl_update(SpitzLCDTG *s) 547 { 548 if (s->bl_power && s->bl_intensity) 549 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity); 550 else 551 zaurus_printf("LCD Backlight now off\n"); 552 } 553 554 /* FIXME: Implement GPIO properly and remove this hack. */ 555 static SpitzLCDTG *spitz_lcdtg; 556 557 static inline void spitz_bl_bit5(void *opaque, int line, int level) 558 { 559 SpitzLCDTG *s = spitz_lcdtg; 560 int prev = s->bl_intensity; 561 562 if (level) 563 s->bl_intensity &= ~0x20; 564 else 565 s->bl_intensity |= 0x20; 566 567 if (s->bl_power && prev != s->bl_intensity) 568 spitz_bl_update(s); 569 } 570 571 static inline void spitz_bl_power(void *opaque, int line, int level) 572 { 573 SpitzLCDTG *s = spitz_lcdtg; 574 s->bl_power = !!level; 575 spitz_bl_update(s); 576 } 577 578 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value) 579 { 580 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); 581 int addr; 582 addr = value >> 5; 583 value &= 0x1f; 584 585 switch (addr) { 586 case LCDTG_RESCTL: 587 if (value) 588 zaurus_printf("LCD in QVGA mode\n"); 589 else 590 zaurus_printf("LCD in VGA mode\n"); 591 break; 592 593 case LCDTG_DUTYCTRL: 594 s->bl_intensity &= ~0x1f; 595 s->bl_intensity |= value; 596 if (s->bl_power) 597 spitz_bl_update(s); 598 break; 599 600 case LCDTG_POWERREG0: 601 /* Set common voltage to M62332FP */ 602 break; 603 } 604 return 0; 605 } 606 607 static void spitz_lcdtg_realize(SSISlave *dev, Error **errp) 608 { 609 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); 610 611 spitz_lcdtg = s; 612 s->bl_power = 0; 613 s->bl_intensity = 0x20; 614 } 615 616 /* SSP devices */ 617 618 #define CORGI_SSP_PORT 2 619 620 #define SPITZ_GPIO_LCDCON_CS 53 621 #define SPITZ_GPIO_ADS7846_CS 14 622 #define SPITZ_GPIO_MAX1111_CS 20 623 #define SPITZ_GPIO_TP_INT 11 624 625 static DeviceState *max1111; 626 627 /* "Demux" the signal based on current chipselect */ 628 typedef struct { 629 SSISlave ssidev; 630 SSIBus *bus[3]; 631 uint32_t enable[3]; 632 } CorgiSSPState; 633 634 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) 635 { 636 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); 637 int i; 638 639 for (i = 0; i < 3; i++) { 640 if (s->enable[i]) { 641 return ssi_transfer(s->bus[i], value); 642 } 643 } 644 return 0; 645 } 646 647 static void corgi_ssp_gpio_cs(void *opaque, int line, int level) 648 { 649 CorgiSSPState *s = (CorgiSSPState *)opaque; 650 assert(line >= 0 && line < 3); 651 s->enable[line] = !level; 652 } 653 654 #define MAX1111_BATT_VOLT 1 655 #define MAX1111_BATT_TEMP 2 656 #define MAX1111_ACIN_VOLT 3 657 658 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ 659 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ 660 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ 661 662 static void spitz_adc_temp_on(void *opaque, int line, int level) 663 { 664 if (!max1111) 665 return; 666 667 if (level) 668 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); 669 else 670 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); 671 } 672 673 static void corgi_ssp_realize(SSISlave *d, Error **errp) 674 { 675 DeviceState *dev = DEVICE(d); 676 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d); 677 678 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); 679 s->bus[0] = ssi_create_bus(dev, "ssi0"); 680 s->bus[1] = ssi_create_bus(dev, "ssi1"); 681 s->bus[2] = ssi_create_bus(dev, "ssi2"); 682 } 683 684 static void spitz_ssp_attach(PXA2xxState *cpu) 685 { 686 DeviceState *mux; 687 DeviceState *dev; 688 void *bus; 689 690 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp"); 691 692 bus = qdev_get_child_bus(mux, "ssi0"); 693 ssi_create_slave(bus, "spitz-lcdtg"); 694 695 bus = qdev_get_child_bus(mux, "ssi1"); 696 dev = ssi_create_slave(bus, "ads7846"); 697 qdev_connect_gpio_out(dev, 0, 698 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT)); 699 700 bus = qdev_get_child_bus(mux, "ssi2"); 701 max1111 = ssi_create_slave(bus, "max1111"); 702 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); 703 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); 704 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); 705 706 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS, 707 qdev_get_gpio_in(mux, 0)); 708 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS, 709 qdev_get_gpio_in(mux, 1)); 710 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS, 711 qdev_get_gpio_in(mux, 2)); 712 } 713 714 /* CF Microdrive */ 715 716 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) 717 { 718 PCMCIACardState *md; 719 DriveInfo *dinfo; 720 721 dinfo = drive_get(IF_IDE, 0, 0); 722 if (!dinfo || dinfo->media_cd) 723 return; 724 md = dscm1xxxx_init(dinfo); 725 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); 726 } 727 728 /* Wm8750 and Max7310 on I2C */ 729 730 #define AKITA_MAX_ADDR 0x18 731 #define SPITZ_WM_ADDRL 0x1b 732 #define SPITZ_WM_ADDRH 0x1a 733 734 #define SPITZ_GPIO_WM 5 735 736 static void spitz_wm8750_addr(void *opaque, int line, int level) 737 { 738 I2CSlave *wm = (I2CSlave *) opaque; 739 if (level) 740 i2c_set_slave_address(wm, SPITZ_WM_ADDRH); 741 else 742 i2c_set_slave_address(wm, SPITZ_WM_ADDRL); 743 } 744 745 static void spitz_i2c_setup(PXA2xxState *cpu) 746 { 747 /* Attach the CPU on one end of our I2C bus. */ 748 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); 749 750 DeviceState *wm; 751 752 /* Attach a WM8750 to the bus */ 753 wm = i2c_create_slave(bus, TYPE_WM8750, 0); 754 755 spitz_wm8750_addr(wm, 0, 0); 756 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, 757 qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); 758 /* .. and to the sound interface. */ 759 cpu->i2s->opaque = wm; 760 cpu->i2s->codec_out = wm8750_dac_dat; 761 cpu->i2s->codec_in = wm8750_adc_dat; 762 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); 763 } 764 765 static void spitz_akita_i2c_setup(PXA2xxState *cpu) 766 { 767 /* Attach a Max7310 to Akita I2C bus. */ 768 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", 769 AKITA_MAX_ADDR); 770 } 771 772 /* Other peripherals */ 773 774 static void spitz_out_switch(void *opaque, int line, int level) 775 { 776 switch (line) { 777 case 0: 778 zaurus_printf("Charging %s.\n", level ? "off" : "on"); 779 break; 780 case 1: 781 zaurus_printf("Discharging %s.\n", level ? "on" : "off"); 782 break; 783 case 2: 784 zaurus_printf("Green LED %s.\n", level ? "on" : "off"); 785 break; 786 case 3: 787 zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); 788 break; 789 case 4: 790 spitz_bl_bit5(opaque, line, level); 791 break; 792 case 5: 793 spitz_bl_power(opaque, line, level); 794 break; 795 case 6: 796 spitz_adc_temp_on(opaque, line, level); 797 break; 798 } 799 } 800 801 #define SPITZ_SCP_LED_GREEN 1 802 #define SPITZ_SCP_JK_B 2 803 #define SPITZ_SCP_CHRG_ON 3 804 #define SPITZ_SCP_MUTE_L 4 805 #define SPITZ_SCP_MUTE_R 5 806 #define SPITZ_SCP_CF_POWER 6 807 #define SPITZ_SCP_LED_ORANGE 7 808 #define SPITZ_SCP_JK_A 8 809 #define SPITZ_SCP_ADC_TEMP_ON 9 810 #define SPITZ_SCP2_IR_ON 1 811 #define SPITZ_SCP2_AKIN_PULLUP 2 812 #define SPITZ_SCP2_BACKLIGHT_CONT 7 813 #define SPITZ_SCP2_BACKLIGHT_ON 8 814 #define SPITZ_SCP2_MIC_BIAS 9 815 816 static void spitz_scoop_gpio_setup(PXA2xxState *cpu, 817 DeviceState *scp0, DeviceState *scp1) 818 { 819 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8); 820 821 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]); 822 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]); 823 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]); 824 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]); 825 826 if (scp1) { 827 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]); 828 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]); 829 } 830 831 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]); 832 } 833 834 #define SPITZ_GPIO_HSYNC 22 835 #define SPITZ_GPIO_SD_DETECT 9 836 #define SPITZ_GPIO_SD_WP 81 837 #define SPITZ_GPIO_ON_RESET 89 838 #define SPITZ_GPIO_BAT_COVER 90 839 #define SPITZ_GPIO_CF1_IRQ 105 840 #define SPITZ_GPIO_CF1_CD 94 841 #define SPITZ_GPIO_CF2_IRQ 106 842 #define SPITZ_GPIO_CF2_CD 93 843 844 static int spitz_hsync; 845 846 static void spitz_lcd_hsync_handler(void *opaque, int line, int level) 847 { 848 PXA2xxState *cpu = (PXA2xxState *) opaque; 849 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); 850 spitz_hsync ^= 1; 851 } 852 853 static void spitz_reset(void *opaque, int line, int level) 854 { 855 if (level) { 856 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 857 } 858 } 859 860 static void spitz_gpio_setup(PXA2xxState *cpu, int slots) 861 { 862 qemu_irq lcd_hsync; 863 qemu_irq reset; 864 865 /* 866 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status 867 * read to satisfy broken guests that poll-wait for hsync. 868 * Simulating a real hsync event would be less practical and 869 * wouldn't guarantee that a guest ever exits the loop. 870 */ 871 spitz_hsync = 0; 872 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); 873 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); 874 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); 875 876 /* MMC/SD host */ 877 pxa2xx_mmci_handlers(cpu->mmc, 878 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), 879 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); 880 881 /* Battery lock always closed */ 882 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); 883 884 /* Handle reset */ 885 reset = qemu_allocate_irq(spitz_reset, cpu, 0); 886 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset); 887 888 /* PCMCIA signals: card's IRQ and Card-Detect */ 889 if (slots >= 1) 890 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], 891 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), 892 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); 893 if (slots >= 2) 894 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], 895 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), 896 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); 897 } 898 899 /* Board init. */ 900 enum spitz_model_e { spitz, akita, borzoi, terrier }; 901 902 #define SPITZ_RAM 0x04000000 903 #define SPITZ_ROM 0x00800000 904 905 static struct arm_boot_info spitz_binfo = { 906 .loader_start = PXA2XX_SDRAM_BASE, 907 .ram_size = 0x04000000, 908 }; 909 910 static void spitz_common_init(MachineState *machine, 911 enum spitz_model_e model, int arm_id) 912 { 913 PXA2xxState *mpu; 914 DeviceState *scp0, *scp1 = NULL; 915 MemoryRegion *address_space_mem = get_system_memory(); 916 MemoryRegion *rom = g_new(MemoryRegion, 1); 917 918 /* Setup CPU & memory */ 919 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, 920 machine->cpu_type); 921 922 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); 923 924 memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); 925 memory_region_set_readonly(rom, true); 926 memory_region_add_subregion(address_space_mem, 0, rom); 927 928 /* Setup peripherals */ 929 spitz_keyboard_register(mpu); 930 931 spitz_ssp_attach(mpu); 932 933 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); 934 if (model != akita) { 935 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); 936 } 937 938 spitz_scoop_gpio_setup(mpu, scp0, scp1); 939 940 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); 941 942 spitz_i2c_setup(mpu); 943 944 if (model == akita) 945 spitz_akita_i2c_setup(mpu); 946 947 if (model == terrier) 948 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ 949 spitz_microdrive_attach(mpu, 1); 950 else if (model != akita) 951 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ 952 spitz_microdrive_attach(mpu, 0); 953 954 spitz_binfo.kernel_filename = machine->kernel_filename; 955 spitz_binfo.kernel_cmdline = machine->kernel_cmdline; 956 spitz_binfo.initrd_filename = machine->initrd_filename; 957 spitz_binfo.board_id = arm_id; 958 arm_load_kernel(mpu->cpu, &spitz_binfo); 959 sl_bootparam_write(SL_PXA_PARAM_BASE); 960 } 961 962 static void spitz_init(MachineState *machine) 963 { 964 spitz_common_init(machine, spitz, 0x2c9); 965 } 966 967 static void borzoi_init(MachineState *machine) 968 { 969 spitz_common_init(machine, borzoi, 0x33f); 970 } 971 972 static void akita_init(MachineState *machine) 973 { 974 spitz_common_init(machine, akita, 0x2e8); 975 } 976 977 static void terrier_init(MachineState *machine) 978 { 979 spitz_common_init(machine, terrier, 0x33f); 980 } 981 982 static void akitapda_class_init(ObjectClass *oc, void *data) 983 { 984 MachineClass *mc = MACHINE_CLASS(oc); 985 986 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; 987 mc->init = akita_init; 988 mc->ignore_memory_transaction_failures = true; 989 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 990 } 991 992 static const TypeInfo akitapda_type = { 993 .name = MACHINE_TYPE_NAME("akita"), 994 .parent = TYPE_MACHINE, 995 .class_init = akitapda_class_init, 996 }; 997 998 static void spitzpda_class_init(ObjectClass *oc, void *data) 999 { 1000 MachineClass *mc = MACHINE_CLASS(oc); 1001 1002 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; 1003 mc->init = spitz_init; 1004 mc->block_default_type = IF_IDE; 1005 mc->ignore_memory_transaction_failures = true; 1006 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1007 } 1008 1009 static const TypeInfo spitzpda_type = { 1010 .name = MACHINE_TYPE_NAME("spitz"), 1011 .parent = TYPE_MACHINE, 1012 .class_init = spitzpda_class_init, 1013 }; 1014 1015 static void borzoipda_class_init(ObjectClass *oc, void *data) 1016 { 1017 MachineClass *mc = MACHINE_CLASS(oc); 1018 1019 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; 1020 mc->init = borzoi_init; 1021 mc->block_default_type = IF_IDE; 1022 mc->ignore_memory_transaction_failures = true; 1023 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1024 } 1025 1026 static const TypeInfo borzoipda_type = { 1027 .name = MACHINE_TYPE_NAME("borzoi"), 1028 .parent = TYPE_MACHINE, 1029 .class_init = borzoipda_class_init, 1030 }; 1031 1032 static void terrierpda_class_init(ObjectClass *oc, void *data) 1033 { 1034 MachineClass *mc = MACHINE_CLASS(oc); 1035 1036 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; 1037 mc->init = terrier_init; 1038 mc->block_default_type = IF_IDE; 1039 mc->ignore_memory_transaction_failures = true; 1040 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5"); 1041 } 1042 1043 static const TypeInfo terrierpda_type = { 1044 .name = MACHINE_TYPE_NAME("terrier"), 1045 .parent = TYPE_MACHINE, 1046 .class_init = terrierpda_class_init, 1047 }; 1048 1049 static void spitz_machine_init(void) 1050 { 1051 type_register_static(&akitapda_type); 1052 type_register_static(&spitzpda_type); 1053 type_register_static(&borzoipda_type); 1054 type_register_static(&terrierpda_type); 1055 } 1056 1057 type_init(spitz_machine_init) 1058 1059 static bool is_version_0(void *opaque, int version_id) 1060 { 1061 return version_id == 0; 1062 } 1063 1064 static VMStateDescription vmstate_sl_nand_info = { 1065 .name = "sl-nand", 1066 .version_id = 0, 1067 .minimum_version_id = 0, 1068 .fields = (VMStateField[]) { 1069 VMSTATE_UINT8(ctl, SLNANDState), 1070 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), 1071 VMSTATE_END_OF_LIST(), 1072 }, 1073 }; 1074 1075 static Property sl_nand_properties[] = { 1076 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), 1077 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), 1078 DEFINE_PROP_END_OF_LIST(), 1079 }; 1080 1081 static void sl_nand_class_init(ObjectClass *klass, void *data) 1082 { 1083 DeviceClass *dc = DEVICE_CLASS(klass); 1084 1085 dc->vmsd = &vmstate_sl_nand_info; 1086 dc->props = sl_nand_properties; 1087 dc->realize = sl_nand_realize; 1088 /* Reason: init() method uses drive_get() */ 1089 dc->user_creatable = false; 1090 } 1091 1092 static const TypeInfo sl_nand_info = { 1093 .name = TYPE_SL_NAND, 1094 .parent = TYPE_SYS_BUS_DEVICE, 1095 .instance_size = sizeof(SLNANDState), 1096 .instance_init = sl_nand_init, 1097 .class_init = sl_nand_class_init, 1098 }; 1099 1100 static VMStateDescription vmstate_spitz_kbd = { 1101 .name = "spitz-keyboard", 1102 .version_id = 1, 1103 .minimum_version_id = 0, 1104 .post_load = spitz_keyboard_post_load, 1105 .fields = (VMStateField[]) { 1106 VMSTATE_UINT16(sense_state, SpitzKeyboardState), 1107 VMSTATE_UINT16(strobe_state, SpitzKeyboardState), 1108 VMSTATE_UNUSED_TEST(is_version_0, 5), 1109 VMSTATE_END_OF_LIST(), 1110 }, 1111 }; 1112 1113 static void spitz_keyboard_class_init(ObjectClass *klass, void *data) 1114 { 1115 DeviceClass *dc = DEVICE_CLASS(klass); 1116 1117 dc->vmsd = &vmstate_spitz_kbd; 1118 } 1119 1120 static const TypeInfo spitz_keyboard_info = { 1121 .name = TYPE_SPITZ_KEYBOARD, 1122 .parent = TYPE_SYS_BUS_DEVICE, 1123 .instance_size = sizeof(SpitzKeyboardState), 1124 .instance_init = spitz_keyboard_init, 1125 .class_init = spitz_keyboard_class_init, 1126 }; 1127 1128 static const VMStateDescription vmstate_corgi_ssp_regs = { 1129 .name = "corgi-ssp", 1130 .version_id = 2, 1131 .minimum_version_id = 2, 1132 .fields = (VMStateField[]) { 1133 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState), 1134 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), 1135 VMSTATE_END_OF_LIST(), 1136 } 1137 }; 1138 1139 static void corgi_ssp_class_init(ObjectClass *klass, void *data) 1140 { 1141 DeviceClass *dc = DEVICE_CLASS(klass); 1142 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1143 1144 k->realize = corgi_ssp_realize; 1145 k->transfer = corgi_ssp_transfer; 1146 dc->vmsd = &vmstate_corgi_ssp_regs; 1147 } 1148 1149 static const TypeInfo corgi_ssp_info = { 1150 .name = "corgi-ssp", 1151 .parent = TYPE_SSI_SLAVE, 1152 .instance_size = sizeof(CorgiSSPState), 1153 .class_init = corgi_ssp_class_init, 1154 }; 1155 1156 static const VMStateDescription vmstate_spitz_lcdtg_regs = { 1157 .name = "spitz-lcdtg", 1158 .version_id = 1, 1159 .minimum_version_id = 1, 1160 .fields = (VMStateField[]) { 1161 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG), 1162 VMSTATE_UINT32(bl_intensity, SpitzLCDTG), 1163 VMSTATE_UINT32(bl_power, SpitzLCDTG), 1164 VMSTATE_END_OF_LIST(), 1165 } 1166 }; 1167 1168 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) 1169 { 1170 DeviceClass *dc = DEVICE_CLASS(klass); 1171 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1172 1173 k->realize = spitz_lcdtg_realize; 1174 k->transfer = spitz_lcdtg_transfer; 1175 dc->vmsd = &vmstate_spitz_lcdtg_regs; 1176 } 1177 1178 static const TypeInfo spitz_lcdtg_info = { 1179 .name = "spitz-lcdtg", 1180 .parent = TYPE_SSI_SLAVE, 1181 .instance_size = sizeof(SpitzLCDTG), 1182 .class_init = spitz_lcdtg_class_init, 1183 }; 1184 1185 static void spitz_register_types(void) 1186 { 1187 type_register_static(&corgi_ssp_info); 1188 type_register_static(&spitz_lcdtg_info); 1189 type_register_static(&spitz_keyboard_info); 1190 type_register_static(&sl_nand_info); 1191 } 1192 1193 type_init(spitz_register_types) 1194