1 /* 2 * PXA270-based Clamshell PDA platforms. 3 * 4 * Copyright (c) 2006 Openedhand Ltd. 5 * Written by Andrzej Zaborowski <balrog@zabor.org> 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qapi/error.h" 15 #include "hw/arm/pxa.h" 16 #include "hw/arm/boot.h" 17 #include "sysemu/runstate.h" 18 #include "sysemu/sysemu.h" 19 #include "hw/pcmcia.h" 20 #include "hw/qdev-properties.h" 21 #include "hw/i2c/i2c.h" 22 #include "hw/irq.h" 23 #include "hw/ssi/ssi.h" 24 #include "hw/block/flash.h" 25 #include "qemu/timer.h" 26 #include "hw/arm/sharpsl.h" 27 #include "ui/console.h" 28 #include "hw/audio/wm8750.h" 29 #include "audio/audio.h" 30 #include "hw/boards.h" 31 #include "hw/sysbus.h" 32 #include "migration/vmstate.h" 33 #include "exec/address-spaces.h" 34 #include "cpu.h" 35 36 #undef REG_FMT 37 #define REG_FMT "0x%02lx" 38 39 /* Spitz Flash */ 40 #define FLASH_BASE 0x0c000000 41 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ 42 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ 43 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ 44 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ 45 #define FLASH_ECCCLRR 0x10 /* Clear ECC */ 46 #define FLASH_FLASHIO 0x14 /* Flash I/O */ 47 #define FLASH_FLASHCTL 0x18 /* Flash Control */ 48 49 #define FLASHCTL_CE0 (1 << 0) 50 #define FLASHCTL_CLE (1 << 1) 51 #define FLASHCTL_ALE (1 << 2) 52 #define FLASHCTL_WP (1 << 3) 53 #define FLASHCTL_CE1 (1 << 4) 54 #define FLASHCTL_RYBY (1 << 5) 55 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) 56 57 #define TYPE_SL_NAND "sl-nand" 58 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND) 59 60 typedef struct { 61 SysBusDevice parent_obj; 62 63 MemoryRegion iomem; 64 DeviceState *nand; 65 uint8_t ctl; 66 uint8_t manf_id; 67 uint8_t chip_id; 68 ECCState ecc; 69 } SLNANDState; 70 71 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) 72 { 73 SLNANDState *s = (SLNANDState *) opaque; 74 int ryby; 75 76 switch (addr) { 77 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) 78 case FLASH_ECCLPLB: 79 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | 80 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); 81 82 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) 83 case FLASH_ECCLPUB: 84 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | 85 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); 86 87 case FLASH_ECCCP: 88 return s->ecc.cp; 89 90 case FLASH_ECCCNTR: 91 return s->ecc.count & 0xff; 92 93 case FLASH_FLASHCTL: 94 nand_getpins(s->nand, &ryby); 95 if (ryby) 96 return s->ctl | FLASHCTL_RYBY; 97 else 98 return s->ctl; 99 100 case FLASH_FLASHIO: 101 if (size == 4) { 102 return ecc_digest(&s->ecc, nand_getio(s->nand)) | 103 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); 104 } 105 return ecc_digest(&s->ecc, nand_getio(s->nand)); 106 107 default: 108 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); 109 } 110 return 0; 111 } 112 113 static void sl_write(void *opaque, hwaddr addr, 114 uint64_t value, unsigned size) 115 { 116 SLNANDState *s = (SLNANDState *) opaque; 117 118 switch (addr) { 119 case FLASH_ECCCLRR: 120 /* Value is ignored. */ 121 ecc_reset(&s->ecc); 122 break; 123 124 case FLASH_FLASHCTL: 125 s->ctl = value & 0xff & ~FLASHCTL_RYBY; 126 nand_setpins(s->nand, 127 s->ctl & FLASHCTL_CLE, 128 s->ctl & FLASHCTL_ALE, 129 s->ctl & FLASHCTL_NCE, 130 s->ctl & FLASHCTL_WP, 131 0); 132 break; 133 134 case FLASH_FLASHIO: 135 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); 136 break; 137 138 default: 139 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); 140 } 141 } 142 143 enum { 144 FLASH_128M, 145 FLASH_1024M, 146 }; 147 148 static const MemoryRegionOps sl_ops = { 149 .read = sl_read, 150 .write = sl_write, 151 .endianness = DEVICE_NATIVE_ENDIAN, 152 }; 153 154 static void sl_flash_register(PXA2xxState *cpu, int size) 155 { 156 DeviceState *dev; 157 158 dev = qdev_create(NULL, TYPE_SL_NAND); 159 160 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); 161 if (size == FLASH_128M) 162 qdev_prop_set_uint8(dev, "chip_id", 0x73); 163 else if (size == FLASH_1024M) 164 qdev_prop_set_uint8(dev, "chip_id", 0xf1); 165 166 qdev_init_nofail(dev); 167 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); 168 } 169 170 static void sl_nand_init(Object *obj) 171 { 172 SLNANDState *s = SL_NAND(obj); 173 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 174 175 s->ctl = 0; 176 177 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40); 178 sysbus_init_mmio(dev, &s->iomem); 179 } 180 181 static void sl_nand_realize(DeviceState *dev, Error **errp) 182 { 183 SLNANDState *s = SL_NAND(dev); 184 DriveInfo *nand; 185 186 /* FIXME use a qdev drive property instead of drive_get() */ 187 nand = drive_get(IF_MTD, 0, 0); 188 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, 189 s->manf_id, s->chip_id); 190 } 191 192 /* Spitz Keyboard */ 193 194 #define SPITZ_KEY_STROBE_NUM 11 195 #define SPITZ_KEY_SENSE_NUM 7 196 197 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { 198 12, 17, 91, 34, 36, 38, 39 199 }; 200 201 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { 202 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 203 }; 204 205 /* Eighth additional row maps the special keys */ 206 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { 207 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, 208 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, 209 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, 210 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, 211 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, 212 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, 213 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, 214 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, 215 }; 216 217 #define SPITZ_GPIO_AK_INT 13 /* Remote control */ 218 #define SPITZ_GPIO_SYNC 16 /* Sync button */ 219 #define SPITZ_GPIO_ON_KEY 95 /* Power button */ 220 #define SPITZ_GPIO_SWA 97 /* Lid */ 221 #define SPITZ_GPIO_SWB 96 /* Tablet mode */ 222 223 /* The special buttons are mapped to unused keys */ 224 static const int spitz_gpiomap[5] = { 225 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, 226 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, 227 }; 228 229 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" 230 #define SPITZ_KEYBOARD(obj) \ 231 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD) 232 233 typedef struct { 234 SysBusDevice parent_obj; 235 236 qemu_irq sense[SPITZ_KEY_SENSE_NUM]; 237 qemu_irq gpiomap[5]; 238 int keymap[0x80]; 239 uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; 240 uint16_t strobe_state; 241 uint16_t sense_state; 242 243 uint16_t pre_map[0x100]; 244 uint16_t modifiers; 245 uint16_t imodifiers; 246 uint8_t fifo[16]; 247 int fifopos, fifolen; 248 QEMUTimer *kbdtimer; 249 } SpitzKeyboardState; 250 251 static void spitz_keyboard_sense_update(SpitzKeyboardState *s) 252 { 253 int i; 254 uint16_t strobe, sense = 0; 255 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { 256 strobe = s->keyrow[i] & s->strobe_state; 257 if (strobe) { 258 sense |= 1 << i; 259 if (!(s->sense_state & (1 << i))) 260 qemu_irq_raise(s->sense[i]); 261 } else if (s->sense_state & (1 << i)) 262 qemu_irq_lower(s->sense[i]); 263 } 264 265 s->sense_state = sense; 266 } 267 268 static void spitz_keyboard_strobe(void *opaque, int line, int level) 269 { 270 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 271 272 if (level) 273 s->strobe_state |= 1 << line; 274 else 275 s->strobe_state &= ~(1 << line); 276 spitz_keyboard_sense_update(s); 277 } 278 279 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) 280 { 281 int spitz_keycode = s->keymap[keycode & 0x7f]; 282 if (spitz_keycode == -1) 283 return; 284 285 /* Handle the additional keys */ 286 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { 287 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); 288 return; 289 } 290 291 if (keycode & 0x80) 292 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); 293 else 294 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); 295 296 spitz_keyboard_sense_update(s); 297 } 298 299 #define SPITZ_MOD_SHIFT (1 << 7) 300 #define SPITZ_MOD_CTRL (1 << 8) 301 #define SPITZ_MOD_FN (1 << 9) 302 303 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c 304 305 static void spitz_keyboard_handler(void *opaque, int keycode) 306 { 307 SpitzKeyboardState *s = opaque; 308 uint16_t code; 309 int mapcode; 310 switch (keycode) { 311 case 0x2a: /* Left Shift */ 312 s->modifiers |= 1; 313 break; 314 case 0xaa: 315 s->modifiers &= ~1; 316 break; 317 case 0x36: /* Right Shift */ 318 s->modifiers |= 2; 319 break; 320 case 0xb6: 321 s->modifiers &= ~2; 322 break; 323 case 0x1d: /* Control */ 324 s->modifiers |= 4; 325 break; 326 case 0x9d: 327 s->modifiers &= ~4; 328 break; 329 case 0x38: /* Alt */ 330 s->modifiers |= 8; 331 break; 332 case 0xb8: 333 s->modifiers &= ~8; 334 break; 335 } 336 337 code = s->pre_map[mapcode = ((s->modifiers & 3) ? 338 (keycode | SPITZ_MOD_SHIFT) : 339 (keycode & ~SPITZ_MOD_SHIFT))]; 340 341 if (code != mapcode) { 342 #if 0 343 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { 344 QUEUE_KEY(0x2a | (keycode & 0x80)); 345 } 346 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { 347 QUEUE_KEY(0x1d | (keycode & 0x80)); 348 } 349 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { 350 QUEUE_KEY(0x38 | (keycode & 0x80)); 351 } 352 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { 353 QUEUE_KEY(0x2a | (~keycode & 0x80)); 354 } 355 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { 356 QUEUE_KEY(0x36 | (~keycode & 0x80)); 357 } 358 #else 359 if (keycode & 0x80) { 360 if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) 361 QUEUE_KEY(0x2a | 0x80); 362 if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) 363 QUEUE_KEY(0x1d | 0x80); 364 if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) 365 QUEUE_KEY(0x38 | 0x80); 366 if ((s->imodifiers & 0x10) && (s->modifiers & 1)) 367 QUEUE_KEY(0x2a); 368 if ((s->imodifiers & 0x20) && (s->modifiers & 2)) 369 QUEUE_KEY(0x36); 370 s->imodifiers = 0; 371 } else { 372 if ((code & SPITZ_MOD_SHIFT) && 373 !((s->modifiers | s->imodifiers) & 1)) { 374 QUEUE_KEY(0x2a); 375 s->imodifiers |= 1; 376 } 377 if ((code & SPITZ_MOD_CTRL) && 378 !((s->modifiers | s->imodifiers) & 4)) { 379 QUEUE_KEY(0x1d); 380 s->imodifiers |= 4; 381 } 382 if ((code & SPITZ_MOD_FN) && 383 !((s->modifiers | s->imodifiers) & 8)) { 384 QUEUE_KEY(0x38); 385 s->imodifiers |= 8; 386 } 387 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && 388 !(s->imodifiers & 0x10)) { 389 QUEUE_KEY(0x2a | 0x80); 390 s->imodifiers |= 0x10; 391 } 392 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && 393 !(s->imodifiers & 0x20)) { 394 QUEUE_KEY(0x36 | 0x80); 395 s->imodifiers |= 0x20; 396 } 397 } 398 #endif 399 } 400 401 QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); 402 } 403 404 static void spitz_keyboard_tick(void *opaque) 405 { 406 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 407 408 if (s->fifolen) { 409 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); 410 s->fifolen --; 411 if (s->fifopos >= 16) 412 s->fifopos = 0; 413 } 414 415 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 416 NANOSECONDS_PER_SECOND / 32); 417 } 418 419 static void spitz_keyboard_pre_map(SpitzKeyboardState *s) 420 { 421 int i; 422 for (i = 0; i < 0x100; i ++) 423 s->pre_map[i] = i; 424 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ 425 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ 426 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ 427 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ 428 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ 429 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ 430 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ 431 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ 432 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ 433 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ 434 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ 435 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ 436 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ 437 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ 438 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ 439 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ 440 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ 441 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ 442 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ 443 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ 444 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ 445 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ 446 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ 447 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ 448 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ 449 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ 450 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ 451 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ 452 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ 453 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ 454 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ 455 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ 456 457 s->modifiers = 0; 458 s->imodifiers = 0; 459 s->fifopos = 0; 460 s->fifolen = 0; 461 } 462 463 #undef SPITZ_MOD_SHIFT 464 #undef SPITZ_MOD_CTRL 465 #undef SPITZ_MOD_FN 466 467 static int spitz_keyboard_post_load(void *opaque, int version_id) 468 { 469 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 470 471 /* Release all pressed keys */ 472 memset(s->keyrow, 0, sizeof(s->keyrow)); 473 spitz_keyboard_sense_update(s); 474 s->modifiers = 0; 475 s->imodifiers = 0; 476 s->fifopos = 0; 477 s->fifolen = 0; 478 479 return 0; 480 } 481 482 static void spitz_keyboard_register(PXA2xxState *cpu) 483 { 484 int i; 485 DeviceState *dev; 486 SpitzKeyboardState *s; 487 488 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); 489 s = SPITZ_KEYBOARD(dev); 490 491 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) 492 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); 493 494 for (i = 0; i < 5; i ++) 495 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); 496 497 if (!graphic_rotate) 498 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); 499 500 for (i = 0; i < 5; i++) 501 qemu_set_irq(s->gpiomap[i], 0); 502 503 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) 504 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], 505 qdev_get_gpio_in(dev, i)); 506 507 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 508 509 qemu_add_kbd_event_handler(spitz_keyboard_handler, s); 510 } 511 512 static void spitz_keyboard_init(Object *obj) 513 { 514 DeviceState *dev = DEVICE(obj); 515 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj); 516 int i, j; 517 518 for (i = 0; i < 0x80; i ++) 519 s->keymap[i] = -1; 520 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) 521 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) 522 if (spitz_keymap[i][j] != -1) 523 s->keymap[spitz_keymap[i][j]] = (i << 4) | j; 524 525 spitz_keyboard_pre_map(s); 526 527 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); 528 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); 529 } 530 531 static void spitz_keyboard_realize(DeviceState *dev, Error **errp) 532 { 533 SpitzKeyboardState *s = SPITZ_KEYBOARD(dev); 534 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); 535 } 536 537 /* LCD backlight controller */ 538 539 #define LCDTG_RESCTL 0x00 540 #define LCDTG_PHACTRL 0x01 541 #define LCDTG_DUTYCTRL 0x02 542 #define LCDTG_POWERREG0 0x03 543 #define LCDTG_POWERREG1 0x04 544 #define LCDTG_GPOR3 0x05 545 #define LCDTG_PICTRL 0x06 546 #define LCDTG_POLCTRL 0x07 547 548 typedef struct { 549 SSISlave ssidev; 550 uint32_t bl_intensity; 551 uint32_t bl_power; 552 } SpitzLCDTG; 553 554 static void spitz_bl_update(SpitzLCDTG *s) 555 { 556 if (s->bl_power && s->bl_intensity) 557 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity); 558 else 559 zaurus_printf("LCD Backlight now off\n"); 560 } 561 562 /* FIXME: Implement GPIO properly and remove this hack. */ 563 static SpitzLCDTG *spitz_lcdtg; 564 565 static inline void spitz_bl_bit5(void *opaque, int line, int level) 566 { 567 SpitzLCDTG *s = spitz_lcdtg; 568 int prev = s->bl_intensity; 569 570 if (level) 571 s->bl_intensity &= ~0x20; 572 else 573 s->bl_intensity |= 0x20; 574 575 if (s->bl_power && prev != s->bl_intensity) 576 spitz_bl_update(s); 577 } 578 579 static inline void spitz_bl_power(void *opaque, int line, int level) 580 { 581 SpitzLCDTG *s = spitz_lcdtg; 582 s->bl_power = !!level; 583 spitz_bl_update(s); 584 } 585 586 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value) 587 { 588 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); 589 int addr; 590 addr = value >> 5; 591 value &= 0x1f; 592 593 switch (addr) { 594 case LCDTG_RESCTL: 595 if (value) 596 zaurus_printf("LCD in QVGA mode\n"); 597 else 598 zaurus_printf("LCD in VGA mode\n"); 599 break; 600 601 case LCDTG_DUTYCTRL: 602 s->bl_intensity &= ~0x1f; 603 s->bl_intensity |= value; 604 if (s->bl_power) 605 spitz_bl_update(s); 606 break; 607 608 case LCDTG_POWERREG0: 609 /* Set common voltage to M62332FP */ 610 break; 611 } 612 return 0; 613 } 614 615 static void spitz_lcdtg_realize(SSISlave *dev, Error **errp) 616 { 617 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); 618 619 spitz_lcdtg = s; 620 s->bl_power = 0; 621 s->bl_intensity = 0x20; 622 } 623 624 /* SSP devices */ 625 626 #define CORGI_SSP_PORT 2 627 628 #define SPITZ_GPIO_LCDCON_CS 53 629 #define SPITZ_GPIO_ADS7846_CS 14 630 #define SPITZ_GPIO_MAX1111_CS 20 631 #define SPITZ_GPIO_TP_INT 11 632 633 static DeviceState *max1111; 634 635 /* "Demux" the signal based on current chipselect */ 636 typedef struct { 637 SSISlave ssidev; 638 SSIBus *bus[3]; 639 uint32_t enable[3]; 640 } CorgiSSPState; 641 642 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) 643 { 644 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); 645 int i; 646 647 for (i = 0; i < 3; i++) { 648 if (s->enable[i]) { 649 return ssi_transfer(s->bus[i], value); 650 } 651 } 652 return 0; 653 } 654 655 static void corgi_ssp_gpio_cs(void *opaque, int line, int level) 656 { 657 CorgiSSPState *s = (CorgiSSPState *)opaque; 658 assert(line >= 0 && line < 3); 659 s->enable[line] = !level; 660 } 661 662 #define MAX1111_BATT_VOLT 1 663 #define MAX1111_BATT_TEMP 2 664 #define MAX1111_ACIN_VOLT 3 665 666 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ 667 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ 668 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ 669 670 static void spitz_adc_temp_on(void *opaque, int line, int level) 671 { 672 if (!max1111) 673 return; 674 675 if (level) 676 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); 677 else 678 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); 679 } 680 681 static void corgi_ssp_realize(SSISlave *d, Error **errp) 682 { 683 DeviceState *dev = DEVICE(d); 684 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d); 685 686 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); 687 s->bus[0] = ssi_create_bus(dev, "ssi0"); 688 s->bus[1] = ssi_create_bus(dev, "ssi1"); 689 s->bus[2] = ssi_create_bus(dev, "ssi2"); 690 } 691 692 static void spitz_ssp_attach(PXA2xxState *cpu) 693 { 694 DeviceState *mux; 695 DeviceState *dev; 696 void *bus; 697 698 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp"); 699 700 bus = qdev_get_child_bus(mux, "ssi0"); 701 ssi_create_slave(bus, "spitz-lcdtg"); 702 703 bus = qdev_get_child_bus(mux, "ssi1"); 704 dev = ssi_create_slave(bus, "ads7846"); 705 qdev_connect_gpio_out(dev, 0, 706 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT)); 707 708 bus = qdev_get_child_bus(mux, "ssi2"); 709 max1111 = ssi_create_slave(bus, "max1111"); 710 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); 711 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); 712 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); 713 714 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS, 715 qdev_get_gpio_in(mux, 0)); 716 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS, 717 qdev_get_gpio_in(mux, 1)); 718 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS, 719 qdev_get_gpio_in(mux, 2)); 720 } 721 722 /* CF Microdrive */ 723 724 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) 725 { 726 PCMCIACardState *md; 727 DriveInfo *dinfo; 728 729 dinfo = drive_get(IF_IDE, 0, 0); 730 if (!dinfo || dinfo->media_cd) 731 return; 732 md = dscm1xxxx_init(dinfo); 733 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); 734 } 735 736 /* Wm8750 and Max7310 on I2C */ 737 738 #define AKITA_MAX_ADDR 0x18 739 #define SPITZ_WM_ADDRL 0x1b 740 #define SPITZ_WM_ADDRH 0x1a 741 742 #define SPITZ_GPIO_WM 5 743 744 static void spitz_wm8750_addr(void *opaque, int line, int level) 745 { 746 I2CSlave *wm = (I2CSlave *) opaque; 747 if (level) 748 i2c_set_slave_address(wm, SPITZ_WM_ADDRH); 749 else 750 i2c_set_slave_address(wm, SPITZ_WM_ADDRL); 751 } 752 753 static void spitz_i2c_setup(PXA2xxState *cpu) 754 { 755 /* Attach the CPU on one end of our I2C bus. */ 756 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); 757 758 DeviceState *wm; 759 760 /* Attach a WM8750 to the bus */ 761 wm = i2c_create_slave(bus, TYPE_WM8750, 0); 762 763 spitz_wm8750_addr(wm, 0, 0); 764 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, 765 qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); 766 /* .. and to the sound interface. */ 767 cpu->i2s->opaque = wm; 768 cpu->i2s->codec_out = wm8750_dac_dat; 769 cpu->i2s->codec_in = wm8750_adc_dat; 770 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); 771 } 772 773 static void spitz_akita_i2c_setup(PXA2xxState *cpu) 774 { 775 /* Attach a Max7310 to Akita I2C bus. */ 776 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", 777 AKITA_MAX_ADDR); 778 } 779 780 /* Other peripherals */ 781 782 static void spitz_out_switch(void *opaque, int line, int level) 783 { 784 switch (line) { 785 case 0: 786 zaurus_printf("Charging %s.\n", level ? "off" : "on"); 787 break; 788 case 1: 789 zaurus_printf("Discharging %s.\n", level ? "on" : "off"); 790 break; 791 case 2: 792 zaurus_printf("Green LED %s.\n", level ? "on" : "off"); 793 break; 794 case 3: 795 zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); 796 break; 797 case 4: 798 spitz_bl_bit5(opaque, line, level); 799 break; 800 case 5: 801 spitz_bl_power(opaque, line, level); 802 break; 803 case 6: 804 spitz_adc_temp_on(opaque, line, level); 805 break; 806 } 807 } 808 809 #define SPITZ_SCP_LED_GREEN 1 810 #define SPITZ_SCP_JK_B 2 811 #define SPITZ_SCP_CHRG_ON 3 812 #define SPITZ_SCP_MUTE_L 4 813 #define SPITZ_SCP_MUTE_R 5 814 #define SPITZ_SCP_CF_POWER 6 815 #define SPITZ_SCP_LED_ORANGE 7 816 #define SPITZ_SCP_JK_A 8 817 #define SPITZ_SCP_ADC_TEMP_ON 9 818 #define SPITZ_SCP2_IR_ON 1 819 #define SPITZ_SCP2_AKIN_PULLUP 2 820 #define SPITZ_SCP2_BACKLIGHT_CONT 7 821 #define SPITZ_SCP2_BACKLIGHT_ON 8 822 #define SPITZ_SCP2_MIC_BIAS 9 823 824 static void spitz_scoop_gpio_setup(PXA2xxState *cpu, 825 DeviceState *scp0, DeviceState *scp1) 826 { 827 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8); 828 829 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]); 830 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]); 831 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]); 832 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]); 833 834 if (scp1) { 835 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]); 836 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]); 837 } 838 839 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]); 840 } 841 842 #define SPITZ_GPIO_HSYNC 22 843 #define SPITZ_GPIO_SD_DETECT 9 844 #define SPITZ_GPIO_SD_WP 81 845 #define SPITZ_GPIO_ON_RESET 89 846 #define SPITZ_GPIO_BAT_COVER 90 847 #define SPITZ_GPIO_CF1_IRQ 105 848 #define SPITZ_GPIO_CF1_CD 94 849 #define SPITZ_GPIO_CF2_IRQ 106 850 #define SPITZ_GPIO_CF2_CD 93 851 852 static int spitz_hsync; 853 854 static void spitz_lcd_hsync_handler(void *opaque, int line, int level) 855 { 856 PXA2xxState *cpu = (PXA2xxState *) opaque; 857 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); 858 spitz_hsync ^= 1; 859 } 860 861 static void spitz_reset(void *opaque, int line, int level) 862 { 863 if (level) { 864 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 865 } 866 } 867 868 static void spitz_gpio_setup(PXA2xxState *cpu, int slots) 869 { 870 qemu_irq lcd_hsync; 871 qemu_irq reset; 872 873 /* 874 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status 875 * read to satisfy broken guests that poll-wait for hsync. 876 * Simulating a real hsync event would be less practical and 877 * wouldn't guarantee that a guest ever exits the loop. 878 */ 879 spitz_hsync = 0; 880 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); 881 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); 882 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); 883 884 /* MMC/SD host */ 885 pxa2xx_mmci_handlers(cpu->mmc, 886 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), 887 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); 888 889 /* Battery lock always closed */ 890 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); 891 892 /* Handle reset */ 893 reset = qemu_allocate_irq(spitz_reset, cpu, 0); 894 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset); 895 896 /* PCMCIA signals: card's IRQ and Card-Detect */ 897 if (slots >= 1) 898 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], 899 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), 900 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); 901 if (slots >= 2) 902 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], 903 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), 904 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); 905 } 906 907 /* Board init. */ 908 enum spitz_model_e { spitz, akita, borzoi, terrier }; 909 910 #define SPITZ_RAM 0x04000000 911 #define SPITZ_ROM 0x00800000 912 913 static struct arm_boot_info spitz_binfo = { 914 .loader_start = PXA2XX_SDRAM_BASE, 915 .ram_size = 0x04000000, 916 }; 917 918 static void spitz_common_init(MachineState *machine, 919 enum spitz_model_e model, int arm_id) 920 { 921 PXA2xxState *mpu; 922 DeviceState *scp0, *scp1 = NULL; 923 MemoryRegion *address_space_mem = get_system_memory(); 924 MemoryRegion *rom = g_new(MemoryRegion, 1); 925 926 /* Setup CPU & memory */ 927 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, 928 machine->cpu_type); 929 930 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); 931 932 memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); 933 memory_region_add_subregion(address_space_mem, 0, rom); 934 935 /* Setup peripherals */ 936 spitz_keyboard_register(mpu); 937 938 spitz_ssp_attach(mpu); 939 940 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); 941 if (model != akita) { 942 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); 943 } 944 945 spitz_scoop_gpio_setup(mpu, scp0, scp1); 946 947 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); 948 949 spitz_i2c_setup(mpu); 950 951 if (model == akita) 952 spitz_akita_i2c_setup(mpu); 953 954 if (model == terrier) 955 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ 956 spitz_microdrive_attach(mpu, 1); 957 else if (model != akita) 958 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ 959 spitz_microdrive_attach(mpu, 0); 960 961 spitz_binfo.board_id = arm_id; 962 arm_load_kernel(mpu->cpu, machine, &spitz_binfo); 963 sl_bootparam_write(SL_PXA_PARAM_BASE); 964 } 965 966 static void spitz_init(MachineState *machine) 967 { 968 spitz_common_init(machine, spitz, 0x2c9); 969 } 970 971 static void borzoi_init(MachineState *machine) 972 { 973 spitz_common_init(machine, borzoi, 0x33f); 974 } 975 976 static void akita_init(MachineState *machine) 977 { 978 spitz_common_init(machine, akita, 0x2e8); 979 } 980 981 static void terrier_init(MachineState *machine) 982 { 983 spitz_common_init(machine, terrier, 0x33f); 984 } 985 986 static void akitapda_class_init(ObjectClass *oc, void *data) 987 { 988 MachineClass *mc = MACHINE_CLASS(oc); 989 990 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; 991 mc->init = akita_init; 992 mc->ignore_memory_transaction_failures = true; 993 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 994 } 995 996 static const TypeInfo akitapda_type = { 997 .name = MACHINE_TYPE_NAME("akita"), 998 .parent = TYPE_MACHINE, 999 .class_init = akitapda_class_init, 1000 }; 1001 1002 static void spitzpda_class_init(ObjectClass *oc, void *data) 1003 { 1004 MachineClass *mc = MACHINE_CLASS(oc); 1005 1006 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; 1007 mc->init = spitz_init; 1008 mc->block_default_type = IF_IDE; 1009 mc->ignore_memory_transaction_failures = true; 1010 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1011 } 1012 1013 static const TypeInfo spitzpda_type = { 1014 .name = MACHINE_TYPE_NAME("spitz"), 1015 .parent = TYPE_MACHINE, 1016 .class_init = spitzpda_class_init, 1017 }; 1018 1019 static void borzoipda_class_init(ObjectClass *oc, void *data) 1020 { 1021 MachineClass *mc = MACHINE_CLASS(oc); 1022 1023 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; 1024 mc->init = borzoi_init; 1025 mc->block_default_type = IF_IDE; 1026 mc->ignore_memory_transaction_failures = true; 1027 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1028 } 1029 1030 static const TypeInfo borzoipda_type = { 1031 .name = MACHINE_TYPE_NAME("borzoi"), 1032 .parent = TYPE_MACHINE, 1033 .class_init = borzoipda_class_init, 1034 }; 1035 1036 static void terrierpda_class_init(ObjectClass *oc, void *data) 1037 { 1038 MachineClass *mc = MACHINE_CLASS(oc); 1039 1040 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; 1041 mc->init = terrier_init; 1042 mc->block_default_type = IF_IDE; 1043 mc->ignore_memory_transaction_failures = true; 1044 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5"); 1045 } 1046 1047 static const TypeInfo terrierpda_type = { 1048 .name = MACHINE_TYPE_NAME("terrier"), 1049 .parent = TYPE_MACHINE, 1050 .class_init = terrierpda_class_init, 1051 }; 1052 1053 static void spitz_machine_init(void) 1054 { 1055 type_register_static(&akitapda_type); 1056 type_register_static(&spitzpda_type); 1057 type_register_static(&borzoipda_type); 1058 type_register_static(&terrierpda_type); 1059 } 1060 1061 type_init(spitz_machine_init) 1062 1063 static bool is_version_0(void *opaque, int version_id) 1064 { 1065 return version_id == 0; 1066 } 1067 1068 static VMStateDescription vmstate_sl_nand_info = { 1069 .name = "sl-nand", 1070 .version_id = 0, 1071 .minimum_version_id = 0, 1072 .fields = (VMStateField[]) { 1073 VMSTATE_UINT8(ctl, SLNANDState), 1074 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), 1075 VMSTATE_END_OF_LIST(), 1076 }, 1077 }; 1078 1079 static Property sl_nand_properties[] = { 1080 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), 1081 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), 1082 DEFINE_PROP_END_OF_LIST(), 1083 }; 1084 1085 static void sl_nand_class_init(ObjectClass *klass, void *data) 1086 { 1087 DeviceClass *dc = DEVICE_CLASS(klass); 1088 1089 dc->vmsd = &vmstate_sl_nand_info; 1090 device_class_set_props(dc, sl_nand_properties); 1091 dc->realize = sl_nand_realize; 1092 /* Reason: init() method uses drive_get() */ 1093 dc->user_creatable = false; 1094 } 1095 1096 static const TypeInfo sl_nand_info = { 1097 .name = TYPE_SL_NAND, 1098 .parent = TYPE_SYS_BUS_DEVICE, 1099 .instance_size = sizeof(SLNANDState), 1100 .instance_init = sl_nand_init, 1101 .class_init = sl_nand_class_init, 1102 }; 1103 1104 static VMStateDescription vmstate_spitz_kbd = { 1105 .name = "spitz-keyboard", 1106 .version_id = 1, 1107 .minimum_version_id = 0, 1108 .post_load = spitz_keyboard_post_load, 1109 .fields = (VMStateField[]) { 1110 VMSTATE_UINT16(sense_state, SpitzKeyboardState), 1111 VMSTATE_UINT16(strobe_state, SpitzKeyboardState), 1112 VMSTATE_UNUSED_TEST(is_version_0, 5), 1113 VMSTATE_END_OF_LIST(), 1114 }, 1115 }; 1116 1117 static void spitz_keyboard_class_init(ObjectClass *klass, void *data) 1118 { 1119 DeviceClass *dc = DEVICE_CLASS(klass); 1120 1121 dc->vmsd = &vmstate_spitz_kbd; 1122 dc->realize = spitz_keyboard_realize; 1123 } 1124 1125 static const TypeInfo spitz_keyboard_info = { 1126 .name = TYPE_SPITZ_KEYBOARD, 1127 .parent = TYPE_SYS_BUS_DEVICE, 1128 .instance_size = sizeof(SpitzKeyboardState), 1129 .instance_init = spitz_keyboard_init, 1130 .class_init = spitz_keyboard_class_init, 1131 }; 1132 1133 static const VMStateDescription vmstate_corgi_ssp_regs = { 1134 .name = "corgi-ssp", 1135 .version_id = 2, 1136 .minimum_version_id = 2, 1137 .fields = (VMStateField[]) { 1138 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState), 1139 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), 1140 VMSTATE_END_OF_LIST(), 1141 } 1142 }; 1143 1144 static void corgi_ssp_class_init(ObjectClass *klass, void *data) 1145 { 1146 DeviceClass *dc = DEVICE_CLASS(klass); 1147 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1148 1149 k->realize = corgi_ssp_realize; 1150 k->transfer = corgi_ssp_transfer; 1151 dc->vmsd = &vmstate_corgi_ssp_regs; 1152 } 1153 1154 static const TypeInfo corgi_ssp_info = { 1155 .name = "corgi-ssp", 1156 .parent = TYPE_SSI_SLAVE, 1157 .instance_size = sizeof(CorgiSSPState), 1158 .class_init = corgi_ssp_class_init, 1159 }; 1160 1161 static const VMStateDescription vmstate_spitz_lcdtg_regs = { 1162 .name = "spitz-lcdtg", 1163 .version_id = 1, 1164 .minimum_version_id = 1, 1165 .fields = (VMStateField[]) { 1166 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG), 1167 VMSTATE_UINT32(bl_intensity, SpitzLCDTG), 1168 VMSTATE_UINT32(bl_power, SpitzLCDTG), 1169 VMSTATE_END_OF_LIST(), 1170 } 1171 }; 1172 1173 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) 1174 { 1175 DeviceClass *dc = DEVICE_CLASS(klass); 1176 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1177 1178 k->realize = spitz_lcdtg_realize; 1179 k->transfer = spitz_lcdtg_transfer; 1180 dc->vmsd = &vmstate_spitz_lcdtg_regs; 1181 } 1182 1183 static const TypeInfo spitz_lcdtg_info = { 1184 .name = "spitz-lcdtg", 1185 .parent = TYPE_SSI_SLAVE, 1186 .instance_size = sizeof(SpitzLCDTG), 1187 .class_init = spitz_lcdtg_class_init, 1188 }; 1189 1190 static void spitz_register_types(void) 1191 { 1192 type_register_static(&corgi_ssp_info); 1193 type_register_static(&spitz_lcdtg_info); 1194 type_register_static(&spitz_keyboard_info); 1195 type_register_static(&sl_nand_info); 1196 } 1197 1198 type_init(spitz_register_types) 1199