1 /* 2 * Machine definitions for boards featuring an NPCM7xx SoC. 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * for more details. 15 */ 16 17 #include "qemu/osdep.h" 18 19 #include "exec/address-spaces.h" 20 #include "hw/arm/npcm7xx.h" 21 #include "hw/core/cpu.h" 22 #include "hw/loader.h" 23 #include "hw/qdev-properties.h" 24 #include "qapi/error.h" 25 #include "qemu-common.h" 26 #include "qemu/units.h" 27 #include "sysemu/sysemu.h" 28 29 #define NPCM750_EVB_POWER_ON_STRAPS 0x00001ff7 30 #define QUANTA_GSJ_POWER_ON_STRAPS 0x00001fff 31 32 static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin"; 33 34 static void npcm7xx_load_bootrom(MachineState *machine, NPCM7xxState *soc) 35 { 36 const char *bios_name = machine->firmware ?: npcm7xx_default_bootrom; 37 g_autofree char *filename = NULL; 38 int ret; 39 40 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 41 if (!filename) { 42 error_report("Could not find ROM image '%s'", bios_name); 43 if (!machine->kernel_filename) { 44 /* We can't boot without a bootrom or a kernel image. */ 45 exit(1); 46 } 47 return; 48 } 49 ret = load_image_mr(filename, &soc->irom); 50 if (ret < 0) { 51 error_report("Failed to load ROM image '%s'", filename); 52 exit(1); 53 } 54 } 55 56 static void npcm7xx_connect_flash(NPCM7xxFIUState *fiu, int cs_no, 57 const char *flash_type, DriveInfo *dinfo) 58 { 59 DeviceState *flash; 60 qemu_irq flash_cs; 61 62 flash = qdev_new(flash_type); 63 if (dinfo) { 64 qdev_prop_set_drive(flash, "drive", blk_by_legacy_dinfo(dinfo)); 65 } 66 qdev_realize_and_unref(flash, BUS(fiu->spi), &error_fatal); 67 68 flash_cs = qdev_get_gpio_in_named(flash, SSI_GPIO_CS, 0); 69 qdev_connect_gpio_out_named(DEVICE(fiu), "cs", cs_no, flash_cs); 70 } 71 72 static void npcm7xx_connect_dram(NPCM7xxState *soc, MemoryRegion *dram) 73 { 74 memory_region_add_subregion(get_system_memory(), NPCM7XX_DRAM_BA, dram); 75 76 object_property_set_link(OBJECT(soc), "dram-mr", OBJECT(dram), 77 &error_abort); 78 } 79 80 static NPCM7xxState *npcm7xx_create_soc(MachineState *machine, 81 uint32_t hw_straps) 82 { 83 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine); 84 MachineClass *mc = &nmc->parent; 85 Object *obj; 86 87 if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { 88 error_report("This board can only be used with %s", 89 mc->default_cpu_type); 90 exit(1); 91 } 92 93 obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc", 94 &error_abort, NULL); 95 object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort); 96 97 return NPCM7XX(obj); 98 } 99 100 static void npcm750_evb_init(MachineState *machine) 101 { 102 NPCM7xxState *soc; 103 104 soc = npcm7xx_create_soc(machine, NPCM750_EVB_POWER_ON_STRAPS); 105 npcm7xx_connect_dram(soc, machine->ram); 106 qdev_realize(DEVICE(soc), NULL, &error_fatal); 107 108 npcm7xx_load_bootrom(machine, soc); 109 npcm7xx_connect_flash(&soc->fiu[0], 0, "w25q256", drive_get(IF_MTD, 0, 0)); 110 npcm7xx_load_kernel(machine, soc); 111 } 112 113 static void quanta_gsj_init(MachineState *machine) 114 { 115 NPCM7xxState *soc; 116 117 soc = npcm7xx_create_soc(machine, QUANTA_GSJ_POWER_ON_STRAPS); 118 npcm7xx_connect_dram(soc, machine->ram); 119 qdev_realize(DEVICE(soc), NULL, &error_fatal); 120 121 npcm7xx_load_bootrom(machine, soc); 122 npcm7xx_connect_flash(&soc->fiu[0], 0, "mx25l25635e", 123 drive_get(IF_MTD, 0, 0)); 124 npcm7xx_load_kernel(machine, soc); 125 } 126 127 static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type) 128 { 129 NPCM7xxClass *sc = NPCM7XX_CLASS(object_class_by_name(type)); 130 MachineClass *mc = MACHINE_CLASS(nmc); 131 132 nmc->soc_type = type; 133 mc->default_cpus = mc->min_cpus = mc->max_cpus = sc->num_cpus; 134 } 135 136 static void npcm7xx_machine_class_init(ObjectClass *oc, void *data) 137 { 138 MachineClass *mc = MACHINE_CLASS(oc); 139 140 mc->no_floppy = 1; 141 mc->no_cdrom = 1; 142 mc->no_parallel = 1; 143 mc->default_ram_id = "ram"; 144 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9"); 145 } 146 147 /* 148 * Schematics: 149 * https://github.com/Nuvoton-Israel/nuvoton-info/blob/master/npcm7xx-poleg/evaluation-board/board_deliverables/NPCM750x_EB_ver.A1.1_COMPLETE.pdf 150 */ 151 static void npcm750_evb_machine_class_init(ObjectClass *oc, void *data) 152 { 153 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc); 154 MachineClass *mc = MACHINE_CLASS(oc); 155 156 npcm7xx_set_soc_type(nmc, TYPE_NPCM750); 157 158 mc->desc = "Nuvoton NPCM750 Evaluation Board (Cortex A9)"; 159 mc->init = npcm750_evb_init; 160 mc->default_ram_size = 512 * MiB; 161 }; 162 163 static void gsj_machine_class_init(ObjectClass *oc, void *data) 164 { 165 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc); 166 MachineClass *mc = MACHINE_CLASS(oc); 167 168 npcm7xx_set_soc_type(nmc, TYPE_NPCM730); 169 170 mc->desc = "Quanta GSJ (Cortex A9)"; 171 mc->init = quanta_gsj_init; 172 mc->default_ram_size = 512 * MiB; 173 }; 174 175 static const TypeInfo npcm7xx_machine_types[] = { 176 { 177 .name = TYPE_NPCM7XX_MACHINE, 178 .parent = TYPE_MACHINE, 179 .instance_size = sizeof(NPCM7xxMachine), 180 .class_size = sizeof(NPCM7xxMachineClass), 181 .class_init = npcm7xx_machine_class_init, 182 .abstract = true, 183 }, { 184 .name = MACHINE_TYPE_NAME("npcm750-evb"), 185 .parent = TYPE_NPCM7XX_MACHINE, 186 .class_init = npcm750_evb_machine_class_init, 187 }, { 188 .name = MACHINE_TYPE_NAME("quanta-gsj"), 189 .parent = TYPE_NPCM7XX_MACHINE, 190 .class_init = gsj_machine_class_init, 191 }, 192 }; 193 194 DEFINE_TYPES(npcm7xx_machine_types) 195