xref: /openbmc/qemu/hw/arm/mcimx7d-sabre.c (revision c8ca2a23)
1 /*
2  * Copyright (c) 2018, Impinj, Inc.
3  *
4  * MCIMX7D_SABRE Board System emulation.
5  *
6  * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
7  *
8  * This code is licensed under the GPL, version 2 or later.
9  * See the file `COPYING' in the top level directory.
10  *
11  * It (partially) emulates a mcimx7d_sabre board, with a Freescale
12  * i.MX7 SoC
13  */
14 
15 #include "qemu/osdep.h"
16 #include "qapi/error.h"
17 #include "qemu-common.h"
18 #include "hw/arm/fsl-imx7.h"
19 #include "hw/boards.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/device_tree.h"
22 #include "qemu/error-report.h"
23 #include "sysemu/qtest.h"
24 #include "net/net.h"
25 
26 typedef struct {
27     FslIMX7State soc;
28     MemoryRegion ram;
29 } MCIMX7Sabre;
30 
31 static void mcimx7d_sabre_init(MachineState *machine)
32 {
33     static struct arm_boot_info boot_info;
34     MCIMX7Sabre *s = g_new0(MCIMX7Sabre, 1);
35     Object *soc;
36     int i;
37 
38     if (machine->ram_size > FSL_IMX7_MMDC_SIZE) {
39         error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
40                      machine->ram_size, FSL_IMX7_MMDC_SIZE);
41         exit(1);
42     }
43 
44     boot_info = (struct arm_boot_info) {
45         .loader_start = FSL_IMX7_MMDC_ADDR,
46         .board_id = -1,
47         .ram_size = machine->ram_size,
48         .kernel_filename = machine->kernel_filename,
49         .kernel_cmdline = machine->kernel_cmdline,
50         .initrd_filename = machine->initrd_filename,
51         .nb_cpus = smp_cpus,
52     };
53 
54     object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX7);
55     soc = OBJECT(&s->soc);
56     object_property_add_child(OBJECT(machine), "soc", soc, &error_fatal);
57     object_property_set_bool(soc, true, "realized", &error_fatal);
58 
59     memory_region_allocate_system_memory(&s->ram, NULL, "mcimx7d-sabre.ram",
60                                          machine->ram_size);
61     memory_region_add_subregion(get_system_memory(),
62                                 FSL_IMX7_MMDC_ADDR, &s->ram);
63 
64     for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) {
65         BusState *bus;
66         DeviceState *carddev;
67         DriveInfo *di;
68         BlockBackend *blk;
69 
70         di = drive_get_next(IF_SD);
71         blk = di ? blk_by_legacy_dinfo(di) : NULL;
72         bus = qdev_get_child_bus(DEVICE(&s->soc.usdhc[i]), "sd-bus");
73         carddev = qdev_create(bus, TYPE_SD_CARD);
74         qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
75         object_property_set_bool(OBJECT(carddev), true,
76                                  "realized", &error_fatal);
77     }
78 
79     if (!qtest_enabled()) {
80         arm_load_kernel(&s->soc.cpu[0], &boot_info);
81     }
82 }
83 
84 static void mcimx7d_sabre_machine_init(MachineClass *mc)
85 {
86     mc->desc = "Freescale i.MX7 DUAL SABRE (Cortex A7)";
87     mc->init = mcimx7d_sabre_init;
88     mc->max_cpus = FSL_IMX7_NUM_CPUS;
89 }
90 DEFINE_MACHINE("mcimx7d-sabre", mcimx7d_sabre_machine_init)
91