xref: /openbmc/qemu/hw/arm/mcimx7d-sabre.c (revision c00506aa)
1 /*
2  * Copyright (c) 2018, Impinj, Inc.
3  *
4  * MCIMX7D_SABRE Board System emulation.
5  *
6  * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
7  *
8  * This code is licensed under the GPL, version 2 or later.
9  * See the file `COPYING' in the top level directory.
10  *
11  * It (partially) emulates a mcimx7d_sabre board, with a Freescale
12  * i.MX7 SoC
13  */
14 
15 #include "qemu/osdep.h"
16 #include "qapi/error.h"
17 #include "hw/arm/fsl-imx7.h"
18 #include "hw/boards.h"
19 #include "hw/qdev-properties.h"
20 #include "sysemu/sysemu.h"
21 #include "qemu/error-report.h"
22 #include "sysemu/qtest.h"
23 
24 static void mcimx7d_sabre_init(MachineState *machine)
25 {
26     static struct arm_boot_info boot_info;
27     FslIMX7State *s;
28     int i;
29 
30     if (machine->ram_size > FSL_IMX7_MMDC_SIZE) {
31         error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
32                      machine->ram_size, FSL_IMX7_MMDC_SIZE);
33         exit(1);
34     }
35 
36     boot_info = (struct arm_boot_info) {
37         .loader_start = FSL_IMX7_MMDC_ADDR,
38         .board_id = -1,
39         .ram_size = machine->ram_size,
40         .nb_cpus = machine->smp.cpus,
41     };
42 
43     s = FSL_IMX7(object_new(TYPE_FSL_IMX7));
44     object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
45     qdev_realize(DEVICE(s), NULL, &error_fatal);
46 
47     memory_region_add_subregion(get_system_memory(), FSL_IMX7_MMDC_ADDR,
48                                 machine->ram);
49 
50     for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) {
51         BusState *bus;
52         DeviceState *carddev;
53         DriveInfo *di;
54         BlockBackend *blk;
55 
56         di = drive_get_next(IF_SD);
57         blk = di ? blk_by_legacy_dinfo(di) : NULL;
58         bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus");
59         carddev = qdev_new(TYPE_SD_CARD);
60         qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
61         qdev_realize_and_unref(carddev, bus, &error_fatal);
62     }
63 
64     if (!qtest_enabled()) {
65         arm_load_kernel(&s->cpu[0], machine, &boot_info);
66     }
67 }
68 
69 static void mcimx7d_sabre_machine_init(MachineClass *mc)
70 {
71     mc->desc = "Freescale i.MX7 DUAL SABRE (Cortex A7)";
72     mc->init = mcimx7d_sabre_init;
73     mc->max_cpus = FSL_IMX7_NUM_CPUS;
74     mc->default_ram_id = "mcimx7d-sabre.ram";
75 }
76 DEFINE_MACHINE("mcimx7d-sabre", mcimx7d_sabre_machine_init)
77