1 /* 2 * MAX78000 SOC 3 * 4 * Copyright (c) 2025 Jackson Donaldson <jcksn@duck.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0-or-later 7 * 8 * Implementation based on stm32f205 and Max78000 user guide at 9 * https://www.analog.com/media/en/technical-documentation/user-guides/max78000-user-guide.pdf 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qapi/error.h" 14 #include "system/address-spaces.h" 15 #include "system/system.h" 16 #include "hw/arm/max78000_soc.h" 17 #include "hw/qdev-clock.h" 18 #include "hw/misc/unimp.h" 19 20 static const uint32_t max78000_icc_addr[] = {0x4002a000, 0x4002a800}; 21 22 static void max78000_soc_initfn(Object *obj) 23 { 24 MAX78000State *s = MAX78000_SOC(obj); 25 int i; 26 27 object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M); 28 29 for (i = 0; i < MAX78000_NUM_ICC; i++) { 30 g_autofree char *name = g_strdup_printf("icc%d", i); 31 object_initialize_child(obj, name, &s->icc[i], TYPE_MAX78000_ICC); 32 } 33 34 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); 35 } 36 37 static void max78000_soc_realize(DeviceState *dev_soc, Error **errp) 38 { 39 MAX78000State *s = MAX78000_SOC(dev_soc); 40 MemoryRegion *system_memory = get_system_memory(); 41 DeviceState *dev, *armv7m; 42 Error *err = NULL; 43 int i; 44 45 if (!clock_has_source(s->sysclk)) { 46 error_setg(errp, "sysclk clock must be wired up by the board code"); 47 return; 48 } 49 50 memory_region_init_rom(&s->flash, OBJECT(dev_soc), "MAX78000.flash", 51 FLASH_SIZE, &err); 52 if (err != NULL) { 53 error_propagate(errp, err); 54 return; 55 } 56 57 memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); 58 59 memory_region_init_ram(&s->sram, NULL, "MAX78000.sram", SRAM_SIZE, 60 &err); 61 if (err != NULL) { 62 error_propagate(errp, err); 63 return; 64 } 65 memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram); 66 67 armv7m = DEVICE(&s->armv7m); 68 69 /* 70 * The MAX78000 user guide's Interrupt Vector Table section 71 * suggests that there are 120 IRQs in the text, while only listing 72 * 104 in table 5-1. Implement the more generous of the two. 73 * This has not been tested in hardware. 74 */ 75 qdev_prop_set_uint32(armv7m, "num-irq", 120); 76 qdev_prop_set_uint8(armv7m, "num-prio-bits", 3); 77 qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4")); 78 qdev_prop_set_bit(armv7m, "enable-bitband", true); 79 qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk); 80 object_property_set_link(OBJECT(&s->armv7m), "memory", 81 OBJECT(system_memory), &error_abort); 82 if (!sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), errp)) { 83 return; 84 } 85 86 for (i = 0; i < MAX78000_NUM_ICC; i++) { 87 dev = DEVICE(&(s->icc[i])); 88 sysbus_realize(SYS_BUS_DEVICE(dev), errp); 89 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, max78000_icc_addr[i]); 90 } 91 92 create_unimplemented_device("globalControl", 0x40000000, 0x400); 93 create_unimplemented_device("systemInterface", 0x40000400, 0x400); 94 create_unimplemented_device("functionControl", 0x40000800, 0x400); 95 create_unimplemented_device("watchdogTimer0", 0x40003000, 0x400); 96 create_unimplemented_device("dynamicVoltScale", 0x40003c00, 0x40); 97 create_unimplemented_device("SIMO", 0x40004400, 0x400); 98 create_unimplemented_device("trimSystemInit", 0x40005400, 0x400); 99 create_unimplemented_device("generalCtrlFunc", 0x40005800, 0x400); 100 create_unimplemented_device("wakeupTimer", 0x40006400, 0x400); 101 create_unimplemented_device("powerSequencer", 0x40006800, 0x400); 102 create_unimplemented_device("miscControl", 0x40006c00, 0x400); 103 104 create_unimplemented_device("aes", 0x40007400, 0x400); 105 create_unimplemented_device("aesKey", 0x40007800, 0x400); 106 107 create_unimplemented_device("gpio0", 0x40008000, 0x1000); 108 create_unimplemented_device("gpio1", 0x40009000, 0x1000); 109 110 create_unimplemented_device("parallelCamInterface", 0x4000e000, 0x1000); 111 create_unimplemented_device("CRC", 0x4000f000, 0x1000); 112 113 create_unimplemented_device("timer0", 0x40010000, 0x1000); 114 create_unimplemented_device("timer1", 0x40011000, 0x1000); 115 create_unimplemented_device("timer2", 0x40012000, 0x1000); 116 create_unimplemented_device("timer3", 0x40013000, 0x1000); 117 118 create_unimplemented_device("i2c0", 0x4001d000, 0x1000); 119 create_unimplemented_device("i2c1", 0x4001e000, 0x1000); 120 create_unimplemented_device("i2c2", 0x4001f000, 0x1000); 121 122 create_unimplemented_device("standardDMA", 0x40028000, 0x1000); 123 create_unimplemented_device("flashController0", 0x40029000, 0x400); 124 125 create_unimplemented_device("adc", 0x40034000, 0x1000); 126 create_unimplemented_device("pulseTrainEngine", 0x4003c000, 0xa0); 127 create_unimplemented_device("oneWireMaster", 0x4003d000, 0x1000); 128 create_unimplemented_device("semaphore", 0x4003e000, 0x1000); 129 130 create_unimplemented_device("uart0", 0x40042000, 0x1000); 131 create_unimplemented_device("uart1", 0x40043000, 0x1000); 132 create_unimplemented_device("uart2", 0x40044000, 0x1000); 133 134 create_unimplemented_device("spi1", 0x40046000, 0x2000); 135 create_unimplemented_device("trng", 0x4004d000, 0x1000); 136 create_unimplemented_device("i2s", 0x40060000, 0x1000); 137 create_unimplemented_device("lowPowerControl", 0x40080000, 0x400); 138 create_unimplemented_device("gpio2", 0x40080400, 0x200); 139 create_unimplemented_device("lowPowerWatchdogTimer", 0x40080800, 0x400); 140 create_unimplemented_device("lowPowerTimer4", 0x40080c00, 0x400); 141 142 create_unimplemented_device("lowPowerTimer5", 0x40081000, 0x400); 143 create_unimplemented_device("lowPowerUART0", 0x40081400, 0x400); 144 create_unimplemented_device("lowPowerComparator", 0x40088000, 0x400); 145 146 create_unimplemented_device("spi0", 0x400be000, 0x400); 147 148 /* 149 * The MAX78000 user guide's base address map lists the CNN TX FIFO as 150 * beginning at 0x400c0400 and ending at 0x400c0400. Given that CNN_FIFO 151 * is listed as having data accessible up to offset 0x1000, the user 152 * guide is likely incorrect. 153 */ 154 create_unimplemented_device("cnnTxFIFO", 0x400c0400, 0x2000); 155 156 create_unimplemented_device("cnnGlobalControl", 0x50000000, 0x10000); 157 create_unimplemented_device("cnnx16quad0", 0x50100000, 0x40000); 158 create_unimplemented_device("cnnx16quad1", 0x50500000, 0x40000); 159 create_unimplemented_device("cnnx16quad2", 0x50900000, 0x40000); 160 create_unimplemented_device("cnnx16quad3", 0x50d00000, 0x40000); 161 162 } 163 164 static void max78000_soc_class_init(ObjectClass *klass, const void *data) 165 { 166 DeviceClass *dc = DEVICE_CLASS(klass); 167 168 dc->realize = max78000_soc_realize; 169 } 170 171 static const TypeInfo max78000_soc_info = { 172 .name = TYPE_MAX78000_SOC, 173 .parent = TYPE_SYS_BUS_DEVICE, 174 .instance_size = sizeof(MAX78000State), 175 .instance_init = max78000_soc_initfn, 176 .class_init = max78000_soc_class_init, 177 }; 178 179 static void max78000_soc_types(void) 180 { 181 type_register_static(&max78000_soc_info); 182 } 183 184 type_init(max78000_soc_types) 185