xref: /openbmc/qemu/hw/arm/kzm.c (revision d341d9f3)
1 /*
2  * KZM Board System emulation.
3  *
4  * Copyright (c) 2008 OKL and 2011 NICTA
5  * Written by Hans at OK-Labs
6  * Updated by Peter Chubb.
7  *
8  * This code is licensed under the GPL, version 2 or later.
9  * See the file `COPYING' in the top level directory.
10  *
11  * It (partially) emulates a Kyoto Microcomputer
12  * KZM-ARM11-01 evaluation board, with a Freescale
13  * i.MX31 SoC
14  */
15 
16 #include "qemu/osdep.h"
17 #include "hw/arm/fsl-imx31.h"
18 #include "hw/boards.h"
19 #include "qemu/error-report.h"
20 #include "exec/address-spaces.h"
21 #include "net/net.h"
22 #include "hw/devices.h"
23 #include "hw/char/serial.h"
24 #include "sysemu/qtest.h"
25 
26 /* Memory map for Kzm Emulation Baseboard:
27  * 0x00000000-0x7fffffff See i.MX31 SOC for support
28  * 0x80000000-0x8fffffff RAM                  EMULATED
29  * 0x90000000-0x9fffffff RAM                  EMULATED
30  * 0xa0000000-0xafffffff Flash                IGNORED
31  * 0xb0000000-0xb3ffffff Unavailable          IGNORED
32  * 0xb4000000-0xb4000fff 8-bit free space     IGNORED
33  * 0xb4001000-0xb400100f Board control        IGNORED
34  *  0xb4001003           DIP switch
35  * 0xb4001010-0xb400101f 7-segment LED        IGNORED
36  * 0xb4001020-0xb400102f LED                  IGNORED
37  * 0xb4001030-0xb400103f LED                  IGNORED
38  * 0xb4001040-0xb400104f FPGA, UART           EMULATED
39  * 0xb4001050-0xb400105f FPGA, UART           EMULATED
40  * 0xb4001060-0xb40fffff FPGA                 IGNORED
41  * 0xb6000000-0xb61fffff LAN controller       EMULATED
42  * 0xb6200000-0xb62fffff FPGA NAND Controller IGNORED
43  * 0xb6300000-0xb7ffffff Free                 IGNORED
44  * 0xb8000000-0xb8004fff Memory control registers IGNORED
45  * 0xc0000000-0xc3ffffff PCMCIA/CF            IGNORED
46  * 0xc4000000-0xffffffff Reserved             IGNORED
47  */
48 
49 typedef struct IMX31KZM {
50     FslIMX31State soc;
51     MemoryRegion ram;
52     MemoryRegion ram_alias;
53 } IMX31KZM;
54 
55 #define KZM_RAM_ADDR            (FSL_IMX31_SDRAM0_ADDR)
56 #define KZM_FPGA_ADDR           (FSL_IMX31_CS4_ADDR + 0x1040)
57 #define KZM_LAN9118_ADDR        (FSL_IMX31_CS5_ADDR)
58 
59 static struct arm_boot_info kzm_binfo = {
60     .loader_start = KZM_RAM_ADDR,
61     .board_id = 1722,
62 };
63 
64 static void kzm_init(MachineState *machine)
65 {
66     IMX31KZM *s = g_new0(IMX31KZM, 1);
67     Error *err = NULL;
68     unsigned int ram_size;
69     unsigned int alias_offset;
70     unsigned int i;
71 
72     object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX31);
73     object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
74                               &error_abort);
75 
76     object_property_set_bool(OBJECT(&s->soc), true, "realized", &err);
77     if (err != NULL) {
78         error_report_err(err);
79         exit(1);
80     }
81 
82     /* Check the amount of memory is compatible with the SOC */
83     if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) {
84         error_report("WARNING: RAM size " RAM_ADDR_FMT " above max supported, "
85                      "reduced to %x", machine->ram_size,
86                      FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE);
87         machine->ram_size = FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE;
88     }
89 
90     memory_region_allocate_system_memory(&s->ram, NULL, "kzm.ram",
91                                          machine->ram_size);
92     memory_region_add_subregion(get_system_memory(), FSL_IMX31_SDRAM0_ADDR,
93                                 &s->ram);
94 
95     /* initialize the alias memory if any */
96     for (i = 0, ram_size = machine->ram_size, alias_offset = 0;
97          (i < 2) && ram_size; i++) {
98         unsigned int size;
99         static const struct {
100             hwaddr addr;
101             unsigned int size;
102         } ram[2] = {
103             { FSL_IMX31_SDRAM0_ADDR, FSL_IMX31_SDRAM0_SIZE },
104             { FSL_IMX31_SDRAM1_ADDR, FSL_IMX31_SDRAM1_SIZE },
105         };
106 
107         size = MIN(ram_size, ram[i].size);
108 
109         ram_size -= size;
110 
111         if (size < ram[i].size) {
112             memory_region_init_alias(&s->ram_alias, NULL, "ram.alias",
113                                      &s->ram, alias_offset, ram[i].size - size);
114             memory_region_add_subregion(get_system_memory(),
115                                         ram[i].addr + size, &s->ram_alias);
116         }
117 
118         alias_offset += ram[i].size;
119     }
120 
121     if (nd_table[0].used) {
122         lan9118_init(&nd_table[0], KZM_LAN9118_ADDR,
123                      qdev_get_gpio_in(DEVICE(&s->soc.avic), 52));
124     }
125 
126     if (serial_hds[2]) { /* touchscreen */
127         serial_mm_init(get_system_memory(), KZM_FPGA_ADDR+0x10, 0,
128                        qdev_get_gpio_in(DEVICE(&s->soc.avic), 52),
129                        14745600, serial_hds[2], DEVICE_NATIVE_ENDIAN);
130     }
131 
132     kzm_binfo.ram_size = machine->ram_size;
133     kzm_binfo.kernel_filename = machine->kernel_filename;
134     kzm_binfo.kernel_cmdline = machine->kernel_cmdline;
135     kzm_binfo.initrd_filename = machine->initrd_filename;
136     kzm_binfo.nb_cpus = 1;
137 
138     if (!qtest_enabled()) {
139         arm_load_kernel(&s->soc.cpu, &kzm_binfo);
140     }
141 }
142 
143 static void kzm_machine_init(MachineClass *mc)
144 {
145     mc->desc = "ARM KZM Emulation Baseboard (ARM1136)";
146     mc->init = kzm_init;
147 }
148 
149 DEFINE_MACHINE("kzm", kzm_machine_init)
150