xref: /openbmc/qemu/hw/arm/kzm.c (revision 9af9e0fe)
1 /*
2  * KZM Board System emulation.
3  *
4  * Copyright (c) 2008 OKL and 2011 NICTA
5  * Written by Hans at OK-Labs
6  * Updated by Peter Chubb.
7  *
8  * This code is licensed under the GPL, version 2 or later.
9  * See the file `COPYING' in the top level directory.
10  *
11  * It (partially) emulates a Kyoto Microcomputer
12  * KZM-ARM11-01 evaluation board, with a Freescale
13  * i.MX31 SoC
14  */
15 
16 #include "hw/arm/fsl-imx31.h"
17 #include "hw/boards.h"
18 #include "qemu/error-report.h"
19 #include "exec/address-spaces.h"
20 #include "net/net.h"
21 #include "hw/devices.h"
22 #include "hw/char/serial.h"
23 #include "sysemu/qtest.h"
24 
25 /* Memory map for Kzm Emulation Baseboard:
26  * 0x00000000-0x7fffffff See i.MX31 SOC for support
27  * 0x80000000-0x8fffffff RAM                  EMULATED
28  * 0x90000000-0x9fffffff RAM                  EMULATED
29  * 0xa0000000-0xafffffff Flash                IGNORED
30  * 0xb0000000-0xb3ffffff Unavailable          IGNORED
31  * 0xb4000000-0xb4000fff 8-bit free space     IGNORED
32  * 0xb4001000-0xb400100f Board control        IGNORED
33  *  0xb4001003           DIP switch
34  * 0xb4001010-0xb400101f 7-segment LED        IGNORED
35  * 0xb4001020-0xb400102f LED                  IGNORED
36  * 0xb4001030-0xb400103f LED                  IGNORED
37  * 0xb4001040-0xb400104f FPGA, UART           EMULATED
38  * 0xb4001050-0xb400105f FPGA, UART           EMULATED
39  * 0xb4001060-0xb40fffff FPGA                 IGNORED
40  * 0xb6000000-0xb61fffff LAN controller       EMULATED
41  * 0xb6200000-0xb62fffff FPGA NAND Controller IGNORED
42  * 0xb6300000-0xb7ffffff Free                 IGNORED
43  * 0xb8000000-0xb8004fff Memory control registers IGNORED
44  * 0xc0000000-0xc3ffffff PCMCIA/CF            IGNORED
45  * 0xc4000000-0xffffffff Reserved             IGNORED
46  */
47 
48 typedef struct IMX31KZM {
49     FslIMX31State soc;
50     MemoryRegion ram;
51     MemoryRegion ram_alias;
52 } IMX31KZM;
53 
54 #define KZM_RAM_ADDR            (FSL_IMX31_SDRAM0_ADDR)
55 #define KZM_FPGA_ADDR           (FSL_IMX31_CS4_ADDR + 0x1040)
56 #define KZM_LAN9118_ADDR        (FSL_IMX31_CS5_ADDR)
57 
58 static struct arm_boot_info kzm_binfo = {
59     .loader_start = KZM_RAM_ADDR,
60     .board_id = 1722,
61 };
62 
63 static void kzm_init(MachineState *machine)
64 {
65     IMX31KZM *s = g_new0(IMX31KZM, 1);
66     Error *err = NULL;
67     unsigned int ram_size;
68     unsigned int alias_offset;
69     unsigned int i;
70 
71     object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX31);
72     object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
73                               &error_abort);
74 
75     object_property_set_bool(OBJECT(&s->soc), true, "realized", &err);
76     if (err != NULL) {
77         error_report_err(err);
78         exit(1);
79     }
80 
81     /* Check the amount of memory is compatible with the SOC */
82     if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) {
83         error_report("WARNING: RAM size " RAM_ADDR_FMT " above max supported, "
84                      "reduced to %x", machine->ram_size,
85                      FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE);
86         machine->ram_size = FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE;
87     }
88 
89     memory_region_allocate_system_memory(&s->ram, NULL, "kzm.ram",
90                                          machine->ram_size);
91     memory_region_add_subregion(get_system_memory(), FSL_IMX31_SDRAM0_ADDR,
92                                 &s->ram);
93 
94     /* initialize the alias memory if any */
95     for (i = 0, ram_size = machine->ram_size, alias_offset = 0;
96          (i < 2) && ram_size; i++) {
97         unsigned int size;
98         static const struct {
99             hwaddr addr;
100             unsigned int size;
101         } ram[2] = {
102             { FSL_IMX31_SDRAM0_ADDR, FSL_IMX31_SDRAM0_SIZE },
103             { FSL_IMX31_SDRAM1_ADDR, FSL_IMX31_SDRAM1_SIZE },
104         };
105 
106         size = MIN(ram_size, ram[i].size);
107 
108         ram_size -= size;
109 
110         if (size < ram[i].size) {
111             memory_region_init_alias(&s->ram_alias, NULL, "ram.alias",
112                                      &s->ram, alias_offset, ram[i].size - size);
113             memory_region_add_subregion(get_system_memory(),
114                                         ram[i].addr + size, &s->ram_alias);
115         }
116 
117         alias_offset += ram[i].size;
118     }
119 
120     if (nd_table[0].used) {
121         lan9118_init(&nd_table[0], KZM_LAN9118_ADDR,
122                      qdev_get_gpio_in(DEVICE(&s->soc.avic), 52));
123     }
124 
125     if (serial_hds[2]) { /* touchscreen */
126         serial_mm_init(get_system_memory(), KZM_FPGA_ADDR+0x10, 0,
127                        qdev_get_gpio_in(DEVICE(&s->soc.avic), 52),
128                        14745600, serial_hds[2], DEVICE_NATIVE_ENDIAN);
129     }
130 
131     kzm_binfo.ram_size = machine->ram_size;
132     kzm_binfo.kernel_filename = machine->kernel_filename;
133     kzm_binfo.kernel_cmdline = machine->kernel_cmdline;
134     kzm_binfo.initrd_filename = machine->initrd_filename;
135     kzm_binfo.nb_cpus = 1;
136 
137     if (!qtest_enabled()) {
138         arm_load_kernel(&s->soc.cpu, &kzm_binfo);
139     }
140 }
141 
142 static void kzm_machine_init(MachineClass *mc)
143 {
144     mc->desc = "ARM KZM Emulation Baseboard (ARM1136)";
145     mc->init = kzm_init;
146 }
147 
148 DEFINE_MACHINE("kzm", kzm_machine_init)
149