1 /* 2 * Samsung exynos4 SoC based boards emulation 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved. 5 * Maksim Kozlov <m.kozlov@samsung.com> 6 * Evgeny Voevodin <e.voevodin@samsung.com> 7 * Igor Mitsyanko <i.mitsyanko@samsung.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, but WITHOUT 15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 17 * for more details. 18 * 19 * You should have received a copy of the GNU General Public License along 20 * with this program; if not, see <http://www.gnu.org/licenses/>. 21 * 22 */ 23 24 #include "qemu/osdep.h" 25 #include "qapi/error.h" 26 #include "qemu/error-report.h" 27 #include "qemu-common.h" 28 #include "cpu.h" 29 #include "sysemu/sysemu.h" 30 #include "hw/sysbus.h" 31 #include "net/net.h" 32 #include "hw/arm/arm.h" 33 #include "exec/address-spaces.h" 34 #include "hw/arm/exynos4210.h" 35 #include "hw/boards.h" 36 37 #undef DEBUG 38 39 //#define DEBUG 40 41 #ifdef DEBUG 42 #undef PRINT_DEBUG 43 #define PRINT_DEBUG(fmt, args...) \ 44 do { \ 45 fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \ 46 } while (0) 47 #else 48 #define PRINT_DEBUG(fmt, args...) do {} while (0) 49 #endif 50 51 #define SMDK_LAN9118_BASE_ADDR 0x05000000 52 53 typedef enum Exynos4BoardType { 54 EXYNOS4_BOARD_NURI, 55 EXYNOS4_BOARD_SMDKC210, 56 EXYNOS4_NUM_OF_BOARDS 57 } Exynos4BoardType; 58 59 typedef struct Exynos4BoardState { 60 Exynos4210State *soc; 61 MemoryRegion dram0_mem; 62 MemoryRegion dram1_mem; 63 } Exynos4BoardState; 64 65 static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = { 66 [EXYNOS4_BOARD_NURI] = 0xD33, 67 [EXYNOS4_BOARD_SMDKC210] = 0xB16, 68 }; 69 70 static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = { 71 [EXYNOS4_BOARD_NURI] = EXYNOS4210_SECOND_CPU_BOOTREG, 72 [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG, 73 }; 74 75 static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = { 76 [EXYNOS4_BOARD_NURI] = 0x40000000, 77 [EXYNOS4_BOARD_SMDKC210] = 0x40000000, 78 }; 79 80 static struct arm_boot_info exynos4_board_binfo = { 81 .loader_start = EXYNOS4210_BASE_BOOT_ADDR, 82 .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR, 83 .nb_cpus = EXYNOS4210_NCPUS, 84 .write_secondary_boot = exynos4210_write_secondary, 85 }; 86 87 static void lan9215_init(uint32_t base, qemu_irq irq) 88 { 89 DeviceState *dev; 90 SysBusDevice *s; 91 92 /* This should be a 9215 but the 9118 is close enough */ 93 if (nd_table[0].used) { 94 qemu_check_nic_model(&nd_table[0], "lan9118"); 95 dev = qdev_create(NULL, "lan9118"); 96 qdev_set_nic_properties(dev, &nd_table[0]); 97 qdev_prop_set_uint32(dev, "mode_16bit", 1); 98 qdev_init_nofail(dev); 99 s = SYS_BUS_DEVICE(dev); 100 sysbus_mmio_map(s, 0, base); 101 sysbus_connect_irq(s, 0, irq); 102 } 103 } 104 105 static void exynos4_boards_init_ram(Exynos4BoardState *s, 106 MemoryRegion *system_mem, 107 unsigned long ram_size) 108 { 109 unsigned long mem_size = ram_size; 110 111 if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) { 112 memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1", 113 mem_size - EXYNOS4210_DRAM_MAX_SIZE, 114 &error_fatal); 115 memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR, 116 &s->dram1_mem); 117 mem_size = EXYNOS4210_DRAM_MAX_SIZE; 118 } 119 120 memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size, 121 &error_fatal); 122 memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR, 123 &s->dram0_mem); 124 } 125 126 static Exynos4BoardState * 127 exynos4_boards_init_common(MachineState *machine, 128 Exynos4BoardType board_type) 129 { 130 Exynos4BoardState *s = g_new(Exynos4BoardState, 1); 131 132 exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type]; 133 exynos4_board_binfo.board_id = exynos4_board_id[board_type]; 134 exynos4_board_binfo.smp_bootreg_addr = 135 exynos4_board_smp_bootreg_addr[board_type]; 136 exynos4_board_binfo.kernel_filename = machine->kernel_filename; 137 exynos4_board_binfo.initrd_filename = machine->initrd_filename; 138 exynos4_board_binfo.kernel_cmdline = machine->kernel_cmdline; 139 exynos4_board_binfo.gic_cpu_if_addr = 140 EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100; 141 142 PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n" 143 " kernel_filename: %s\n" 144 " kernel_cmdline: %s\n" 145 " initrd_filename: %s\n", 146 exynos4_board_ram_size[board_type] / 1048576, 147 exynos4_board_ram_size[board_type], 148 machine->kernel_filename, 149 machine->kernel_cmdline, 150 machine->initrd_filename); 151 152 exynos4_boards_init_ram(s, get_system_memory(), 153 exynos4_board_ram_size[board_type]); 154 155 s->soc = exynos4210_init(get_system_memory()); 156 157 return s; 158 } 159 160 static void nuri_init(MachineState *machine) 161 { 162 exynos4_boards_init_common(machine, EXYNOS4_BOARD_NURI); 163 164 arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo); 165 } 166 167 static void smdkc210_init(MachineState *machine) 168 { 169 Exynos4BoardState *s = exynos4_boards_init_common(machine, 170 EXYNOS4_BOARD_SMDKC210); 171 172 lan9215_init(SMDK_LAN9118_BASE_ADDR, 173 qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)])); 174 arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo); 175 } 176 177 static void nuri_class_init(ObjectClass *oc, void *data) 178 { 179 MachineClass *mc = MACHINE_CLASS(oc); 180 181 mc->desc = "Samsung NURI board (Exynos4210)"; 182 mc->init = nuri_init; 183 mc->max_cpus = EXYNOS4210_NCPUS; 184 mc->min_cpus = EXYNOS4210_NCPUS; 185 mc->default_cpus = EXYNOS4210_NCPUS; 186 mc->ignore_memory_transaction_failures = true; 187 } 188 189 static const TypeInfo nuri_type = { 190 .name = MACHINE_TYPE_NAME("nuri"), 191 .parent = TYPE_MACHINE, 192 .class_init = nuri_class_init, 193 }; 194 195 static void smdkc210_class_init(ObjectClass *oc, void *data) 196 { 197 MachineClass *mc = MACHINE_CLASS(oc); 198 199 mc->desc = "Samsung SMDKC210 board (Exynos4210)"; 200 mc->init = smdkc210_init; 201 mc->max_cpus = EXYNOS4210_NCPUS; 202 mc->min_cpus = EXYNOS4210_NCPUS; 203 mc->default_cpus = EXYNOS4210_NCPUS; 204 mc->ignore_memory_transaction_failures = true; 205 } 206 207 static const TypeInfo smdkc210_type = { 208 .name = MACHINE_TYPE_NAME("smdkc210"), 209 .parent = TYPE_MACHINE, 210 .class_init = smdkc210_class_init, 211 }; 212 213 static void exynos4_machines_init(void) 214 { 215 type_register_static(&nuri_type); 216 type_register_static(&smdkc210_type); 217 } 218 219 type_init(exynos4_machines_init) 220