1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This code is licensed under the GNU GPLv2 and later. 9 */ 10 11 #include "qemu/osdep.h" 12 #include "hw/arm/bcm2836.h" 13 #include "hw/arm/raspi_platform.h" 14 #include "hw/sysbus.h" 15 #include "exec/address-spaces.h" 16 17 /* Peripheral base address seen by the CPU */ 18 #define BCM2836_PERI_BASE 0x3F000000 19 20 /* "QA7" (Pi2) interrupt controller and mailboxes etc. */ 21 #define BCM2836_CONTROL_BASE 0x40000000 22 23 static void bcm2836_init(Object *obj) 24 { 25 BCM2836State *s = BCM2836(obj); 26 int n; 27 28 for (n = 0; n < BCM2836_NCPUS; n++) { 29 object_initialize(&s->cpus[n], sizeof(s->cpus[n]), 30 "cortex-a15-" TYPE_ARM_CPU); 31 object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]), 32 &error_abort); 33 } 34 35 object_initialize(&s->control, sizeof(s->control), TYPE_BCM2836_CONTROL); 36 object_property_add_child(obj, "control", OBJECT(&s->control), NULL); 37 qdev_set_parent_bus(DEVICE(&s->control), sysbus_get_default()); 38 39 object_initialize(&s->peripherals, sizeof(s->peripherals), 40 TYPE_BCM2835_PERIPHERALS); 41 object_property_add_child(obj, "peripherals", OBJECT(&s->peripherals), 42 &error_abort); 43 object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals), 44 "board-rev", &error_abort); 45 qdev_set_parent_bus(DEVICE(&s->peripherals), sysbus_get_default()); 46 } 47 48 static void bcm2836_realize(DeviceState *dev, Error **errp) 49 { 50 BCM2836State *s = BCM2836(dev); 51 Object *obj; 52 Error *err = NULL; 53 int n; 54 55 /* common peripherals from bcm2835 */ 56 57 obj = object_property_get_link(OBJECT(dev), "ram", &err); 58 if (obj == NULL) { 59 error_setg(errp, "%s: required ram link not found: %s", 60 __func__, error_get_pretty(err)); 61 return; 62 } 63 64 object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj, &err); 65 if (err) { 66 error_propagate(errp, err); 67 return; 68 } 69 70 object_property_set_bool(OBJECT(&s->peripherals), true, "realized", &err); 71 if (err) { 72 error_propagate(errp, err); 73 return; 74 } 75 76 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0, 77 BCM2836_PERI_BASE, 1); 78 79 /* bcm2836 interrupt controller (and mailboxes, etc.) */ 80 object_property_set_bool(OBJECT(&s->control), true, "realized", &err); 81 if (err) { 82 error_propagate(errp, err); 83 return; 84 } 85 86 sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, BCM2836_CONTROL_BASE); 87 88 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0, 89 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0)); 90 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1, 91 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0)); 92 93 for (n = 0; n < BCM2836_NCPUS; n++) { 94 /* Mirror bcm2836, which has clusterid set to 0xf 95 * TODO: this should be converted to a property of ARM_CPU 96 */ 97 s->cpus[n].mp_affinity = 0xF00 | n; 98 99 /* set periphbase/CBAR value for CPU-local registers */ 100 object_property_set_int(OBJECT(&s->cpus[n]), 101 BCM2836_PERI_BASE + MCORE_OFFSET, 102 "reset-cbar", &err); 103 if (err) { 104 error_propagate(errp, err); 105 return; 106 } 107 108 /* start powered off if not enabled */ 109 object_property_set_bool(OBJECT(&s->cpus[n]), n >= s->enabled_cpus, 110 "start-powered-off", &err); 111 if (err) { 112 error_propagate(errp, err); 113 return; 114 } 115 116 object_property_set_bool(OBJECT(&s->cpus[n]), true, "realized", &err); 117 if (err) { 118 error_propagate(errp, err); 119 return; 120 } 121 122 /* Connect irq/fiq outputs from the interrupt controller. */ 123 qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n, 124 qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_IRQ)); 125 qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n, 126 qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_FIQ)); 127 128 /* Connect timers from the CPU to the interrupt controller */ 129 qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS, 130 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); 131 qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT, 132 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n)); 133 } 134 } 135 136 static Property bcm2836_props[] = { 137 DEFINE_PROP_UINT32("enabled-cpus", BCM2836State, enabled_cpus, BCM2836_NCPUS), 138 DEFINE_PROP_END_OF_LIST() 139 }; 140 141 static void bcm2836_class_init(ObjectClass *oc, void *data) 142 { 143 DeviceClass *dc = DEVICE_CLASS(oc); 144 145 dc->props = bcm2836_props; 146 dc->realize = bcm2836_realize; 147 148 /* 149 * Reason: creates an ARM CPU, thus use after free(), see 150 * arm_cpu_class_init() 151 */ 152 dc->cannot_destroy_with_object_finalize_yet = true; 153 } 154 155 static const TypeInfo bcm2836_type_info = { 156 .name = TYPE_BCM2836, 157 .parent = TYPE_SYS_BUS_DEVICE, 158 .instance_size = sizeof(BCM2836State), 159 .instance_init = bcm2836_init, 160 .class_init = bcm2836_class_init, 161 }; 162 163 static void bcm2836_register_types(void) 164 { 165 type_register_static(&bcm2836_type_info); 166 } 167 168 type_init(bcm2836_register_types) 169