1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This code is licensed under the GNU GPLv2 and later. 9 */ 10 11 #include "hw/arm/bcm2836.h" 12 #include "hw/arm/raspi_platform.h" 13 #include "hw/sysbus.h" 14 #include "exec/address-spaces.h" 15 16 /* Peripheral base address seen by the CPU */ 17 #define BCM2836_PERI_BASE 0x3F000000 18 19 /* "QA7" (Pi2) interrupt controller and mailboxes etc. */ 20 #define BCM2836_CONTROL_BASE 0x40000000 21 22 static void bcm2836_init(Object *obj) 23 { 24 BCM2836State *s = BCM2836(obj); 25 int n; 26 27 for (n = 0; n < BCM2836_NCPUS; n++) { 28 object_initialize(&s->cpus[n], sizeof(s->cpus[n]), 29 "cortex-a15-" TYPE_ARM_CPU); 30 object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]), 31 &error_abort); 32 } 33 34 object_initialize(&s->control, sizeof(s->control), TYPE_BCM2836_CONTROL); 35 object_property_add_child(obj, "control", OBJECT(&s->control), NULL); 36 qdev_set_parent_bus(DEVICE(&s->control), sysbus_get_default()); 37 38 object_initialize(&s->peripherals, sizeof(s->peripherals), 39 TYPE_BCM2835_PERIPHERALS); 40 object_property_add_child(obj, "peripherals", OBJECT(&s->peripherals), 41 &error_abort); 42 qdev_set_parent_bus(DEVICE(&s->peripherals), sysbus_get_default()); 43 } 44 45 static void bcm2836_realize(DeviceState *dev, Error **errp) 46 { 47 BCM2836State *s = BCM2836(dev); 48 Object *obj; 49 Error *err = NULL; 50 int n; 51 52 /* common peripherals from bcm2835 */ 53 54 obj = object_property_get_link(OBJECT(dev), "ram", &err); 55 if (obj == NULL) { 56 error_setg(errp, "%s: required ram link not found: %s", 57 __func__, error_get_pretty(err)); 58 return; 59 } 60 61 object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj, &err); 62 if (err) { 63 error_propagate(errp, err); 64 return; 65 } 66 67 object_property_set_bool(OBJECT(&s->peripherals), true, "realized", &err); 68 if (err) { 69 error_propagate(errp, err); 70 return; 71 } 72 73 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0, 74 BCM2836_PERI_BASE, 1); 75 76 /* bcm2836 interrupt controller (and mailboxes, etc.) */ 77 object_property_set_bool(OBJECT(&s->control), true, "realized", &err); 78 if (err) { 79 error_propagate(errp, err); 80 return; 81 } 82 83 sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, BCM2836_CONTROL_BASE); 84 85 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0, 86 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0)); 87 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1, 88 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0)); 89 90 for (n = 0; n < BCM2836_NCPUS; n++) { 91 /* Mirror bcm2836, which has clusterid set to 0xf 92 * TODO: this should be converted to a property of ARM_CPU 93 */ 94 s->cpus[n].mp_affinity = 0xF00 | n; 95 96 /* set periphbase/CBAR value for CPU-local registers */ 97 object_property_set_int(OBJECT(&s->cpus[n]), 98 BCM2836_PERI_BASE + MCORE_OFFSET, 99 "reset-cbar", &err); 100 if (err) { 101 error_propagate(errp, err); 102 return; 103 } 104 105 /* start powered off if not enabled */ 106 object_property_set_bool(OBJECT(&s->cpus[n]), n >= s->enabled_cpus, 107 "start-powered-off", &err); 108 if (err) { 109 error_propagate(errp, err); 110 return; 111 } 112 113 object_property_set_bool(OBJECT(&s->cpus[n]), true, "realized", &err); 114 if (err) { 115 error_propagate(errp, err); 116 return; 117 } 118 119 /* Connect irq/fiq outputs from the interrupt controller. */ 120 qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n, 121 qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_IRQ)); 122 qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n, 123 qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_FIQ)); 124 125 /* Connect timers from the CPU to the interrupt controller */ 126 qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS, 127 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); 128 qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT, 129 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n)); 130 } 131 } 132 133 static Property bcm2836_props[] = { 134 DEFINE_PROP_UINT32("enabled-cpus", BCM2836State, enabled_cpus, BCM2836_NCPUS), 135 DEFINE_PROP_END_OF_LIST() 136 }; 137 138 static void bcm2836_class_init(ObjectClass *oc, void *data) 139 { 140 DeviceClass *dc = DEVICE_CLASS(oc); 141 142 dc->props = bcm2836_props; 143 dc->realize = bcm2836_realize; 144 145 /* 146 * Reason: creates an ARM CPU, thus use after free(), see 147 * arm_cpu_class_init() 148 */ 149 dc->cannot_destroy_with_object_finalize_yet = true; 150 } 151 152 static const TypeInfo bcm2836_type_info = { 153 .name = TYPE_BCM2836, 154 .parent = TYPE_SYS_BUS_DEVICE, 155 .instance_size = sizeof(BCM2836State), 156 .instance_init = bcm2836_init, 157 .class_init = bcm2836_class_init, 158 }; 159 160 static void bcm2836_register_types(void) 161 { 162 type_register_static(&bcm2836_type_info); 163 } 164 165 type_init(bcm2836_register_types) 166