1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or later. 9 * See the COPYING file in the top-level directory. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qapi/error.h" 14 #include "qemu/module.h" 15 #include "cpu.h" 16 #include "hw/arm/bcm2836.h" 17 #include "hw/arm/raspi_platform.h" 18 #include "hw/sysbus.h" 19 20 struct BCM283XInfo { 21 const char *name; 22 const char *cpu_type; 23 hwaddr peri_base; /* Peripheral base address seen by the CPU */ 24 hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */ 25 int clusterid; 26 }; 27 28 static const BCM283XInfo bcm283x_socs[] = { 29 { 30 .name = TYPE_BCM2836, 31 .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"), 32 .peri_base = 0x3f000000, 33 .ctrl_base = 0x40000000, 34 .clusterid = 0xf, 35 }, 36 #ifdef TARGET_AARCH64 37 { 38 .name = TYPE_BCM2837, 39 .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"), 40 .peri_base = 0x3f000000, 41 .ctrl_base = 0x40000000, 42 .clusterid = 0x0, 43 }, 44 #endif 45 }; 46 47 static void bcm2836_init(Object *obj) 48 { 49 BCM283XState *s = BCM283X(obj); 50 BCM283XClass *bc = BCM283X_GET_CLASS(obj); 51 const BCM283XInfo *info = bc->info; 52 int n; 53 54 for (n = 0; n < BCM283X_NCPUS; n++) { 55 object_initialize_child(obj, "cpu[*]", &s->cpu[n].core, 56 sizeof(s->cpu[n].core), info->cpu_type, 57 &error_abort, NULL); 58 } 59 60 sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control), 61 TYPE_BCM2836_CONTROL); 62 63 sysbus_init_child_obj(obj, "peripherals", &s->peripherals, 64 sizeof(s->peripherals), TYPE_BCM2835_PERIPHERALS); 65 object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals), 66 "board-rev"); 67 object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals), 68 "vcram-size"); 69 } 70 71 static void bcm2836_realize(DeviceState *dev, Error **errp) 72 { 73 BCM283XState *s = BCM283X(dev); 74 BCM283XClass *bc = BCM283X_GET_CLASS(dev); 75 const BCM283XInfo *info = bc->info; 76 Object *obj; 77 Error *err = NULL; 78 int n; 79 80 /* common peripherals from bcm2835 */ 81 82 obj = object_property_get_link(OBJECT(dev), "ram", &err); 83 if (obj == NULL) { 84 error_setg(errp, "%s: required ram link not found: %s", 85 __func__, error_get_pretty(err)); 86 return; 87 } 88 89 object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj); 90 91 object_property_set_bool(OBJECT(&s->peripherals), true, "realized", &err); 92 if (err) { 93 error_propagate(errp, err); 94 return; 95 } 96 97 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->peripherals), 98 "sd-bus"); 99 100 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0, 101 info->peri_base, 1); 102 103 /* bcm2836 interrupt controller (and mailboxes, etc.) */ 104 object_property_set_bool(OBJECT(&s->control), true, "realized", &err); 105 if (err) { 106 error_propagate(errp, err); 107 return; 108 } 109 110 sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base); 111 112 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0, 113 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0)); 114 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1, 115 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0)); 116 117 for (n = 0; n < BCM283X_NCPUS; n++) { 118 /* TODO: this should be converted to a property of ARM_CPU */ 119 s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n; 120 121 /* set periphbase/CBAR value for CPU-local registers */ 122 object_property_set_int(OBJECT(&s->cpu[n].core), 123 info->peri_base, 124 "reset-cbar", &err); 125 if (err) { 126 error_propagate(errp, err); 127 return; 128 } 129 130 /* start powered off if not enabled */ 131 object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus, 132 "start-powered-off", &err); 133 if (err) { 134 error_propagate(errp, err); 135 return; 136 } 137 138 object_property_set_bool(OBJECT(&s->cpu[n].core), true, 139 "realized", &err); 140 if (err) { 141 error_propagate(errp, err); 142 return; 143 } 144 145 /* Connect irq/fiq outputs from the interrupt controller. */ 146 qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n, 147 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ)); 148 qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n, 149 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ)); 150 151 /* Connect timers from the CPU to the interrupt controller */ 152 qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS, 153 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n)); 154 qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT, 155 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n)); 156 qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP, 157 qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n)); 158 qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC, 159 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); 160 } 161 } 162 163 static Property bcm2836_props[] = { 164 DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus, 165 BCM283X_NCPUS), 166 DEFINE_PROP_END_OF_LIST() 167 }; 168 169 static void bcm283x_class_init(ObjectClass *oc, void *data) 170 { 171 DeviceClass *dc = DEVICE_CLASS(oc); 172 BCM283XClass *bc = BCM283X_CLASS(oc); 173 174 bc->info = data; 175 dc->realize = bcm2836_realize; 176 device_class_set_props(dc, bcm2836_props); 177 /* Reason: Must be wired up in code (see raspi_init() function) */ 178 dc->user_creatable = false; 179 } 180 181 static const TypeInfo bcm283x_type_info = { 182 .name = TYPE_BCM283X, 183 .parent = TYPE_DEVICE, 184 .instance_size = sizeof(BCM283XState), 185 .instance_init = bcm2836_init, 186 .class_size = sizeof(BCM283XClass), 187 .abstract = true, 188 }; 189 190 static void bcm2836_register_types(void) 191 { 192 int i; 193 194 type_register_static(&bcm283x_type_info); 195 for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) { 196 TypeInfo ti = { 197 .name = bcm283x_socs[i].name, 198 .parent = TYPE_BCM283X, 199 .class_init = bcm283x_class_init, 200 .class_data = (void *) &bcm283x_socs[i], 201 }; 202 type_register(&ti); 203 } 204 } 205 206 type_init(bcm2836_register_types) 207