xref: /openbmc/qemu/hw/arm/bcm2836.c (revision 38472890)
1 /*
2  * Raspberry Pi emulation (c) 2012 Gregory Estrade
3  * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4  *
5  * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6  * Written by Andrew Baumann
7  *
8  * This work is licensed under the terms of the GNU GPL, version 2 or later.
9  * See the COPYING file in the top-level directory.
10  */
11 
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qemu/module.h"
15 #include "cpu.h"
16 #include "hw/arm/bcm2836.h"
17 #include "hw/arm/raspi_platform.h"
18 #include "hw/sysbus.h"
19 
20 struct BCM283XInfo {
21     const char *name;
22     const char *cpu_type;
23     hwaddr peri_base; /* Peripheral base address seen by the CPU */
24     hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
25     int clusterid;
26 };
27 
28 static const BCM283XInfo bcm283x_socs[] = {
29     {
30         .name = TYPE_BCM2836,
31         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
32         .peri_base = 0x3f000000,
33         .ctrl_base = 0x40000000,
34         .clusterid = 0xf,
35     },
36 #ifdef TARGET_AARCH64
37     {
38         .name = TYPE_BCM2837,
39         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
40         .peri_base = 0x3f000000,
41         .ctrl_base = 0x40000000,
42         .clusterid = 0x0,
43     },
44 #endif
45 };
46 
47 static void bcm2836_init(Object *obj)
48 {
49     BCM283XState *s = BCM283X(obj);
50     BCM283XClass *bc = BCM283X_GET_CLASS(obj);
51     const BCM283XInfo *info = bc->info;
52     int n;
53 
54     for (n = 0; n < BCM283X_NCPUS; n++) {
55         object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
56                                 sizeof(s->cpu[n].core), info->cpu_type,
57                                 &error_abort, NULL);
58     }
59 
60     sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
61                           TYPE_BCM2836_CONTROL);
62 
63     sysbus_init_child_obj(obj, "peripherals", &s->peripherals,
64                           sizeof(s->peripherals), TYPE_BCM2835_PERIPHERALS);
65     object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
66                               "board-rev", &error_abort);
67     object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
68                               "vcram-size", &error_abort);
69 }
70 
71 static void bcm2836_realize(DeviceState *dev, Error **errp)
72 {
73     BCM283XState *s = BCM283X(dev);
74     BCM283XClass *bc = BCM283X_GET_CLASS(dev);
75     const BCM283XInfo *info = bc->info;
76     Object *obj;
77     Error *err = NULL;
78     int n;
79 
80     /* common peripherals from bcm2835 */
81 
82     obj = object_property_get_link(OBJECT(dev), "ram", &err);
83     if (obj == NULL) {
84         error_setg(errp, "%s: required ram link not found: %s",
85                    __func__, error_get_pretty(err));
86         return;
87     }
88 
89     object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj, &err);
90     if (err) {
91         error_propagate(errp, err);
92         return;
93     }
94 
95     object_property_set_bool(OBJECT(&s->peripherals), true, "realized", &err);
96     if (err) {
97         error_propagate(errp, err);
98         return;
99     }
100 
101     object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->peripherals),
102                               "sd-bus", &err);
103     if (err) {
104         error_propagate(errp, err);
105         return;
106     }
107 
108     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
109                             info->peri_base, 1);
110 
111     /* bcm2836 interrupt controller (and mailboxes, etc.) */
112     object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
113     if (err) {
114         error_propagate(errp, err);
115         return;
116     }
117 
118     sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
119 
120     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
121         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
122     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
123         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
124 
125     for (n = 0; n < BCM283X_NCPUS; n++) {
126         /* TODO: this should be converted to a property of ARM_CPU */
127         s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
128 
129         /* set periphbase/CBAR value for CPU-local registers */
130         object_property_set_int(OBJECT(&s->cpu[n].core),
131                                 info->peri_base,
132                                 "reset-cbar", &err);
133         if (err) {
134             error_propagate(errp, err);
135             return;
136         }
137 
138         /* start powered off if not enabled */
139         object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus,
140                                  "start-powered-off", &err);
141         if (err) {
142             error_propagate(errp, err);
143             return;
144         }
145 
146         object_property_set_bool(OBJECT(&s->cpu[n].core), true,
147                                  "realized", &err);
148         if (err) {
149             error_propagate(errp, err);
150             return;
151         }
152 
153         /* Connect irq/fiq outputs from the interrupt controller. */
154         qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
155                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ));
156         qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
157                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ));
158 
159         /* Connect timers from the CPU to the interrupt controller */
160         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS,
161                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
162         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT,
163                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
164         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP,
165                 qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
166         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC,
167                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
168     }
169 }
170 
171 static Property bcm2836_props[] = {
172     DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
173                        BCM283X_NCPUS),
174     DEFINE_PROP_END_OF_LIST()
175 };
176 
177 static void bcm283x_class_init(ObjectClass *oc, void *data)
178 {
179     DeviceClass *dc = DEVICE_CLASS(oc);
180     BCM283XClass *bc = BCM283X_CLASS(oc);
181 
182     bc->info = data;
183     dc->realize = bcm2836_realize;
184     device_class_set_props(dc, bcm2836_props);
185     /* Reason: Must be wired up in code (see raspi_init() function) */
186     dc->user_creatable = false;
187 }
188 
189 static const TypeInfo bcm283x_type_info = {
190     .name = TYPE_BCM283X,
191     .parent = TYPE_DEVICE,
192     .instance_size = sizeof(BCM283XState),
193     .instance_init = bcm2836_init,
194     .class_size = sizeof(BCM283XClass),
195     .abstract = true,
196 };
197 
198 static void bcm2836_register_types(void)
199 {
200     int i;
201 
202     type_register_static(&bcm283x_type_info);
203     for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
204         TypeInfo ti = {
205             .name = bcm283x_socs[i].name,
206             .parent = TYPE_BCM283X,
207             .class_init = bcm283x_class_init,
208             .class_data = (void *) &bcm283x_socs[i],
209         };
210         type_register(&ti);
211     }
212 }
213 
214 type_init(bcm2836_register_types)
215