xref: /openbmc/qemu/hw/arm/bcm2836.c (revision 36ebc7db)
1 /*
2  * Raspberry Pi emulation (c) 2012 Gregory Estrade
3  * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4  *
5  * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6  * Written by Andrew Baumann
7  *
8  * This work is licensed under the terms of the GNU GPL, version 2 or later.
9  * See the COPYING file in the top-level directory.
10  */
11 
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qemu/module.h"
15 #include "hw/arm/bcm2836.h"
16 #include "hw/arm/raspi_platform.h"
17 #include "hw/sysbus.h"
18 
19 struct BCM283XClass {
20     /*< private >*/
21     DeviceClass parent_class;
22     /*< public >*/
23     const char *name;
24     const char *cpu_type;
25     unsigned core_count;
26     hwaddr peri_base; /* Peripheral base address seen by the CPU */
27     hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
28     int clusterid;
29 };
30 
31 static Property bcm2836_enabled_cores_property =
32     DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus, 0);
33 
34 static void bcm2836_init(Object *obj)
35 {
36     BCM283XState *s = BCM283X(obj);
37     BCM283XClass *bc = BCM283X_GET_CLASS(obj);
38     int n;
39 
40     for (n = 0; n < bc->core_count; n++) {
41         object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
42                                 bc->cpu_type);
43     }
44     if (bc->core_count > 1) {
45         qdev_property_add_static(DEVICE(obj), &bcm2836_enabled_cores_property);
46         qdev_prop_set_uint32(DEVICE(obj), "enabled-cpus", bc->core_count);
47     }
48 
49     if (bc->ctrl_base) {
50         object_initialize_child(obj, "control", &s->control,
51                                 TYPE_BCM2836_CONTROL);
52     }
53 
54     object_initialize_child(obj, "peripherals", &s->peripherals,
55                             TYPE_BCM2835_PERIPHERALS);
56     object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
57                               "board-rev");
58     object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
59                               "vcram-size");
60 }
61 
62 static bool bcm283x_common_realize(DeviceState *dev, Error **errp)
63 {
64     BCM283XState *s = BCM283X(dev);
65     BCM283XClass *bc = BCM283X_GET_CLASS(dev);
66     Object *obj;
67 
68     /* common peripherals from bcm2835 */
69 
70     obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
71 
72     object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj);
73 
74     if (!sysbus_realize(SYS_BUS_DEVICE(&s->peripherals), errp)) {
75         return false;
76     }
77 
78     object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->peripherals),
79                               "sd-bus");
80 
81     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
82                             bc->peri_base, 1);
83     return true;
84 }
85 
86 static void bcm2835_realize(DeviceState *dev, Error **errp)
87 {
88     BCM283XState *s = BCM283X(dev);
89 
90     if (!bcm283x_common_realize(dev, errp)) {
91         return;
92     }
93 
94     if (!qdev_realize(DEVICE(&s->cpu[0].core), NULL, errp)) {
95         return;
96     }
97 
98     /* Connect irq/fiq outputs from the interrupt controller. */
99     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
100             qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_IRQ));
101     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
102             qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_FIQ));
103 }
104 
105 static void bcm2836_realize(DeviceState *dev, Error **errp)
106 {
107     BCM283XState *s = BCM283X(dev);
108     BCM283XClass *bc = BCM283X_GET_CLASS(dev);
109     int n;
110 
111     if (!bcm283x_common_realize(dev, errp)) {
112         return;
113     }
114 
115     /* bcm2836 interrupt controller (and mailboxes, etc.) */
116     if (!sysbus_realize(SYS_BUS_DEVICE(&s->control), errp)) {
117         return;
118     }
119 
120     sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, bc->ctrl_base);
121 
122     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
123         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
124     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
125         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
126 
127     for (n = 0; n < BCM283X_NCPUS; n++) {
128         /* TODO: this should be converted to a property of ARM_CPU */
129         s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
130 
131         /* set periphbase/CBAR value for CPU-local registers */
132         if (!object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar",
133                                      bc->peri_base, errp)) {
134             return;
135         }
136 
137         /* start powered off if not enabled */
138         if (!object_property_set_bool(OBJECT(&s->cpu[n].core),
139                                       "start-powered-off",
140                                       n >= s->enabled_cpus,
141                                       errp)) {
142             return;
143         }
144 
145         if (!qdev_realize(DEVICE(&s->cpu[n].core), NULL, errp)) {
146             return;
147         }
148 
149         /* Connect irq/fiq outputs from the interrupt controller. */
150         qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
151                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ));
152         qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
153                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ));
154 
155         /* Connect timers from the CPU to the interrupt controller */
156         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS,
157                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
158         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT,
159                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
160         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP,
161                 qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
162         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC,
163                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
164     }
165 }
166 
167 static void bcm283x_class_init(ObjectClass *oc, void *data)
168 {
169     DeviceClass *dc = DEVICE_CLASS(oc);
170 
171     /* Reason: Must be wired up in code (see raspi_init() function) */
172     dc->user_creatable = false;
173 }
174 
175 static void bcm2835_class_init(ObjectClass *oc, void *data)
176 {
177     DeviceClass *dc = DEVICE_CLASS(oc);
178     BCM283XClass *bc = BCM283X_CLASS(oc);
179 
180     bc->cpu_type = ARM_CPU_TYPE_NAME("arm1176");
181     bc->core_count = 1;
182     bc->peri_base = 0x20000000;
183     dc->realize = bcm2835_realize;
184 };
185 
186 static void bcm2836_class_init(ObjectClass *oc, void *data)
187 {
188     DeviceClass *dc = DEVICE_CLASS(oc);
189     BCM283XClass *bc = BCM283X_CLASS(oc);
190 
191     bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
192     bc->core_count = BCM283X_NCPUS;
193     bc->peri_base = 0x3f000000;
194     bc->ctrl_base = 0x40000000;
195     bc->clusterid = 0xf;
196     dc->realize = bcm2836_realize;
197 };
198 
199 #ifdef TARGET_AARCH64
200 static void bcm2837_class_init(ObjectClass *oc, void *data)
201 {
202     DeviceClass *dc = DEVICE_CLASS(oc);
203     BCM283XClass *bc = BCM283X_CLASS(oc);
204 
205     bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
206     bc->core_count = BCM283X_NCPUS;
207     bc->peri_base = 0x3f000000;
208     bc->ctrl_base = 0x40000000;
209     bc->clusterid = 0x0;
210     dc->realize = bcm2836_realize;
211 };
212 #endif
213 
214 static const TypeInfo bcm283x_types[] = {
215     {
216         .name           = TYPE_BCM2835,
217         .parent         = TYPE_BCM283X,
218         .class_init     = bcm2835_class_init,
219     }, {
220         .name           = TYPE_BCM2836,
221         .parent         = TYPE_BCM283X,
222         .class_init     = bcm2836_class_init,
223 #ifdef TARGET_AARCH64
224     }, {
225         .name           = TYPE_BCM2837,
226         .parent         = TYPE_BCM283X,
227         .class_init     = bcm2837_class_init,
228 #endif
229     }, {
230         .name           = TYPE_BCM283X,
231         .parent         = TYPE_DEVICE,
232         .instance_size  = sizeof(BCM283XState),
233         .instance_init  = bcm2836_init,
234         .class_size     = sizeof(BCM283XClass),
235         .class_init     = bcm283x_class_init,
236         .abstract       = true,
237     }
238 };
239 
240 DEFINE_TYPES(bcm283x_types)
241