1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This code is licensed under the GNU GPLv2 and later. 9 */ 10 11 #include "hw/arm/bcm2835_peripherals.h" 12 #include "hw/misc/bcm2835_mbox_defs.h" 13 #include "hw/arm/raspi_platform.h" 14 15 /* Peripheral base address on the VC (GPU) system bus */ 16 #define BCM2835_VC_PERI_BASE 0x7e000000 17 18 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */ 19 #define BCM2835_SDHC_CAPAREG 0x52034b4 20 21 static void bcm2835_peripherals_init(Object *obj) 22 { 23 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj); 24 25 /* Memory region for peripheral devices, which we export to our parent */ 26 memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000); 27 object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr), NULL); 28 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr); 29 30 /* Internal memory region for peripheral bus addresses (not exported) */ 31 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32); 32 object_property_add_child(obj, "gpu-bus", OBJECT(&s->gpu_bus_mr), NULL); 33 34 /* Internal memory region for request/response communication with 35 * mailbox-addressable peripherals (not exported) 36 */ 37 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox", 38 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT); 39 40 /* Interrupt Controller */ 41 object_initialize(&s->ic, sizeof(s->ic), TYPE_BCM2835_IC); 42 object_property_add_child(obj, "ic", OBJECT(&s->ic), NULL); 43 qdev_set_parent_bus(DEVICE(&s->ic), sysbus_get_default()); 44 45 /* UART0 */ 46 s->uart0 = SYS_BUS_DEVICE(object_new("pl011")); 47 object_property_add_child(obj, "uart0", OBJECT(s->uart0), NULL); 48 qdev_set_parent_bus(DEVICE(s->uart0), sysbus_get_default()); 49 50 /* Mailboxes */ 51 object_initialize(&s->mboxes, sizeof(s->mboxes), TYPE_BCM2835_MBOX); 52 object_property_add_child(obj, "mbox", OBJECT(&s->mboxes), NULL); 53 qdev_set_parent_bus(DEVICE(&s->mboxes), sysbus_get_default()); 54 55 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr", 56 OBJECT(&s->mbox_mr), &error_abort); 57 58 /* Property channel */ 59 object_initialize(&s->property, sizeof(s->property), TYPE_BCM2835_PROPERTY); 60 object_property_add_child(obj, "property", OBJECT(&s->property), NULL); 61 qdev_set_parent_bus(DEVICE(&s->property), sysbus_get_default()); 62 63 object_property_add_const_link(OBJECT(&s->property), "dma-mr", 64 OBJECT(&s->gpu_bus_mr), &error_abort); 65 66 /* Extended Mass Media Controller */ 67 object_initialize(&s->sdhci, sizeof(s->sdhci), TYPE_SYSBUS_SDHCI); 68 object_property_add_child(obj, "sdhci", OBJECT(&s->sdhci), NULL); 69 qdev_set_parent_bus(DEVICE(&s->sdhci), sysbus_get_default()); 70 } 71 72 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) 73 { 74 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev); 75 Object *obj; 76 MemoryRegion *ram; 77 Error *err = NULL; 78 uint32_t ram_size; 79 int n; 80 81 obj = object_property_get_link(OBJECT(dev), "ram", &err); 82 if (obj == NULL) { 83 error_setg(errp, "%s: required ram link not found: %s", 84 __func__, error_get_pretty(err)); 85 return; 86 } 87 88 ram = MEMORY_REGION(obj); 89 ram_size = memory_region_size(ram); 90 91 /* Map peripherals and RAM into the GPU address space. */ 92 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s), 93 "bcm2835-peripherals", &s->peri_mr, 0, 94 memory_region_size(&s->peri_mr)); 95 96 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE, 97 &s->peri_mr_alias, 1); 98 99 /* RAM is aliased four times (different cache configurations) on the GPU */ 100 for (n = 0; n < 4; n++) { 101 memory_region_init_alias(&s->ram_alias[n], OBJECT(s), 102 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size); 103 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30, 104 &s->ram_alias[n], 0); 105 } 106 107 /* Interrupt Controller */ 108 object_property_set_bool(OBJECT(&s->ic), true, "realized", &err); 109 if (err) { 110 error_propagate(errp, err); 111 return; 112 } 113 114 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET, 115 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0)); 116 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); 117 118 /* UART0 */ 119 object_property_set_bool(OBJECT(s->uart0), true, "realized", &err); 120 if (err) { 121 error_propagate(errp, err); 122 return; 123 } 124 125 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET, 126 sysbus_mmio_get_region(s->uart0, 0)); 127 sysbus_connect_irq(s->uart0, 0, 128 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 129 INTERRUPT_UART)); 130 131 /* Mailboxes */ 132 object_property_set_bool(OBJECT(&s->mboxes), true, "realized", &err); 133 if (err) { 134 error_propagate(errp, err); 135 return; 136 } 137 138 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET, 139 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0)); 140 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0, 141 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, 142 INTERRUPT_ARM_MAILBOX)); 143 144 /* Property channel */ 145 object_property_set_int(OBJECT(&s->property), ram_size, "ram-size", &err); 146 if (err) { 147 error_propagate(errp, err); 148 return; 149 } 150 151 object_property_set_bool(OBJECT(&s->property), true, "realized", &err); 152 if (err) { 153 error_propagate(errp, err); 154 return; 155 } 156 157 memory_region_add_subregion(&s->mbox_mr, 158 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT, 159 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0)); 160 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0, 161 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY)); 162 163 /* Extended Mass Media Controller */ 164 object_property_set_int(OBJECT(&s->sdhci), BCM2835_SDHC_CAPAREG, "capareg", 165 &err); 166 if (err) { 167 error_propagate(errp, err); 168 return; 169 } 170 171 object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err); 172 if (err) { 173 error_propagate(errp, err); 174 return; 175 } 176 177 memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET, 178 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0)); 179 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, 180 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 181 INTERRUPT_ARASANSDIO)); 182 } 183 184 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data) 185 { 186 DeviceClass *dc = DEVICE_CLASS(oc); 187 188 dc->realize = bcm2835_peripherals_realize; 189 } 190 191 static const TypeInfo bcm2835_peripherals_type_info = { 192 .name = TYPE_BCM2835_PERIPHERALS, 193 .parent = TYPE_SYS_BUS_DEVICE, 194 .instance_size = sizeof(BCM2835PeripheralState), 195 .instance_init = bcm2835_peripherals_init, 196 .class_init = bcm2835_peripherals_class_init, 197 }; 198 199 static void bcm2835_peripherals_register_types(void) 200 { 201 type_register_static(&bcm2835_peripherals_type_info); 202 } 203 204 type_init(bcm2835_peripherals_register_types) 205