1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or later. 9 * See the COPYING file in the top-level directory. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qapi/error.h" 14 #include "qemu/module.h" 15 #include "hw/arm/bcm2835_peripherals.h" 16 #include "hw/misc/bcm2835_mbox_defs.h" 17 #include "hw/arm/raspi_platform.h" 18 #include "sysemu/sysemu.h" 19 20 /* Peripheral base address on the VC (GPU) system bus */ 21 #define BCM2835_VC_PERI_BASE 0x7e000000 22 23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */ 24 #define BCM2835_SDHC_CAPAREG 0x52134b4 25 26 static void create_unimp(BCM2835PeripheralState *ps, 27 UnimplementedDeviceState *uds, 28 const char *name, hwaddr ofs, hwaddr size) 29 { 30 object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE); 31 qdev_prop_set_string(DEVICE(uds), "name", name); 32 qdev_prop_set_uint64(DEVICE(uds), "size", size); 33 sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal); 34 memory_region_add_subregion_overlap(&ps->peri_mr, ofs, 35 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000); 36 } 37 38 static void bcm2835_peripherals_init(Object *obj) 39 { 40 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj); 41 42 /* Memory region for peripheral devices, which we export to our parent */ 43 memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000); 44 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr); 45 46 /* Internal memory region for peripheral bus addresses (not exported) */ 47 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32); 48 49 /* Internal memory region for request/response communication with 50 * mailbox-addressable peripherals (not exported) 51 */ 52 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox", 53 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT); 54 55 /* Interrupt Controller */ 56 object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC); 57 58 /* SYS Timer */ 59 object_initialize_child(obj, "systimer", &s->systmr, 60 TYPE_BCM2835_SYSTIMER); 61 62 /* UART0 */ 63 object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011); 64 65 /* AUX / UART1 */ 66 object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX); 67 68 /* Mailboxes */ 69 object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX); 70 71 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr", 72 OBJECT(&s->mbox_mr)); 73 74 /* Framebuffer */ 75 object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB); 76 object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size"); 77 78 object_property_add_const_link(OBJECT(&s->fb), "dma-mr", 79 OBJECT(&s->gpu_bus_mr)); 80 81 /* Property channel */ 82 object_initialize_child(obj, "property", &s->property, 83 TYPE_BCM2835_PROPERTY); 84 object_property_add_alias(obj, "board-rev", OBJECT(&s->property), 85 "board-rev"); 86 87 object_property_add_const_link(OBJECT(&s->property), "fb", 88 OBJECT(&s->fb)); 89 object_property_add_const_link(OBJECT(&s->property), "dma-mr", 90 OBJECT(&s->gpu_bus_mr)); 91 92 /* Random Number Generator */ 93 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG); 94 95 /* Extended Mass Media Controller */ 96 object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI); 97 98 /* SDHOST */ 99 object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST); 100 101 /* DMA Channels */ 102 object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA); 103 104 object_property_add_const_link(OBJECT(&s->dma), "dma-mr", 105 OBJECT(&s->gpu_bus_mr)); 106 107 /* Thermal */ 108 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL); 109 110 /* GPIO */ 111 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO); 112 113 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", 114 OBJECT(&s->sdhci.sdbus)); 115 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost", 116 OBJECT(&s->sdhost.sdbus)); 117 118 /* Mphi */ 119 object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI); 120 121 /* DWC2 */ 122 object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB); 123 124 object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr", 125 OBJECT(&s->gpu_bus_mr)); 126 } 127 128 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) 129 { 130 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev); 131 Object *obj; 132 MemoryRegion *ram; 133 Error *err = NULL; 134 uint64_t ram_size, vcram_size; 135 int n; 136 137 obj = object_property_get_link(OBJECT(dev), "ram", &error_abort); 138 139 ram = MEMORY_REGION(obj); 140 ram_size = memory_region_size(ram); 141 142 /* Map peripherals and RAM into the GPU address space. */ 143 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s), 144 "bcm2835-peripherals", &s->peri_mr, 0, 145 memory_region_size(&s->peri_mr)); 146 147 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE, 148 &s->peri_mr_alias, 1); 149 150 /* RAM is aliased four times (different cache configurations) on the GPU */ 151 for (n = 0; n < 4; n++) { 152 memory_region_init_alias(&s->ram_alias[n], OBJECT(s), 153 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size); 154 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30, 155 &s->ram_alias[n], 0); 156 } 157 158 /* Interrupt Controller */ 159 if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) { 160 return; 161 } 162 163 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET, 164 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0)); 165 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); 166 167 /* Sys Timer */ 168 if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) { 169 return; 170 } 171 memory_region_add_subregion(&s->peri_mr, ST_OFFSET, 172 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0)); 173 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0, 174 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, 175 INTERRUPT_ARM_TIMER)); 176 177 /* UART0 */ 178 qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0)); 179 if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) { 180 return; 181 } 182 183 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET, 184 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0)); 185 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0, 186 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 187 INTERRUPT_UART0)); 188 189 /* AUX / UART1 */ 190 qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1)); 191 192 if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) { 193 return; 194 } 195 196 memory_region_add_subregion(&s->peri_mr, AUX_OFFSET, 197 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0)); 198 sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0, 199 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 200 INTERRUPT_AUX)); 201 202 /* Mailboxes */ 203 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) { 204 return; 205 } 206 207 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET, 208 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0)); 209 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0, 210 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, 211 INTERRUPT_ARM_MAILBOX)); 212 213 /* Framebuffer */ 214 vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err); 215 if (err) { 216 error_propagate(errp, err); 217 return; 218 } 219 220 if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base", 221 ram_size - vcram_size, errp)) { 222 return; 223 } 224 225 if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) { 226 return; 227 } 228 229 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT, 230 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0)); 231 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0, 232 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB)); 233 234 /* Property channel */ 235 if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) { 236 return; 237 } 238 239 memory_region_add_subregion(&s->mbox_mr, 240 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT, 241 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0)); 242 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0, 243 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY)); 244 245 /* Random Number Generator */ 246 if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) { 247 return; 248 } 249 250 memory_region_add_subregion(&s->peri_mr, RNG_OFFSET, 251 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0)); 252 253 /* Extended Mass Media Controller 254 * 255 * Compatible with: 256 * - SD Host Controller Specification Version 3.0 Draft 1.0 257 * - SDIO Specification Version 3.0 258 * - MMC Specification Version 4.4 259 * 260 * For the exact details please refer to the Arasan documentation: 261 * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf 262 */ 263 object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3, 264 &error_abort); 265 object_property_set_uint(OBJECT(&s->sdhci), "capareg", 266 BCM2835_SDHC_CAPAREG, &error_abort); 267 object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true, 268 &error_abort); 269 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { 270 return; 271 } 272 273 memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET, 274 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0)); 275 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, 276 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 277 INTERRUPT_ARASANSDIO)); 278 279 /* SDHOST */ 280 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) { 281 return; 282 } 283 284 memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET, 285 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0)); 286 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0, 287 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 288 INTERRUPT_SDIO)); 289 290 /* DMA Channels */ 291 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) { 292 return; 293 } 294 295 memory_region_add_subregion(&s->peri_mr, DMA_OFFSET, 296 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0)); 297 memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET, 298 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1)); 299 300 for (n = 0; n <= 12; n++) { 301 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n, 302 qdev_get_gpio_in_named(DEVICE(&s->ic), 303 BCM2835_IC_GPU_IRQ, 304 INTERRUPT_DMA0 + n)); 305 } 306 307 /* THERMAL */ 308 if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) { 309 return; 310 } 311 memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET, 312 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0)); 313 314 /* GPIO */ 315 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { 316 return; 317 } 318 319 memory_region_add_subregion(&s->peri_mr, GPIO_OFFSET, 320 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0)); 321 322 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus"); 323 324 /* Mphi */ 325 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) { 326 return; 327 } 328 329 memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET, 330 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0)); 331 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0, 332 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 333 INTERRUPT_HOSTPORT)); 334 335 /* DWC2 */ 336 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) { 337 return; 338 } 339 340 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET, 341 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0)); 342 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0, 343 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 344 INTERRUPT_USB)); 345 346 create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000); 347 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40); 348 create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000); 349 create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000); 350 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); 351 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); 352 create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20); 353 create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100); 354 create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20); 355 create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20); 356 create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20); 357 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80); 358 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000); 359 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000); 360 create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000); 361 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100); 362 } 363 364 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data) 365 { 366 DeviceClass *dc = DEVICE_CLASS(oc); 367 368 dc->realize = bcm2835_peripherals_realize; 369 } 370 371 static const TypeInfo bcm2835_peripherals_type_info = { 372 .name = TYPE_BCM2835_PERIPHERALS, 373 .parent = TYPE_SYS_BUS_DEVICE, 374 .instance_size = sizeof(BCM2835PeripheralState), 375 .instance_init = bcm2835_peripherals_init, 376 .class_init = bcm2835_peripherals_class_init, 377 }; 378 379 static void bcm2835_peripherals_register_types(void) 380 { 381 type_register_static(&bcm2835_peripherals_type_info); 382 } 383 384 type_init(bcm2835_peripherals_register_types) 385