1 /* 2 * Allwinner A10 SoC emulation 3 * 4 * Copyright (C) 2013 Li Guang 5 * Written by Li Guang <lig.fnst@cn.fujitsu.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "exec/address-spaces.h" 20 #include "qapi/error.h" 21 #include "qemu/module.h" 22 #include "cpu.h" 23 #include "hw/sysbus.h" 24 #include "hw/arm/allwinner-a10.h" 25 #include "hw/misc/unimp.h" 26 #include "sysemu/sysemu.h" 27 #include "hw/boards.h" 28 #include "hw/usb/hcd-ohci.h" 29 30 #define AW_A10_MMC0_BASE 0x01c0f000 31 #define AW_A10_PIC_REG_BASE 0x01c20400 32 #define AW_A10_PIT_REG_BASE 0x01c20c00 33 #define AW_A10_UART0_REG_BASE 0x01c28000 34 #define AW_A10_EMAC_BASE 0x01c0b000 35 #define AW_A10_EHCI_BASE 0x01c14000 36 #define AW_A10_OHCI_BASE 0x01c14400 37 #define AW_A10_SATA_BASE 0x01c18000 38 #define AW_A10_RTC_BASE 0x01c20d00 39 40 static void aw_a10_init(Object *obj) 41 { 42 AwA10State *s = AW_A10(obj); 43 44 object_initialize_child(obj, "cpu", &s->cpu, 45 ARM_CPU_TYPE_NAME("cortex-a8")); 46 47 object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC); 48 49 object_initialize_child(obj, "timer", &s->timer, TYPE_AW_A10_PIT); 50 51 object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC); 52 53 object_initialize_child(obj, "sata", &s->sata, TYPE_ALLWINNER_AHCI); 54 55 if (machine_usb(current_machine)) { 56 int i; 57 58 for (i = 0; i < AW_A10_NUM_USB; i++) { 59 object_initialize_child(obj, "ehci[*]", &s->ehci[i], 60 TYPE_PLATFORM_EHCI); 61 object_initialize_child(obj, "ohci[*]", &s->ohci[i], 62 TYPE_SYSBUS_OHCI); 63 } 64 } 65 66 object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN4I); 67 68 object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN4I); 69 } 70 71 static void aw_a10_realize(DeviceState *dev, Error **errp) 72 { 73 AwA10State *s = AW_A10(dev); 74 SysBusDevice *sysbusdev; 75 Error *err = NULL; 76 77 qdev_realize(DEVICE(&s->cpu), NULL, &err); 78 if (err != NULL) { 79 error_propagate(errp, err); 80 return; 81 } 82 83 sysbus_realize(SYS_BUS_DEVICE(&s->intc), &err); 84 if (err != NULL) { 85 error_propagate(errp, err); 86 return; 87 } 88 sysbusdev = SYS_BUS_DEVICE(&s->intc); 89 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE); 90 sysbus_connect_irq(sysbusdev, 0, 91 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ)); 92 sysbus_connect_irq(sysbusdev, 1, 93 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ)); 94 qdev_pass_gpios(DEVICE(&s->intc), dev, NULL); 95 96 sysbus_realize(SYS_BUS_DEVICE(&s->timer), &err); 97 if (err != NULL) { 98 error_propagate(errp, err); 99 return; 100 } 101 sysbusdev = SYS_BUS_DEVICE(&s->timer); 102 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE); 103 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 22)); 104 sysbus_connect_irq(sysbusdev, 1, qdev_get_gpio_in(dev, 23)); 105 sysbus_connect_irq(sysbusdev, 2, qdev_get_gpio_in(dev, 24)); 106 sysbus_connect_irq(sysbusdev, 3, qdev_get_gpio_in(dev, 25)); 107 sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67)); 108 sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68)); 109 110 memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB, 111 &error_fatal); 112 memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a); 113 create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB); 114 115 /* FIXME use qdev NIC properties instead of nd_table[] */ 116 if (nd_table[0].used) { 117 qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC); 118 qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); 119 } 120 sysbus_realize(SYS_BUS_DEVICE(&s->emac), &err); 121 if (err != NULL) { 122 error_propagate(errp, err); 123 return; 124 } 125 sysbusdev = SYS_BUS_DEVICE(&s->emac); 126 sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE); 127 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55)); 128 129 sysbus_realize(SYS_BUS_DEVICE(&s->sata), &err); 130 if (err) { 131 error_propagate(errp, err); 132 return; 133 } 134 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE); 135 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, qdev_get_gpio_in(dev, 56)); 136 137 /* FIXME use a qdev chardev prop instead of serial_hd() */ 138 serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, 139 qdev_get_gpio_in(dev, 1), 140 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN); 141 142 if (machine_usb(current_machine)) { 143 int i; 144 145 for (i = 0; i < AW_A10_NUM_USB; i++) { 146 char bus[16]; 147 148 sprintf(bus, "usb-bus.%d", i); 149 150 object_property_set_bool(OBJECT(&s->ehci[i]), true, 151 "companion-enable", &error_fatal); 152 sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal); 153 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, 154 AW_A10_EHCI_BASE + i * 0x8000); 155 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, 156 qdev_get_gpio_in(dev, 39 + i)); 157 158 object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus", 159 &error_fatal); 160 sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal); 161 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, 162 AW_A10_OHCI_BASE + i * 0x8000); 163 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0, 164 qdev_get_gpio_in(dev, 64 + i)); 165 } 166 } 167 168 /* SD/MMC */ 169 sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal); 170 sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE); 171 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32)); 172 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0), 173 "sd-bus"); 174 175 /* RTC */ 176 sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal); 177 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->rtc), 0, AW_A10_RTC_BASE, 10); 178 } 179 180 static void aw_a10_class_init(ObjectClass *oc, void *data) 181 { 182 DeviceClass *dc = DEVICE_CLASS(oc); 183 184 dc->realize = aw_a10_realize; 185 /* Reason: Uses serial_hds and nd_table in realize function */ 186 dc->user_creatable = false; 187 } 188 189 static const TypeInfo aw_a10_type_info = { 190 .name = TYPE_AW_A10, 191 .parent = TYPE_DEVICE, 192 .instance_size = sizeof(AwA10State), 193 .instance_init = aw_a10_init, 194 .class_init = aw_a10_class_init, 195 }; 196 197 static void aw_a10_register_types(void) 198 { 199 type_register_static(&aw_a10_type_info); 200 } 201 202 type_init(aw_a10_register_types) 203