xref: /openbmc/qemu/hw/arm/allwinner-a10.c (revision 6ab425d8)
1 /*
2  * Allwinner A10 SoC emulation
3  *
4  * Copyright (C) 2013 Li Guang
5  * Written by Li Guang <lig.fnst@cn.fujitsu.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License as published by the
9  * Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15  * for more details.
16  */
17 
18 #include "qemu/osdep.h"
19 #include "exec/address-spaces.h"
20 #include "qapi/error.h"
21 #include "qemu/module.h"
22 #include "cpu.h"
23 #include "hw/sysbus.h"
24 #include "hw/arm/allwinner-a10.h"
25 #include "hw/misc/unimp.h"
26 #include "sysemu/sysemu.h"
27 #include "hw/boards.h"
28 #include "hw/usb/hcd-ohci.h"
29 
30 #define AW_A10_PIC_REG_BASE     0x01c20400
31 #define AW_A10_PIT_REG_BASE     0x01c20c00
32 #define AW_A10_UART0_REG_BASE   0x01c28000
33 #define AW_A10_EMAC_BASE        0x01c0b000
34 #define AW_A10_EHCI_BASE        0x01c14000
35 #define AW_A10_OHCI_BASE        0x01c14400
36 #define AW_A10_SATA_BASE        0x01c18000
37 
38 static void aw_a10_init(Object *obj)
39 {
40     AwA10State *s = AW_A10(obj);
41 
42     object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu),
43                             ARM_CPU_TYPE_NAME("cortex-a8"),
44                             &error_abort, NULL);
45 
46     sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
47                           TYPE_AW_A10_PIC);
48 
49     sysbus_init_child_obj(obj, "timer", &s->timer, sizeof(s->timer),
50                           TYPE_AW_A10_PIT);
51 
52     sysbus_init_child_obj(obj, "emac", &s->emac, sizeof(s->emac), TYPE_AW_EMAC);
53 
54     sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata),
55                           TYPE_ALLWINNER_AHCI);
56 
57     if (machine_usb(current_machine)) {
58         int i;
59 
60         for (i = 0; i < AW_A10_NUM_USB; i++) {
61             sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]),
62                                   sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI);
63             sysbus_init_child_obj(obj, "ohci[*]", OBJECT(&s->ohci[i]),
64                                   sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI);
65         }
66     }
67 }
68 
69 static void aw_a10_realize(DeviceState *dev, Error **errp)
70 {
71     AwA10State *s = AW_A10(dev);
72     SysBusDevice *sysbusdev;
73     Error *err = NULL;
74 
75     object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
76     if (err != NULL) {
77         error_propagate(errp, err);
78         return;
79     }
80 
81     object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
82     if (err != NULL) {
83         error_propagate(errp, err);
84         return;
85     }
86     sysbusdev = SYS_BUS_DEVICE(&s->intc);
87     sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE);
88     sysbus_connect_irq(sysbusdev, 0,
89                        qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
90     sysbus_connect_irq(sysbusdev, 1,
91                        qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
92     qdev_pass_gpios(DEVICE(&s->intc), dev, NULL);
93 
94     object_property_set_bool(OBJECT(&s->timer), true, "realized", &err);
95     if (err != NULL) {
96         error_propagate(errp, err);
97         return;
98     }
99     sysbusdev = SYS_BUS_DEVICE(&s->timer);
100     sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE);
101     sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 22));
102     sysbus_connect_irq(sysbusdev, 1, qdev_get_gpio_in(dev, 23));
103     sysbus_connect_irq(sysbusdev, 2, qdev_get_gpio_in(dev, 24));
104     sysbus_connect_irq(sysbusdev, 3, qdev_get_gpio_in(dev, 25));
105     sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67));
106     sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68));
107 
108     memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB,
109                            &error_fatal);
110     memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
111     create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
112 
113     /* FIXME use qdev NIC properties instead of nd_table[] */
114     if (nd_table[0].used) {
115         qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
116         qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
117     }
118     object_property_set_bool(OBJECT(&s->emac), true, "realized", &err);
119     if (err != NULL) {
120         error_propagate(errp, err);
121         return;
122     }
123     sysbusdev = SYS_BUS_DEVICE(&s->emac);
124     sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE);
125     sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55));
126 
127     object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
128     if (err) {
129         error_propagate(errp, err);
130         return;
131     }
132     sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE);
133     sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, qdev_get_gpio_in(dev, 56));
134 
135     /* FIXME use a qdev chardev prop instead of serial_hd() */
136     serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2,
137                    qdev_get_gpio_in(dev, 1),
138                    115200, serial_hd(0), DEVICE_NATIVE_ENDIAN);
139 
140     if (machine_usb(current_machine)) {
141         int i;
142 
143         for (i = 0; i < AW_A10_NUM_USB; i++) {
144             char bus[16];
145 
146             sprintf(bus, "usb-bus.%d", i);
147 
148             object_property_set_bool(OBJECT(&s->ehci[i]), true,
149                                      "companion-enable", &error_fatal);
150             object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized",
151                                      &error_fatal);
152             sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
153                             AW_A10_EHCI_BASE + i * 0x8000);
154             sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
155                                qdev_get_gpio_in(dev, 39 + i));
156 
157             object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
158                                     &error_fatal);
159             object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized",
160                                      &error_fatal);
161             sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
162                             AW_A10_OHCI_BASE + i * 0x8000);
163             sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0,
164                                qdev_get_gpio_in(dev, 64 + i));
165         }
166     }
167 }
168 
169 static void aw_a10_class_init(ObjectClass *oc, void *data)
170 {
171     DeviceClass *dc = DEVICE_CLASS(oc);
172 
173     dc->realize = aw_a10_realize;
174     /* Reason: Uses serial_hds and nd_table in realize function */
175     dc->user_creatable = false;
176 }
177 
178 static const TypeInfo aw_a10_type_info = {
179     .name = TYPE_AW_A10,
180     .parent = TYPE_DEVICE,
181     .instance_size = sizeof(AwA10State),
182     .instance_init = aw_a10_init,
183     .class_init = aw_a10_class_init,
184 };
185 
186 static void aw_a10_register_types(void)
187 {
188     type_register_static(&aw_a10_type_info);
189 }
190 
191 type_init(aw_a10_register_types)
192