xref: /openbmc/qemu/hw/arm/allwinner-a10.c (revision 56411125)
1 /*
2  * Allwinner A10 SoC emulation
3  *
4  * Copyright (C) 2013 Li Guang
5  * Written by Li Guang <lig.fnst@cn.fujitsu.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License as published by the
9  * Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15  * for more details.
16  */
17 
18 #include "hw/sysbus.h"
19 #include "hw/devices.h"
20 #include "hw/arm/allwinner-a10.h"
21 
22 static void aw_a10_init(Object *obj)
23 {
24     AwA10State *s = AW_A10(obj);
25 
26     object_initialize(&s->cpu, sizeof(s->cpu), "cortex-a8-" TYPE_ARM_CPU);
27     object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
28 
29     object_initialize(&s->intc, sizeof(s->intc), TYPE_AW_A10_PIC);
30     qdev_set_parent_bus(DEVICE(&s->intc), sysbus_get_default());
31 
32     object_initialize(&s->timer, sizeof(s->timer), TYPE_AW_A10_PIT);
33     qdev_set_parent_bus(DEVICE(&s->timer), sysbus_get_default());
34 
35     object_initialize(&s->emac, sizeof(s->emac), TYPE_AW_EMAC);
36     qdev_set_parent_bus(DEVICE(&s->emac), sysbus_get_default());
37     /* FIXME use qdev NIC properties instead of nd_table[] */
38     if (nd_table[0].used) {
39         qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
40         qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
41     }
42 }
43 
44 static void aw_a10_realize(DeviceState *dev, Error **errp)
45 {
46     AwA10State *s = AW_A10(dev);
47     SysBusDevice *sysbusdev;
48     uint8_t i;
49     qemu_irq fiq, irq;
50     Error *err = NULL;
51 
52     object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
53     if (err != NULL) {
54         error_propagate(errp, err);
55         return;
56     }
57     irq = qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ);
58     fiq = qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ);
59 
60     object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
61     if (err != NULL) {
62         error_propagate(errp, err);
63         return;
64     }
65     sysbusdev = SYS_BUS_DEVICE(&s->intc);
66     sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE);
67     sysbus_connect_irq(sysbusdev, 0, irq);
68     sysbus_connect_irq(sysbusdev, 1, fiq);
69     for (i = 0; i < AW_A10_PIC_INT_NR; i++) {
70         s->irq[i] = qdev_get_gpio_in(DEVICE(&s->intc), i);
71     }
72 
73     object_property_set_bool(OBJECT(&s->timer), true, "realized", &err);
74     if (err != NULL) {
75         error_propagate(errp, err);
76         return;
77     }
78     sysbusdev = SYS_BUS_DEVICE(&s->timer);
79     sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE);
80     sysbus_connect_irq(sysbusdev, 0, s->irq[22]);
81     sysbus_connect_irq(sysbusdev, 1, s->irq[23]);
82     sysbus_connect_irq(sysbusdev, 2, s->irq[24]);
83     sysbus_connect_irq(sysbusdev, 3, s->irq[25]);
84     sysbus_connect_irq(sysbusdev, 4, s->irq[67]);
85     sysbus_connect_irq(sysbusdev, 5, s->irq[68]);
86 
87     object_property_set_bool(OBJECT(&s->emac), true, "realized", &err);
88     if (err != NULL) {
89         error_propagate(errp, err);
90         return;
91     }
92     sysbusdev = SYS_BUS_DEVICE(&s->emac);
93     sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE);
94     sysbus_connect_irq(sysbusdev, 0, s->irq[55]);
95 
96     /* FIXME use a qdev chardev prop instead of serial_hds[] */
97     serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, s->irq[1],
98                    115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
99 }
100 
101 static void aw_a10_class_init(ObjectClass *oc, void *data)
102 {
103     DeviceClass *dc = DEVICE_CLASS(oc);
104 
105     dc->realize = aw_a10_realize;
106 
107     /*
108      * Reason: creates an ARM CPU, thus use after free(), see
109      * arm_cpu_class_init()
110      */
111     dc->cannot_destroy_with_object_finalize_yet = true;
112 }
113 
114 static const TypeInfo aw_a10_type_info = {
115     .name = TYPE_AW_A10,
116     .parent = TYPE_DEVICE,
117     .instance_size = sizeof(AwA10State),
118     .instance_init = aw_a10_init,
119     .class_init = aw_a10_class_init,
120 };
121 
122 static void aw_a10_register_types(void)
123 {
124     type_register_static(&aw_a10_type_info);
125 }
126 
127 type_init(aw_a10_register_types)
128