1 /* 2 * Allwinner A10 SoC emulation 3 * 4 * Copyright (C) 2013 Li Guang 5 * Written by Li Guang <lig.fnst@cn.fujitsu.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "exec/address-spaces.h" 20 #include "qapi/error.h" 21 #include "qemu/module.h" 22 #include "cpu.h" 23 #include "hw/sysbus.h" 24 #include "hw/arm/allwinner-a10.h" 25 #include "hw/misc/unimp.h" 26 #include "sysemu/sysemu.h" 27 #include "hw/boards.h" 28 #include "hw/usb/hcd-ohci.h" 29 30 #define AW_A10_MMC0_BASE 0x01c0f000 31 #define AW_A10_PIC_REG_BASE 0x01c20400 32 #define AW_A10_PIT_REG_BASE 0x01c20c00 33 #define AW_A10_UART0_REG_BASE 0x01c28000 34 #define AW_A10_EMAC_BASE 0x01c0b000 35 #define AW_A10_EHCI_BASE 0x01c14000 36 #define AW_A10_OHCI_BASE 0x01c14400 37 #define AW_A10_SATA_BASE 0x01c18000 38 #define AW_A10_RTC_BASE 0x01c20d00 39 40 static void aw_a10_init(Object *obj) 41 { 42 AwA10State *s = AW_A10(obj); 43 44 object_initialize_child(obj, "cpu", &s->cpu, 45 ARM_CPU_TYPE_NAME("cortex-a8")); 46 47 object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC); 48 49 object_initialize_child(obj, "timer", &s->timer, TYPE_AW_A10_PIT); 50 51 object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC); 52 53 object_initialize_child(obj, "sata", &s->sata, TYPE_ALLWINNER_AHCI); 54 55 if (machine_usb(current_machine)) { 56 int i; 57 58 for (i = 0; i < AW_A10_NUM_USB; i++) { 59 object_initialize_child(obj, "ehci[*]", &s->ehci[i], 60 TYPE_PLATFORM_EHCI); 61 object_initialize_child(obj, "ohci[*]", &s->ohci[i], 62 TYPE_SYSBUS_OHCI); 63 } 64 } 65 66 object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN4I); 67 68 object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN4I); 69 } 70 71 static void aw_a10_realize(DeviceState *dev, Error **errp) 72 { 73 AwA10State *s = AW_A10(dev); 74 SysBusDevice *sysbusdev; 75 Error *err = NULL; 76 77 if (!qdev_realize(DEVICE(&s->cpu), NULL, &err)) { 78 error_propagate(errp, err); 79 return; 80 } 81 82 if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), &err)) { 83 error_propagate(errp, err); 84 return; 85 } 86 sysbusdev = SYS_BUS_DEVICE(&s->intc); 87 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE); 88 sysbus_connect_irq(sysbusdev, 0, 89 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ)); 90 sysbus_connect_irq(sysbusdev, 1, 91 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ)); 92 qdev_pass_gpios(DEVICE(&s->intc), dev, NULL); 93 94 if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer), &err)) { 95 error_propagate(errp, err); 96 return; 97 } 98 sysbusdev = SYS_BUS_DEVICE(&s->timer); 99 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE); 100 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 22)); 101 sysbus_connect_irq(sysbusdev, 1, qdev_get_gpio_in(dev, 23)); 102 sysbus_connect_irq(sysbusdev, 2, qdev_get_gpio_in(dev, 24)); 103 sysbus_connect_irq(sysbusdev, 3, qdev_get_gpio_in(dev, 25)); 104 sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67)); 105 sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68)); 106 107 memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB, 108 &error_fatal); 109 memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a); 110 create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB); 111 112 /* FIXME use qdev NIC properties instead of nd_table[] */ 113 if (nd_table[0].used) { 114 qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC); 115 qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); 116 } 117 if (!sysbus_realize(SYS_BUS_DEVICE(&s->emac), &err)) { 118 error_propagate(errp, err); 119 return; 120 } 121 sysbusdev = SYS_BUS_DEVICE(&s->emac); 122 sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE); 123 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55)); 124 125 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sata), &err)) { 126 error_propagate(errp, err); 127 return; 128 } 129 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE); 130 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, qdev_get_gpio_in(dev, 56)); 131 132 /* FIXME use a qdev chardev prop instead of serial_hd() */ 133 serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, 134 qdev_get_gpio_in(dev, 1), 135 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN); 136 137 if (machine_usb(current_machine)) { 138 int i; 139 140 for (i = 0; i < AW_A10_NUM_USB; i++) { 141 char bus[16]; 142 143 sprintf(bus, "usb-bus.%d", i); 144 145 object_property_set_bool(OBJECT(&s->ehci[i]), true, 146 "companion-enable", &error_fatal); 147 sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal); 148 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, 149 AW_A10_EHCI_BASE + i * 0x8000); 150 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, 151 qdev_get_gpio_in(dev, 39 + i)); 152 153 object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus", 154 &error_fatal); 155 sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal); 156 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, 157 AW_A10_OHCI_BASE + i * 0x8000); 158 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0, 159 qdev_get_gpio_in(dev, 64 + i)); 160 } 161 } 162 163 /* SD/MMC */ 164 sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal); 165 sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE); 166 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32)); 167 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0), 168 "sd-bus"); 169 170 /* RTC */ 171 sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal); 172 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->rtc), 0, AW_A10_RTC_BASE, 10); 173 } 174 175 static void aw_a10_class_init(ObjectClass *oc, void *data) 176 { 177 DeviceClass *dc = DEVICE_CLASS(oc); 178 179 dc->realize = aw_a10_realize; 180 /* Reason: Uses serial_hds and nd_table in realize function */ 181 dc->user_creatable = false; 182 } 183 184 static const TypeInfo aw_a10_type_info = { 185 .name = TYPE_AW_A10, 186 .parent = TYPE_DEVICE, 187 .instance_size = sizeof(AwA10State), 188 .instance_init = aw_a10_init, 189 .class_init = aw_a10_class_init, 190 }; 191 192 static void aw_a10_register_types(void) 193 { 194 type_register_static(&aw_a10_type_info); 195 } 196 197 type_init(aw_a10_register_types) 198