1 /* 2 * Allwinner A10 SoC emulation 3 * 4 * Copyright (C) 2013 Li Guang 5 * Written by Li Guang <lig.fnst@cn.fujitsu.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "hw/sysbus.h" 20 #include "hw/devices.h" 21 #include "hw/arm/allwinner-a10.h" 22 23 static void aw_a10_init(Object *obj) 24 { 25 AwA10State *s = AW_A10(obj); 26 27 object_initialize(&s->cpu, sizeof(s->cpu), "cortex-a8-" TYPE_ARM_CPU); 28 object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL); 29 30 object_initialize(&s->intc, sizeof(s->intc), TYPE_AW_A10_PIC); 31 qdev_set_parent_bus(DEVICE(&s->intc), sysbus_get_default()); 32 33 object_initialize(&s->timer, sizeof(s->timer), TYPE_AW_A10_PIT); 34 qdev_set_parent_bus(DEVICE(&s->timer), sysbus_get_default()); 35 36 object_initialize(&s->emac, sizeof(s->emac), TYPE_AW_EMAC); 37 qdev_set_parent_bus(DEVICE(&s->emac), sysbus_get_default()); 38 /* FIXME use qdev NIC properties instead of nd_table[] */ 39 if (nd_table[0].used) { 40 qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC); 41 qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); 42 } 43 44 object_initialize(&s->sata, sizeof(s->sata), TYPE_ALLWINNER_AHCI); 45 qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default()); 46 } 47 48 static void aw_a10_realize(DeviceState *dev, Error **errp) 49 { 50 AwA10State *s = AW_A10(dev); 51 SysBusDevice *sysbusdev; 52 uint8_t i; 53 qemu_irq fiq, irq; 54 Error *err = NULL; 55 56 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 57 if (err != NULL) { 58 error_propagate(errp, err); 59 return; 60 } 61 irq = qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ); 62 fiq = qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ); 63 64 object_property_set_bool(OBJECT(&s->intc), true, "realized", &err); 65 if (err != NULL) { 66 error_propagate(errp, err); 67 return; 68 } 69 sysbusdev = SYS_BUS_DEVICE(&s->intc); 70 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE); 71 sysbus_connect_irq(sysbusdev, 0, irq); 72 sysbus_connect_irq(sysbusdev, 1, fiq); 73 for (i = 0; i < AW_A10_PIC_INT_NR; i++) { 74 s->irq[i] = qdev_get_gpio_in(DEVICE(&s->intc), i); 75 } 76 77 object_property_set_bool(OBJECT(&s->timer), true, "realized", &err); 78 if (err != NULL) { 79 error_propagate(errp, err); 80 return; 81 } 82 sysbusdev = SYS_BUS_DEVICE(&s->timer); 83 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE); 84 sysbus_connect_irq(sysbusdev, 0, s->irq[22]); 85 sysbus_connect_irq(sysbusdev, 1, s->irq[23]); 86 sysbus_connect_irq(sysbusdev, 2, s->irq[24]); 87 sysbus_connect_irq(sysbusdev, 3, s->irq[25]); 88 sysbus_connect_irq(sysbusdev, 4, s->irq[67]); 89 sysbus_connect_irq(sysbusdev, 5, s->irq[68]); 90 91 object_property_set_bool(OBJECT(&s->emac), true, "realized", &err); 92 if (err != NULL) { 93 error_propagate(errp, err); 94 return; 95 } 96 sysbusdev = SYS_BUS_DEVICE(&s->emac); 97 sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE); 98 sysbus_connect_irq(sysbusdev, 0, s->irq[55]); 99 100 object_property_set_bool(OBJECT(&s->sata), true, "realized", &err); 101 if (err) { 102 error_propagate(errp, err); 103 return; 104 } 105 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE); 106 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, s->irq[56]); 107 108 /* FIXME use a qdev chardev prop instead of serial_hds[] */ 109 serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, s->irq[1], 110 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN); 111 } 112 113 static void aw_a10_class_init(ObjectClass *oc, void *data) 114 { 115 DeviceClass *dc = DEVICE_CLASS(oc); 116 117 dc->realize = aw_a10_realize; 118 119 /* 120 * Reason: creates an ARM CPU, thus use after free(), see 121 * arm_cpu_class_init() 122 */ 123 dc->cannot_destroy_with_object_finalize_yet = true; 124 } 125 126 static const TypeInfo aw_a10_type_info = { 127 .name = TYPE_AW_A10, 128 .parent = TYPE_DEVICE, 129 .instance_size = sizeof(AwA10State), 130 .instance_init = aw_a10_init, 131 .class_init = aw_a10_class_init, 132 }; 133 134 static void aw_a10_register_types(void) 135 { 136 type_register_static(&aw_a10_type_info); 137 } 138 139 type_init(aw_a10_register_types) 140