1 /*
2 * QEMU Alpha PCI support functions.
3 *
4 * Some of this isn't very Alpha specific at all.
5 *
6 * ??? Sparse memory access not implemented.
7 */
8
9 #include "qemu/osdep.h"
10 #include "hw/pci/pci_host.h"
11 #include "alpha_sys.h"
12 #include "qemu/log.h"
13 #include "trace.h"
14
15
16 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */
17
ignore_read(void * opaque,hwaddr addr,unsigned size)18 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)
19 {
20 return 0;
21 }
22
ignore_write(void * opaque,hwaddr addr,uint64_t v,unsigned size)23 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)
24 {
25 }
26
27 const MemoryRegionOps alpha_pci_ignore_ops = {
28 .read = ignore_read,
29 .write = ignore_write,
30 .endianness = DEVICE_LITTLE_ENDIAN,
31 .valid = {
32 .min_access_size = 1,
33 .max_access_size = 8,
34 },
35 .impl = {
36 .min_access_size = 1,
37 .max_access_size = 8,
38 },
39 };
40
41
42 /* PCI config space reads/writes, to byte-word addressable memory. */
bw_conf1_read(void * opaque,hwaddr addr,unsigned size)43 static uint64_t bw_conf1_read(void *opaque, hwaddr addr,
44 unsigned size)
45 {
46 PCIBus *b = opaque;
47 return pci_data_read(b, addr, size);
48 }
49
bw_conf1_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)50 static void bw_conf1_write(void *opaque, hwaddr addr,
51 uint64_t val, unsigned size)
52 {
53 PCIBus *b = opaque;
54 pci_data_write(b, addr, val, size);
55 }
56
57 const MemoryRegionOps alpha_pci_conf1_ops = {
58 .read = bw_conf1_read,
59 .write = bw_conf1_write,
60 .endianness = DEVICE_LITTLE_ENDIAN,
61 .impl = {
62 .min_access_size = 1,
63 .max_access_size = 4,
64 },
65 };
66
67 /* PCI/EISA Interrupt Acknowledge Cycle. */
68
iack_read(void * opaque,hwaddr addr,unsigned size)69 static uint64_t iack_read(void *opaque, hwaddr addr, unsigned size)
70 {
71 return pic_read_irq(isa_pic);
72 }
73
special_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)74 static void special_write(void *opaque, hwaddr addr,
75 uint64_t val, unsigned size)
76 {
77 trace_alpha_pci_iack_write();
78 }
79
80 const MemoryRegionOps alpha_pci_iack_ops = {
81 .read = iack_read,
82 .write = special_write,
83 .endianness = DEVICE_LITTLE_ENDIAN,
84 .valid = {
85 .min_access_size = 4,
86 .max_access_size = 4,
87 },
88 .impl = {
89 .min_access_size = 4,
90 .max_access_size = 4,
91 },
92 };
93