xref: /openbmc/qemu/hw/acpi/pcihp.c (revision 4366e1db)
1 /*
2  * QEMU<->ACPI BIOS PCI hotplug interface
3  *
4  * QEMU supports PCI hotplug via ACPI. This module
5  * implements the interface between QEMU and the ACPI BIOS.
6  * Interface specification - see docs/specs/acpi_pci_hotplug.txt
7  *
8  * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
9  * Copyright (c) 2006 Fabrice Bellard
10  *
11  * This library is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU Lesser General Public
13  * License version 2 as published by the Free Software Foundation.
14  *
15  * This library is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18  * Lesser General Public License for more details.
19  *
20  * You should have received a copy of the GNU Lesser General Public
21  * License along with this library; if not, see <http://www.gnu.org/licenses/>
22  *
23  * Contributions after 2012-01-13 are licensed under the terms of the
24  * GNU GPL, version 2 or (at your option) any later version.
25  */
26 
27 #include "qemu/osdep.h"
28 #include "hw/acpi/pcihp.h"
29 
30 #include "hw/hw.h"
31 #include "hw/i386/pc.h"
32 #include "hw/pci/pci.h"
33 #include "hw/pci/pci_bridge.h"
34 #include "hw/acpi/acpi.h"
35 #include "sysemu/sysemu.h"
36 #include "exec/address-spaces.h"
37 #include "hw/pci/pci_bus.h"
38 #include "qapi/error.h"
39 #include "qom/qom-qobject.h"
40 
41 //#define DEBUG
42 
43 #ifdef DEBUG
44 # define ACPI_PCIHP_DPRINTF(format, ...)     printf(format, ## __VA_ARGS__)
45 #else
46 # define ACPI_PCIHP_DPRINTF(format, ...)     do { } while (0)
47 #endif
48 
49 #define ACPI_PCIHP_ADDR 0xae00
50 #define ACPI_PCIHP_SIZE 0x0014
51 #define PCI_UP_BASE 0x0000
52 #define PCI_DOWN_BASE 0x0004
53 #define PCI_EJ_BASE 0x0008
54 #define PCI_RMV_BASE 0x000c
55 #define PCI_SEL_BASE 0x0010
56 
57 typedef struct AcpiPciHpFind {
58     int bsel;
59     PCIBus *bus;
60 } AcpiPciHpFind;
61 
62 static int acpi_pcihp_get_bsel(PCIBus *bus)
63 {
64     Error *local_err = NULL;
65     uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
66                                              &local_err);
67 
68     if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
69         if (local_err) {
70             error_free(local_err);
71         }
72         return -1;
73     } else {
74         return bsel;
75     }
76 }
77 
78 /* Assign BSEL property to all buses.  In the future, this can be changed
79  * to only assign to buses that support hotplug.
80  */
81 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
82 {
83     unsigned *bsel_alloc = opaque;
84     unsigned *bus_bsel;
85 
86     if (qbus_is_hotpluggable(BUS(bus))) {
87         bus_bsel = g_malloc(sizeof *bus_bsel);
88 
89         *bus_bsel = (*bsel_alloc)++;
90         object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
91                                        bus_bsel, &error_abort);
92     }
93 
94     return bsel_alloc;
95 }
96 
97 static void acpi_set_pci_info(void)
98 {
99     static bool bsel_is_set;
100     PCIBus *bus;
101     unsigned bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT;
102 
103     if (bsel_is_set) {
104         return;
105     }
106     bsel_is_set = true;
107 
108     bus = find_i440fx(); /* TODO: Q35 support */
109     if (bus) {
110         /* Scan all PCI buses. Set property to enable acpi based hotplug. */
111         pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
112     }
113 }
114 
115 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
116 {
117     AcpiPciHpFind *find = opaque;
118     if (find->bsel == acpi_pcihp_get_bsel(bus)) {
119         find->bus = bus;
120     }
121 }
122 
123 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
124 {
125     AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
126 
127     if (bsel < 0) {
128         return NULL;
129     }
130 
131     pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
132 
133     /* Make bsel 0 eject root bus if bsel property is not set,
134      * for compatibility with non acpi setups.
135      * TODO: really needed?
136      */
137     if (!bsel && !find.bus) {
138         find.bus = s->root;
139     }
140     return find.bus;
141 }
142 
143 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
144 {
145     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
146     DeviceClass *dc = DEVICE_GET_CLASS(dev);
147     /*
148      * ACPI doesn't allow hotplug of bridge devices.  Don't allow
149      * hot-unplug of bridge devices unless they were added by hotplug
150      * (and so, not described by acpi).
151      */
152     return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable;
153 }
154 
155 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
156 {
157     HotplugHandler *hotplug_ctrl;
158     BusChild *kid, *next;
159     int slot = ctz32(slots);
160     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
161 
162     if (!bus) {
163         return;
164     }
165 
166     /* Mark request as complete */
167     s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
168     s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
169 
170     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
171         DeviceState *qdev = kid->child;
172         PCIDevice *dev = PCI_DEVICE(qdev);
173         if (PCI_SLOT(dev->devfn) == slot) {
174             if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
175                 hotplug_ctrl = qdev_get_hotplug_handler(qdev);
176                 hotplug_handler_unplug(hotplug_ctrl, qdev, &error_abort);
177             }
178         }
179     }
180 }
181 
182 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
183 {
184     BusChild *kid, *next;
185     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
186 
187     /* Execute any pending removes during reset */
188     while (s->acpi_pcihp_pci_status[bsel].down) {
189         acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
190     }
191 
192     s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
193 
194     if (!bus) {
195         return;
196     }
197     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
198         DeviceState *qdev = kid->child;
199         PCIDevice *pdev = PCI_DEVICE(qdev);
200         int slot = PCI_SLOT(pdev->devfn);
201 
202         if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
203             s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
204         }
205     }
206 }
207 
208 static void acpi_pcihp_update(AcpiPciHpState *s)
209 {
210     int i;
211 
212     for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
213         acpi_pcihp_update_hotplug_bus(s, i);
214     }
215 }
216 
217 void acpi_pcihp_reset(AcpiPciHpState *s)
218 {
219     acpi_set_pci_info();
220     acpi_pcihp_update(s);
221 }
222 
223 void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
224                                    DeviceState *dev, Error **errp)
225 {
226     /* Only hotplugged devices need the hotplug capability. */
227     if (dev->hotplugged &&
228         acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))) < 0) {
229         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
230                    ACPI_PCIHP_PROP_BSEL "' set");
231         return;
232     }
233 }
234 
235 void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
236                                DeviceState *dev, Error **errp)
237 {
238     PCIDevice *pdev = PCI_DEVICE(dev);
239     int slot = PCI_SLOT(pdev->devfn);
240     int bsel;
241 
242     /* Don't send event when device is enabled during qemu machine creation:
243      * it is present on boot, no hotplug event is necessary. We do send an
244      * event when the device is disabled later. */
245     if (!dev->hotplugged) {
246         /*
247          * Overwrite the default hotplug handler with the ACPI PCI one
248          * for cold plugged bridges only.
249          */
250         if (!s->legacy_piix &&
251             object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
252             PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
253 
254             qbus_set_hotplug_handler(BUS(sec), DEVICE(hotplug_dev),
255                                      &error_abort);
256             /* We don't have to overwrite any other hotplug handler yet */
257             assert(QLIST_EMPTY(&sec->child));
258         }
259 
260         return;
261     }
262 
263     bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
264     g_assert(bsel >= 0);
265     s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
266     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
267 }
268 
269 void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
270                                  DeviceState *dev, Error **errp)
271 {
272     object_unparent(OBJECT(dev));
273 }
274 
275 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
276                                          AcpiPciHpState *s, DeviceState *dev,
277                                          Error **errp)
278 {
279     PCIDevice *pdev = PCI_DEVICE(dev);
280     int slot = PCI_SLOT(pdev->devfn);
281     int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
282     if (bsel < 0) {
283         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
284                    ACPI_PCIHP_PROP_BSEL "' set");
285         return;
286     }
287 
288     s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
289     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
290 }
291 
292 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
293 {
294     AcpiPciHpState *s = opaque;
295     uint32_t val = 0;
296     int bsel = s->hotplug_select;
297 
298     if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
299         return 0;
300     }
301 
302     switch (addr) {
303     case PCI_UP_BASE:
304         val = s->acpi_pcihp_pci_status[bsel].up;
305         if (!s->legacy_piix) {
306             s->acpi_pcihp_pci_status[bsel].up = 0;
307         }
308         ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val);
309         break;
310     case PCI_DOWN_BASE:
311         val = s->acpi_pcihp_pci_status[bsel].down;
312         ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val);
313         break;
314     case PCI_EJ_BASE:
315         /* No feature defined yet */
316         ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val);
317         break;
318     case PCI_RMV_BASE:
319         val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
320         ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val);
321         break;
322     case PCI_SEL_BASE:
323         val = s->hotplug_select;
324         ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val);
325     default:
326         break;
327     }
328 
329     return val;
330 }
331 
332 static void pci_write(void *opaque, hwaddr addr, uint64_t data,
333                       unsigned int size)
334 {
335     AcpiPciHpState *s = opaque;
336     switch (addr) {
337     case PCI_EJ_BASE:
338         if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
339             break;
340         }
341         acpi_pcihp_eject_slot(s, s->hotplug_select, data);
342         ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n",
343                       addr, data);
344         break;
345     case PCI_SEL_BASE:
346         s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data;
347         ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n",
348                       addr, data);
349     default:
350         break;
351     }
352 }
353 
354 static const MemoryRegionOps acpi_pcihp_io_ops = {
355     .read = pci_read,
356     .write = pci_write,
357     .endianness = DEVICE_LITTLE_ENDIAN,
358     .valid = {
359         .min_access_size = 4,
360         .max_access_size = 4,
361     },
362 };
363 
364 void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
365                      MemoryRegion *address_space_io, bool bridges_enabled)
366 {
367     s->io_len = ACPI_PCIHP_SIZE;
368     s->io_base = ACPI_PCIHP_ADDR;
369 
370     s->root= root_bus;
371     s->legacy_piix = !bridges_enabled;
372 
373     memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
374                           "acpi-pci-hotplug", s->io_len);
375     memory_region_add_subregion(address_space_io, s->io_base, &s->io);
376 
377     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
378                                    &error_abort);
379     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
380                                    &error_abort);
381 }
382 
383 const VMStateDescription vmstate_acpi_pcihp_pci_status = {
384     .name = "acpi_pcihp_pci_status",
385     .version_id = 1,
386     .minimum_version_id = 1,
387     .fields = (VMStateField[]) {
388         VMSTATE_UINT32(up, AcpiPciHpPciStatus),
389         VMSTATE_UINT32(down, AcpiPciHpPciStatus),
390         VMSTATE_END_OF_LIST()
391     }
392 };
393