1 /* 2 * QEMU<->ACPI BIOS PCI hotplug interface 3 * 4 * QEMU supports PCI hotplug via ACPI. This module 5 * implements the interface between QEMU and the ACPI BIOS. 6 * Interface specification - see docs/specs/acpi_pci_hotplug.txt 7 * 8 * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com) 9 * Copyright (c) 2006 Fabrice Bellard 10 * 11 * This library is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU Lesser General Public 13 * License version 2 as published by the Free Software Foundation. 14 * 15 * This library is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * Lesser General Public License for more details. 19 * 20 * You should have received a copy of the GNU Lesser General Public 21 * License along with this library; if not, see <http://www.gnu.org/licenses/> 22 * 23 * Contributions after 2012-01-13 are licensed under the terms of the 24 * GNU GPL, version 2 or (at your option) any later version. 25 */ 26 27 #include "qemu/osdep.h" 28 #include "hw/acpi/pcihp.h" 29 30 #include "hw/hw.h" 31 #include "hw/i386/pc.h" 32 #include "hw/pci/pci.h" 33 #include "hw/pci/pci_bridge.h" 34 #include "hw/acpi/acpi.h" 35 #include "sysemu/sysemu.h" 36 #include "exec/address-spaces.h" 37 #include "hw/pci/pci_bus.h" 38 #include "qapi/error.h" 39 #include "qom/qom-qobject.h" 40 41 //#define DEBUG 42 43 #ifdef DEBUG 44 # define ACPI_PCIHP_DPRINTF(format, ...) printf(format, ## __VA_ARGS__) 45 #else 46 # define ACPI_PCIHP_DPRINTF(format, ...) do { } while (0) 47 #endif 48 49 #define ACPI_PCIHP_ADDR 0xae00 50 #define ACPI_PCIHP_SIZE 0x0014 51 #define PCI_UP_BASE 0x0000 52 #define PCI_DOWN_BASE 0x0004 53 #define PCI_EJ_BASE 0x0008 54 #define PCI_RMV_BASE 0x000c 55 #define PCI_SEL_BASE 0x0010 56 57 typedef struct AcpiPciHpFind { 58 int bsel; 59 PCIBus *bus; 60 } AcpiPciHpFind; 61 62 static int acpi_pcihp_get_bsel(PCIBus *bus) 63 { 64 Error *local_err = NULL; 65 uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, 66 &local_err); 67 68 if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { 69 if (local_err) { 70 error_free(local_err); 71 } 72 return -1; 73 } else { 74 return bsel; 75 } 76 } 77 78 /* Assign BSEL property to all buses. In the future, this can be changed 79 * to only assign to buses that support hotplug. 80 */ 81 static void *acpi_set_bsel(PCIBus *bus, void *opaque) 82 { 83 unsigned *bsel_alloc = opaque; 84 unsigned *bus_bsel; 85 86 if (qbus_is_hotpluggable(BUS(bus))) { 87 bus_bsel = g_malloc(sizeof *bus_bsel); 88 89 *bus_bsel = (*bsel_alloc)++; 90 object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, 91 bus_bsel, &error_abort); 92 } 93 94 return bsel_alloc; 95 } 96 97 static void acpi_set_pci_info(void) 98 { 99 static bool bsel_is_set; 100 PCIBus *bus; 101 unsigned bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT; 102 103 if (bsel_is_set) { 104 return; 105 } 106 bsel_is_set = true; 107 108 bus = find_i440fx(); /* TODO: Q35 support */ 109 if (bus) { 110 /* Scan all PCI buses. Set property to enable acpi based hotplug. */ 111 pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc); 112 } 113 } 114 115 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque) 116 { 117 AcpiPciHpFind *find = opaque; 118 if (find->bsel == acpi_pcihp_get_bsel(bus)) { 119 find->bus = bus; 120 } 121 } 122 123 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel) 124 { 125 AcpiPciHpFind find = { .bsel = bsel, .bus = NULL }; 126 127 if (bsel < 0) { 128 return NULL; 129 } 130 131 pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find); 132 133 /* Make bsel 0 eject root bus if bsel property is not set, 134 * for compatibility with non acpi setups. 135 * TODO: really needed? 136 */ 137 if (!bsel && !find.bus) { 138 find.bus = s->root; 139 } 140 return find.bus; 141 } 142 143 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev) 144 { 145 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); 146 DeviceClass *dc = DEVICE_GET_CLASS(dev); 147 /* 148 * ACPI doesn't allow hotplug of bridge devices. Don't allow 149 * hot-unplug of bridge devices unless they were added by hotplug 150 * (and so, not described by acpi). 151 */ 152 return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable; 153 } 154 155 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots) 156 { 157 HotplugHandler *hotplug_ctrl; 158 BusChild *kid, *next; 159 int slot = ctz32(slots); 160 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel); 161 162 if (!bus) { 163 return; 164 } 165 166 /* Mark request as complete */ 167 s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot); 168 s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot); 169 170 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) { 171 DeviceState *qdev = kid->child; 172 PCIDevice *dev = PCI_DEVICE(qdev); 173 if (PCI_SLOT(dev->devfn) == slot) { 174 if (!acpi_pcihp_pc_no_hotplug(s, dev)) { 175 hotplug_ctrl = qdev_get_hotplug_handler(qdev); 176 hotplug_handler_unplug(hotplug_ctrl, qdev, &error_abort); 177 object_unparent(OBJECT(qdev)); 178 } 179 } 180 } 181 } 182 183 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel) 184 { 185 BusChild *kid, *next; 186 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel); 187 188 /* Execute any pending removes during reset */ 189 while (s->acpi_pcihp_pci_status[bsel].down) { 190 acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down); 191 } 192 193 s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0; 194 195 if (!bus) { 196 return; 197 } 198 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) { 199 DeviceState *qdev = kid->child; 200 PCIDevice *pdev = PCI_DEVICE(qdev); 201 int slot = PCI_SLOT(pdev->devfn); 202 203 if (acpi_pcihp_pc_no_hotplug(s, pdev)) { 204 s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot); 205 } 206 } 207 } 208 209 static void acpi_pcihp_update(AcpiPciHpState *s) 210 { 211 int i; 212 213 for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) { 214 acpi_pcihp_update_hotplug_bus(s, i); 215 } 216 } 217 218 void acpi_pcihp_reset(AcpiPciHpState *s) 219 { 220 acpi_set_pci_info(); 221 acpi_pcihp_update(s); 222 } 223 224 void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev, 225 DeviceState *dev, Error **errp) 226 { 227 /* Only hotplugged devices need the hotplug capability. */ 228 if (dev->hotplugged && 229 acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))) < 0) { 230 error_setg(errp, "Unsupported bus. Bus doesn't have property '" 231 ACPI_PCIHP_PROP_BSEL "' set"); 232 return; 233 } 234 } 235 236 void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, 237 DeviceState *dev, Error **errp) 238 { 239 PCIDevice *pdev = PCI_DEVICE(dev); 240 int slot = PCI_SLOT(pdev->devfn); 241 int bsel; 242 243 /* Don't send event when device is enabled during qemu machine creation: 244 * it is present on boot, no hotplug event is necessary. We do send an 245 * event when the device is disabled later. */ 246 if (!dev->hotplugged) { 247 /* 248 * Overwrite the default hotplug handler with the ACPI PCI one 249 * for cold plugged bridges only. 250 */ 251 if (!s->legacy_piix && 252 object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { 253 PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); 254 255 qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev), 256 &error_abort); 257 /* We don't have to overwrite any other hotplug handler yet */ 258 assert(QLIST_EMPTY(&sec->child)); 259 } 260 261 return; 262 } 263 264 bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev)); 265 g_assert(bsel >= 0); 266 s->acpi_pcihp_pci_status[bsel].up |= (1U << slot); 267 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS); 268 } 269 270 void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, 271 DeviceState *dev, Error **errp) 272 { 273 object_property_set_bool(OBJECT(dev), false, "realized", NULL); 274 } 275 276 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev, 277 AcpiPciHpState *s, DeviceState *dev, 278 Error **errp) 279 { 280 PCIDevice *pdev = PCI_DEVICE(dev); 281 int slot = PCI_SLOT(pdev->devfn); 282 int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev)); 283 if (bsel < 0) { 284 error_setg(errp, "Unsupported bus. Bus doesn't have property '" 285 ACPI_PCIHP_PROP_BSEL "' set"); 286 return; 287 } 288 289 s->acpi_pcihp_pci_status[bsel].down |= (1U << slot); 290 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS); 291 } 292 293 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size) 294 { 295 AcpiPciHpState *s = opaque; 296 uint32_t val = 0; 297 int bsel = s->hotplug_select; 298 299 if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { 300 return 0; 301 } 302 303 switch (addr) { 304 case PCI_UP_BASE: 305 val = s->acpi_pcihp_pci_status[bsel].up; 306 if (!s->legacy_piix) { 307 s->acpi_pcihp_pci_status[bsel].up = 0; 308 } 309 ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val); 310 break; 311 case PCI_DOWN_BASE: 312 val = s->acpi_pcihp_pci_status[bsel].down; 313 ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val); 314 break; 315 case PCI_EJ_BASE: 316 /* No feature defined yet */ 317 ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val); 318 break; 319 case PCI_RMV_BASE: 320 val = s->acpi_pcihp_pci_status[bsel].hotplug_enable; 321 ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val); 322 break; 323 case PCI_SEL_BASE: 324 val = s->hotplug_select; 325 ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val); 326 default: 327 break; 328 } 329 330 return val; 331 } 332 333 static void pci_write(void *opaque, hwaddr addr, uint64_t data, 334 unsigned int size) 335 { 336 AcpiPciHpState *s = opaque; 337 switch (addr) { 338 case PCI_EJ_BASE: 339 if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { 340 break; 341 } 342 acpi_pcihp_eject_slot(s, s->hotplug_select, data); 343 ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n", 344 addr, data); 345 break; 346 case PCI_SEL_BASE: 347 s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data; 348 ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n", 349 addr, data); 350 default: 351 break; 352 } 353 } 354 355 static const MemoryRegionOps acpi_pcihp_io_ops = { 356 .read = pci_read, 357 .write = pci_write, 358 .endianness = DEVICE_LITTLE_ENDIAN, 359 .valid = { 360 .min_access_size = 4, 361 .max_access_size = 4, 362 }, 363 }; 364 365 void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus, 366 MemoryRegion *address_space_io, bool bridges_enabled) 367 { 368 s->io_len = ACPI_PCIHP_SIZE; 369 s->io_base = ACPI_PCIHP_ADDR; 370 371 s->root= root_bus; 372 s->legacy_piix = !bridges_enabled; 373 374 memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s, 375 "acpi-pci-hotplug", s->io_len); 376 memory_region_add_subregion(address_space_io, s->io_base, &s->io); 377 378 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base, 379 &error_abort); 380 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len, 381 &error_abort); 382 } 383 384 const VMStateDescription vmstate_acpi_pcihp_pci_status = { 385 .name = "acpi_pcihp_pci_status", 386 .version_id = 1, 387 .minimum_version_id = 1, 388 .fields = (VMStateField[]) { 389 VMSTATE_UINT32(up, AcpiPciHpPciStatus), 390 VMSTATE_UINT32(down, AcpiPciHpPciStatus), 391 VMSTATE_END_OF_LIST() 392 } 393 }; 394