1 /*
2 * QEMU<->ACPI BIOS PCI hotplug interface
3 *
4 * QEMU supports PCI hotplug via ACPI. This module
5 * implements the interface between QEMU and the ACPI BIOS.
6 * Interface specification - see docs/specs/acpi_pci_hotplug.rst
7 *
8 * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
9 * Copyright (c) 2006 Fabrice Bellard
10 *
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2.1 as published by the Free Software Foundation.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
19 *
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
22 *
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
25 */
26
27 #include "qemu/osdep.h"
28 #include "hw/acpi/pcihp.h"
29 #include "hw/acpi/aml-build.h"
30 #include "hw/acpi/acpi_aml_interface.h"
31 #include "hw/pci-host/i440fx.h"
32 #include "hw/pci/pci.h"
33 #include "hw/pci/pci_bridge.h"
34 #include "hw/pci/pci_host.h"
35 #include "hw/pci/pcie_port.h"
36 #include "hw/pci-bridge/xio3130_downstream.h"
37 #include "hw/i386/acpi-build.h"
38 #include "hw/acpi/acpi.h"
39 #include "hw/pci/pci_bus.h"
40 #include "migration/vmstate.h"
41 #include "qapi/error.h"
42 #include "qom/qom-qobject.h"
43 #include "qobject/qnum.h"
44 #include "trace.h"
45
46 #define PCI_UP_BASE 0x0000
47 #define PCI_DOWN_BASE 0x0004
48 #define PCI_EJ_BASE 0x0008
49 #define PCI_RMV_BASE 0x000c
50 #define PCI_SEL_BASE 0x0010
51 #define PCI_AIDX_BASE 0x0014
52
53 typedef struct AcpiPciHpFind {
54 int bsel;
55 PCIBus *bus;
56 } AcpiPciHpFind;
57
acpi_pcihp_get_bsel(PCIBus * bus)58 static int acpi_pcihp_get_bsel(PCIBus *bus)
59 {
60 Error *local_err = NULL;
61 uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
62 &local_err);
63
64 if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
65 if (local_err) {
66 error_free(local_err);
67 }
68 return -1;
69 } else {
70 return bsel;
71 }
72 }
73
74 typedef struct {
75 unsigned bsel_alloc;
76 bool has_bridge_hotplug;
77 } BSELInfo;
78
79 /* Assign BSEL property only to buses that support hotplug. */
acpi_set_bsel(PCIBus * bus,void * opaque)80 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
81 {
82 BSELInfo *info = opaque;
83 unsigned *bus_bsel;
84 DeviceState *br = bus->qbus.parent;
85 bool is_bridge = IS_PCI_BRIDGE(br);
86
87 /* hotplugged bridges can't be described in ACPI ignore them */
88 if (qbus_is_hotpluggable(BUS(bus))) {
89 if (!is_bridge || (!br->hotplugged && info->has_bridge_hotplug)) {
90 bus_bsel = g_malloc(sizeof *bus_bsel);
91
92 *bus_bsel = info->bsel_alloc++;
93 object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
94 bus_bsel, OBJ_PROP_FLAG_READ);
95 }
96 }
97
98 return info;
99 }
100
acpi_set_pci_info(AcpiPciHpState * s)101 static void acpi_set_pci_info(AcpiPciHpState *s)
102 {
103 static bool bsel_is_set;
104 bool has_bridge_hotplug = s->use_acpi_hotplug_bridge;
105 PCIBus *bus;
106 BSELInfo info = { .bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT,
107 .has_bridge_hotplug = has_bridge_hotplug };
108
109 if (bsel_is_set) {
110 return;
111 }
112 bsel_is_set = true;
113
114
115 bus = s->root;
116 if (bus) {
117 /* Scan all PCI buses. Set property to enable acpi based hotplug. */
118 pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &info);
119 }
120 }
121
acpi_pcihp_test_hotplug_bus(PCIBus * bus,void * opaque)122 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
123 {
124 AcpiPciHpFind *find = opaque;
125 if (find->bsel == acpi_pcihp_get_bsel(bus)) {
126 find->bus = bus;
127 }
128 }
129
acpi_pcihp_find_hotplug_bus(AcpiPciHpState * s,int bsel)130 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
131 {
132 AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
133
134 if (bsel < 0) {
135 return NULL;
136 }
137
138 pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
139
140 /* Make bsel 0 eject root bus if bsel property is not set,
141 * for compatibility with non acpi setups.
142 * TODO: really needed?
143 */
144 if (!bsel && !find.bus) {
145 find.bus = s->root;
146 }
147
148 /*
149 * Check if find.bus is actually hotpluggable. If bsel is set to
150 * NULL for example on the root bus in order to make it
151 * non-hotpluggable, find.bus will match the root bus when bsel
152 * is 0. See acpi_pcihp_test_hotplug_bus() above. Since the
153 * bus is not hotpluggable however, we should not select the bus.
154 * Instead, we should set find.bus to NULL in that case. In the check
155 * below, we generalize this case for all buses, not just the root bus.
156 * The callers of this function check for a null return value and
157 * handle them appropriately.
158 */
159 if (find.bus && !qbus_is_hotpluggable(BUS(find.bus))) {
160 find.bus = NULL;
161 }
162 return find.bus;
163 }
164
acpi_pcihp_pc_no_hotplug(AcpiPciHpState * s,PCIDevice * dev)165 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
166 {
167 DeviceClass *dc = DEVICE_GET_CLASS(dev);
168 /*
169 * ACPI doesn't allow hotplug of bridge devices. Don't allow
170 * hot-unplug of bridge devices unless they were added by hotplug
171 * (and so, not described by acpi).
172 *
173 * Don't allow hot-unplug of SR-IOV Virtual Functions, as they
174 * will be removed implicitly, when Physical Function is unplugged.
175 */
176 return (IS_PCI_BRIDGE(dev) && !dev->qdev.hotplugged) || !dc->hotpluggable ||
177 pci_is_vf(dev);
178 }
179
acpi_pcihp_eject_slot(AcpiPciHpState * s,unsigned bsel,unsigned slots)180 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
181 {
182 HotplugHandler *hotplug_ctrl;
183 BusChild *kid, *next;
184 int slot = ctz32(slots);
185 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
186
187 trace_acpi_pci_eject_slot(bsel, slot);
188
189 if (!bus || slot > 31) {
190 return;
191 }
192
193 /* Mark request as complete */
194 s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
195 s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
196
197 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
198 DeviceState *qdev = kid->child;
199 PCIDevice *dev = PCI_DEVICE(qdev);
200 if (PCI_SLOT(dev->devfn) == slot) {
201 if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
202 /*
203 * partially_hotplugged is used by virtio-net failover:
204 * failover has asked the guest OS to unplug the device
205 * but we need to keep some references to the device
206 * to be able to plug it back in case of failure so
207 * we don't execute hotplug_handler_unplug().
208 */
209 if (dev->partially_hotplugged) {
210 /*
211 * pending_deleted_event is set to true when
212 * virtio-net failover asks to unplug the device,
213 * and set to false here when the operation is done
214 * This is used by the migration loop to detect the
215 * end of the operation and really start the migration.
216 */
217 qdev->pending_deleted_event = false;
218 } else {
219 hotplug_ctrl = qdev_get_hotplug_handler(qdev);
220 hotplug_handler_unplug(hotplug_ctrl, qdev, &error_abort);
221 object_unparent(OBJECT(qdev));
222 }
223 }
224 }
225 }
226 }
227
acpi_pcihp_update_hotplug_bus(AcpiPciHpState * s,int bsel)228 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
229 {
230 BusChild *kid, *next;
231 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
232
233 /* Execute any pending removes during reset */
234 while (s->acpi_pcihp_pci_status[bsel].down) {
235 acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
236 }
237
238 s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
239
240 if (!bus) {
241 return;
242 }
243 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
244 DeviceState *qdev = kid->child;
245 PCIDevice *pdev = PCI_DEVICE(qdev);
246 int slot = PCI_SLOT(pdev->devfn);
247
248 if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
249 s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
250 }
251 }
252 }
253
acpi_pcihp_update(AcpiPciHpState * s)254 static void acpi_pcihp_update(AcpiPciHpState *s)
255 {
256 int i;
257
258 for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
259 acpi_pcihp_update_hotplug_bus(s, i);
260 }
261 }
262
acpi_pcihp_reset(AcpiPciHpState * s)263 void acpi_pcihp_reset(AcpiPciHpState *s)
264 {
265 acpi_set_pci_info(s);
266 acpi_pcihp_update(s);
267 }
268
acpi_pcihp_device_pre_plug_cb(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)269 void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
270 DeviceState *dev, Error **errp)
271 {
272 PCIDevice *pdev = PCI_DEVICE(dev);
273
274 /* Only hotplugged devices need the hotplug capability. */
275 if (dev->hotplugged &&
276 acpi_pcihp_get_bsel(pci_get_bus(pdev)) < 0) {
277 error_setg(errp, "Unsupported bus. Bus doesn't have property '"
278 ACPI_PCIHP_PROP_BSEL "' set");
279 return;
280 }
281 }
282
acpi_pcihp_device_plug_cb(HotplugHandler * hotplug_dev,AcpiPciHpState * s,DeviceState * dev,Error ** errp)283 void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
284 DeviceState *dev, Error **errp)
285 {
286 PCIDevice *pdev = PCI_DEVICE(dev);
287 int slot = PCI_SLOT(pdev->devfn);
288 PCIDevice *bridge;
289 PCIBus *bus;
290 int bsel;
291
292 /* Don't send event when device is enabled during qemu machine creation:
293 * it is present on boot, no hotplug event is necessary. We do send an
294 * event when the device is disabled later. */
295 if (!dev->hotplugged) {
296 /*
297 * Overwrite the default hotplug handler with the ACPI PCI one
298 * for cold plugged bridges only.
299 */
300 if (s->use_acpi_hotplug_bridge &&
301 object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
302 PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
303
304 qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev));
305 /* We don't have to overwrite any other hotplug handler yet */
306 assert(QLIST_EMPTY(&sec->child));
307 }
308
309 return;
310 }
311
312 bus = pci_get_bus(pdev);
313 bridge = pci_bridge_get_device(bus);
314 if (object_dynamic_cast(OBJECT(bridge), TYPE_PCIE_ROOT_PORT) ||
315 object_dynamic_cast(OBJECT(bridge), TYPE_XIO3130_DOWNSTREAM)) {
316 pcie_cap_slot_enable_power(bridge);
317 }
318
319 bsel = acpi_pcihp_get_bsel(bus);
320 g_assert(bsel >= 0);
321 s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
322 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
323 }
324
acpi_pcihp_device_unplug_cb(HotplugHandler * hotplug_dev,AcpiPciHpState * s,DeviceState * dev,Error ** errp)325 void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
326 DeviceState *dev, Error **errp)
327 {
328 PCIDevice *pdev = PCI_DEVICE(dev);
329
330 trace_acpi_pci_unplug(PCI_SLOT(pdev->devfn),
331 acpi_pcihp_get_bsel(pci_get_bus(pdev)));
332
333 qdev_unrealize(dev);
334 }
335
acpi_pcihp_device_unplug_request_cb(HotplugHandler * hotplug_dev,AcpiPciHpState * s,DeviceState * dev,Error ** errp)336 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
337 AcpiPciHpState *s, DeviceState *dev,
338 Error **errp)
339 {
340 PCIDevice *pdev = PCI_DEVICE(dev);
341 int slot = PCI_SLOT(pdev->devfn);
342 int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
343
344 trace_acpi_pci_unplug_request(bsel, slot);
345
346 if (bsel < 0) {
347 error_setg(errp, "Unsupported bus. Bus doesn't have property '"
348 ACPI_PCIHP_PROP_BSEL "' set");
349 return;
350 }
351
352 /*
353 * pending_deleted_event is used by virtio-net failover to detect the
354 * end of the unplug operation, the flag is set to false in
355 * acpi_pcihp_eject_slot() when the operation is completed.
356 */
357 pdev->qdev.pending_deleted_event = true;
358 /* if unplug was requested before OSPM is initialized,
359 * linux kernel will clear GPE0.sts[] bits during boot, which effectively
360 * hides unplug event. And than followup qmp_device_del() calls remain
361 * blocked by above flag permanently.
362 * Unblock qmp_device_del() by setting expire limit, so user can
363 * repeat unplug request later when OSPM has been booted.
364 */
365 pdev->qdev.pending_deleted_expires_ms =
366 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL); /* 1 msec */
367
368 s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
369 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
370 }
371
acpi_pcihp_is_hotpluggable_bus(AcpiPciHpState * s,BusState * bus)372 bool acpi_pcihp_is_hotpluggable_bus(AcpiPciHpState *s, BusState *bus)
373 {
374 Object *o = OBJECT(bus->parent);
375
376 if (s->use_acpi_hotplug_bridge &&
377 object_dynamic_cast(o, TYPE_PCI_BRIDGE)) {
378 if (object_dynamic_cast(o, TYPE_PCIE_SLOT) && !PCIE_SLOT(o)->hotplug) {
379 return false;
380 }
381 return true;
382 }
383
384 if (s->use_acpi_root_pci_hotplug) {
385 return true;
386 }
387 return false;
388 }
389
pci_read(void * opaque,hwaddr addr,unsigned int size)390 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
391 {
392 AcpiPciHpState *s = opaque;
393 uint32_t val = 0;
394 int bsel = s->hotplug_select;
395
396 if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
397 return 0;
398 }
399
400 switch (addr) {
401 case PCI_UP_BASE:
402 val = s->acpi_pcihp_pci_status[bsel].up;
403 if (s->use_acpi_hotplug_bridge) {
404 s->acpi_pcihp_pci_status[bsel].up = 0;
405 }
406 trace_acpi_pci_up_read(val);
407 break;
408 case PCI_DOWN_BASE:
409 val = s->acpi_pcihp_pci_status[bsel].down;
410 trace_acpi_pci_down_read(val);
411 break;
412 case PCI_EJ_BASE:
413 trace_acpi_pci_features_read(val);
414 break;
415 case PCI_RMV_BASE:
416 val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
417 trace_acpi_pci_rmv_read(val);
418 break;
419 case PCI_SEL_BASE:
420 val = s->hotplug_select;
421 trace_acpi_pci_sel_read(val);
422 break;
423 case PCI_AIDX_BASE:
424 val = s->acpi_index;
425 s->acpi_index = 0;
426 trace_acpi_pci_acpi_index_read(val);
427 break;
428 default:
429 break;
430 }
431
432 return val;
433 }
434
pci_write(void * opaque,hwaddr addr,uint64_t data,unsigned int size)435 static void pci_write(void *opaque, hwaddr addr, uint64_t data,
436 unsigned int size)
437 {
438 int slot;
439 PCIBus *bus;
440 BusChild *kid, *next;
441 AcpiPciHpState *s = opaque;
442
443 s->acpi_index = 0;
444 switch (addr) {
445 case PCI_AIDX_BASE:
446 /*
447 * fetch acpi-index for specified slot so that follow up read from
448 * PCI_AIDX_BASE can return it to guest
449 */
450 slot = ctz32(data);
451
452 if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
453 break;
454 }
455
456 bus = acpi_pcihp_find_hotplug_bus(s, s->hotplug_select);
457 if (!bus) {
458 break;
459 }
460 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
461 Object *o = OBJECT(kid->child);
462 PCIDevice *dev = PCI_DEVICE(o);
463 if (PCI_SLOT(dev->devfn) == slot) {
464 s->acpi_index = object_property_get_uint(o, "acpi-index", NULL);
465 break;
466 }
467 }
468 trace_acpi_pci_acpi_index_write(s->hotplug_select, slot, s->acpi_index);
469 break;
470 case PCI_EJ_BASE:
471 if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
472 break;
473 }
474 acpi_pcihp_eject_slot(s, s->hotplug_select, data);
475 trace_acpi_pci_ej_write(addr, data);
476 break;
477 case PCI_SEL_BASE:
478 s->hotplug_select = s->use_acpi_hotplug_bridge ? data :
479 ACPI_PCIHP_BSEL_DEFAULT;
480 trace_acpi_pci_sel_write(addr, data);
481 default:
482 break;
483 }
484 }
485
486 static const MemoryRegionOps acpi_pcihp_io_ops = {
487 .read = pci_read,
488 .write = pci_write,
489 .endianness = DEVICE_LITTLE_ENDIAN,
490 .valid = {
491 .min_access_size = 4,
492 .max_access_size = 4,
493 },
494 };
495
acpi_pcihp_init(Object * owner,AcpiPciHpState * s,MemoryRegion * io,uint16_t io_base)496 void acpi_pcihp_init(Object *owner, AcpiPciHpState *s,
497 MemoryRegion *io, uint16_t io_base)
498 {
499 s->io_len = ACPI_PCIHP_SIZE;
500 s->io_base = io_base;
501
502 assert(s->root);
503
504 memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
505 "acpi-pci-hotplug", s->io_len);
506 memory_region_add_subregion(io, s->io_base, &s->io);
507
508 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
509 OBJ_PROP_FLAG_READ);
510 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
511 OBJ_PROP_FLAG_READ);
512 }
513
build_append_pci_dsm_func0_common(Aml * ctx,Aml * retvar)514 void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar)
515 {
516 Aml *UUID, *ifctx1;
517 uint8_t byte_list[1] = { 0 }; /* nothing supported yet */
518
519 aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar));
520 /*
521 * PCI Firmware Specification 3.1
522 * 4.6. _DSM Definitions for PCI
523 */
524 UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
525 ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID)));
526 {
527 /* call is for unsupported UUID, bail out */
528 aml_append(ifctx1, aml_return(retvar));
529 }
530 aml_append(ctx, ifctx1);
531
532 ifctx1 = aml_if(aml_lless(aml_arg(1), aml_int(2)));
533 {
534 /* call is for unsupported REV, bail out */
535 aml_append(ifctx1, aml_return(retvar));
536 }
537 aml_append(ctx, ifctx1);
538 }
539
aml_pci_pdsm(void)540 static Aml *aml_pci_pdsm(void)
541 {
542 Aml *method, *ifctx, *ifctx1;
543 Aml *ret = aml_local(0);
544 Aml *caps = aml_local(1);
545 Aml *acpi_index = aml_local(2);
546 Aml *zero = aml_int(0);
547 Aml *one = aml_int(1);
548 Aml *not_supp = aml_int(0xFFFFFFFF);
549 Aml *func = aml_arg(2);
550 Aml *params = aml_arg(4);
551 Aml *bnum = aml_derefof(aml_index(params, aml_int(0)));
552 Aml *sunum = aml_derefof(aml_index(params, aml_int(1)));
553
554 method = aml_method("PDSM", 5, AML_SERIALIZED);
555
556 /* get supported functions */
557 ifctx = aml_if(aml_equal(func, zero));
558 {
559 build_append_pci_dsm_func0_common(ifctx, ret);
560
561 aml_append(ifctx, aml_store(zero, caps));
562 aml_append(ifctx,
563 aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
564 /*
565 * advertise function 7 if device has acpi-index
566 * acpi_index values:
567 * 0: not present (default value)
568 * FFFFFFFF: not supported (old QEMU without PIDX reg)
569 * other: device's acpi-index
570 */
571 ifctx1 = aml_if(aml_lnot(
572 aml_or(aml_equal(acpi_index, zero),
573 aml_equal(acpi_index, not_supp), NULL)
574 ));
575 {
576 /* have supported functions */
577 aml_append(ifctx1, aml_or(caps, one, caps));
578 /* support for function 7 */
579 aml_append(ifctx1,
580 aml_or(caps, aml_shiftleft(one, aml_int(7)), caps));
581 }
582 aml_append(ifctx, ifctx1);
583
584 aml_append(ifctx, aml_store(caps, aml_index(ret, zero)));
585 aml_append(ifctx, aml_return(ret));
586 }
587 aml_append(method, ifctx);
588
589 /* handle specific functions requests */
590 /*
591 * PCI Firmware Specification 3.1
592 * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
593 * Operating Systems
594 */
595 ifctx = aml_if(aml_equal(func, aml_int(7)));
596 {
597 Aml *pkg = aml_package(2);
598
599 aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
600 aml_append(ifctx, aml_store(pkg, ret));
601 /*
602 * Windows calls func=7 without checking if it's available,
603 * as workaround Microsoft has suggested to return invalid for func7
604 * Package, so return 2 elements package but only initialize elements
605 * when acpi_index is supported and leave them uninitialized, which
606 * leads elements to being Uninitialized ObjectType and should trip
607 * Windows into discarding result as an unexpected and prevent setting
608 * bogus 'PCI Label' on the device.
609 */
610 ifctx1 = aml_if(aml_lnot(aml_lor(
611 aml_equal(acpi_index, zero), aml_equal(acpi_index, not_supp)
612 )));
613 {
614 aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero)));
615 /*
616 * optional, if not impl. should return null string
617 */
618 aml_append(ifctx1, aml_store(aml_string("%s", ""),
619 aml_index(ret, one)));
620 }
621 aml_append(ifctx, ifctx1);
622
623 aml_append(ifctx, aml_return(ret));
624 }
625
626 aml_append(method, ifctx);
627 return method;
628 }
629
build_acpi_pci_hotplug(Aml * table,AmlRegionSpace rs,uint64_t pcihp_addr)630 void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr)
631 {
632 Aml *scope;
633 Aml *field;
634 Aml *method;
635
636 scope = aml_scope("_SB.PCI0");
637
638 aml_append(scope,
639 aml_operation_region("PCST", rs, aml_int(pcihp_addr), 0x08));
640 field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
641 aml_append(field, aml_named_field("PCIU", 32));
642 aml_append(field, aml_named_field("PCID", 32));
643 aml_append(scope, field);
644
645 aml_append(scope,
646 aml_operation_region("SEJ", rs,
647 aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
648 field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
649 aml_append(field, aml_named_field("B0EJ", 32));
650 aml_append(scope, field);
651
652 aml_append(scope,
653 aml_operation_region("BNMR", rs,
654 aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
655 field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
656 aml_append(field, aml_named_field("BNUM", 32));
657 aml_append(field, aml_named_field("PIDX", 32));
658 aml_append(scope, field);
659
660 aml_append(scope, aml_mutex("BLCK", 0));
661
662 method = aml_method("PCEJ", 2, AML_NOTSERIALIZED);
663 aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
664 aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
665 aml_append(method,
666 aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ")));
667 aml_append(method, aml_release(aml_name("BLCK")));
668 aml_append(method, aml_return(aml_int(0)));
669 aml_append(scope, method);
670
671 method = aml_method("AIDX", 2, AML_NOTSERIALIZED);
672 aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
673 aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
674 aml_append(method,
675 aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX")));
676 aml_append(method, aml_store(aml_name("PIDX"), aml_local(0)));
677 aml_append(method, aml_release(aml_name("BLCK")));
678 aml_append(method, aml_return(aml_local(0)));
679 aml_append(scope, method);
680
681 aml_append(scope, aml_pci_pdsm());
682
683 aml_append(table, scope);
684 }
685
686 /* Reserve PCIHP resources */
build_append_pcihp_resources(Aml * scope,uint64_t io_addr,uint64_t io_len)687 void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
688 uint64_t io_addr, uint64_t io_len)
689 {
690 Aml *dev, *crs;
691
692 dev = aml_device("PHPR");
693 aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
694 aml_append(dev,
695 aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
696 /* device present, functioning, decoding, not shown in UI */
697 aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
698 crs = aml_resource_template();
699 aml_append(crs, aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len));
700 aml_append(dev, aml_name_decl("_CRS", crs));
701 aml_append(scope, dev);
702 }
703
build_append_notification_callback(Aml * parent_scope,const PCIBus * bus)704 bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
705 {
706 Aml *method;
707 PCIBus *sec;
708 QObject *bsel;
709 int nr_notifiers = 0;
710 GQueue *pcnt_bus_list = g_queue_new();
711
712 QLIST_FOREACH(sec, &bus->child, sibling) {
713 Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn);
714 if (pci_bus_is_root(sec)) {
715 continue;
716 }
717 nr_notifiers = nr_notifiers +
718 build_append_notification_callback(br_scope, sec);
719 /*
720 * add new child scope to parent
721 * and keep track of bus that have PCNT,
722 * bus list is used later to call children PCNTs from this level PCNT
723 */
724 if (nr_notifiers) {
725 g_queue_push_tail(pcnt_bus_list, sec);
726 aml_append(parent_scope, br_scope);
727 }
728 }
729
730 /*
731 * Append PCNT method to notify about events on local and child buses.
732 * ps: hostbridge might not have hotplug (bsel) enabled but might have
733 * child bridges that do have bsel.
734 */
735 method = aml_method("PCNT", 0, AML_NOTSERIALIZED);
736
737 /* If bus supports hotplug select it and notify about local events */
738 bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
739 if (bsel) {
740 uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
741
742 aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM")));
743 aml_append(method, aml_call2("DVNT", aml_name("PCIU"),
744 aml_int(1))); /* Device Check */
745 aml_append(method, aml_call2("DVNT", aml_name("PCID"),
746 aml_int(3))); /* Eject Request */
747 nr_notifiers++;
748 }
749
750 /* Notify about child bus events in any case */
751 while ((sec = g_queue_pop_head(pcnt_bus_list))) {
752 aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn));
753 }
754
755 aml_append(parent_scope, method);
756 qobject_unref(bsel);
757 g_queue_free(pcnt_bus_list);
758 return !!nr_notifiers;
759 }
760
aml_pci_device_dsm(void)761 static Aml *aml_pci_device_dsm(void)
762 {
763 Aml *method;
764
765 method = aml_method("_DSM", 4, AML_SERIALIZED);
766 {
767 Aml *params = aml_local(0);
768 Aml *pkg = aml_package(2);
769 aml_append(pkg, aml_int(0));
770 aml_append(pkg, aml_int(0));
771 aml_append(method, aml_store(pkg, params));
772 aml_append(method,
773 aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
774 aml_append(method,
775 aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
776 aml_append(method,
777 aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
778 aml_arg(2), aml_arg(3), params))
779 );
780 }
781 return method;
782 }
783
aml_pci_static_endpoint_dsm(PCIDevice * pdev)784 static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
785 {
786 Aml *method;
787
788 g_assert(pdev->acpi_index != 0);
789 method = aml_method("_DSM", 4, AML_SERIALIZED);
790 {
791 Aml *params = aml_local(0);
792 Aml *pkg = aml_package(1);
793 aml_append(pkg, aml_int(pdev->acpi_index));
794 aml_append(method, aml_store(pkg, params));
795 aml_append(method,
796 aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
797 aml_arg(2), aml_arg(3), params))
798 );
799 }
800 return method;
801 }
802
build_append_pcihp_notify_entry(Aml * method,int slot)803 static void build_append_pcihp_notify_entry(Aml *method, int slot)
804 {
805 Aml *if_ctx;
806 int32_t devfn = PCI_DEVFN(slot, 0);
807
808 if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
809 aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
810 aml_append(method, if_ctx);
811 }
812
is_devfn_ignored_generic(const int devfn,const PCIBus * bus)813 static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
814 {
815 const PCIDevice *pdev = bus->devices[devfn];
816
817 if (PCI_FUNC(devfn)) {
818 if (IS_PCI_BRIDGE(pdev)) {
819 /*
820 * Ignore only hotplugged PCI bridges on !0 functions, but
821 * allow describing cold plugged bridges on all functions
822 */
823 if (DEVICE(pdev)->hotplugged) {
824 return true;
825 }
826 }
827 }
828 return false;
829 }
830
is_devfn_ignored_hotplug(const int devfn,const PCIBus * bus)831 static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
832 {
833 PCIDevice *pdev = bus->devices[devfn];
834 if (pdev) {
835 return is_devfn_ignored_generic(devfn, bus) ||
836 !DEVICE_GET_CLASS(pdev)->hotpluggable ||
837 /* Cold plugged bridges aren't themselves hot-pluggable */
838 (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
839 } else { /* non populated slots */
840 /*
841 * hotplug is supported only for non-multifunction device
842 * so generate device description only for function 0
843 */
844 if (PCI_FUNC(devfn) ||
845 (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
846 return true;
847 }
848 }
849 return false;
850 }
851
build_append_pcihp_slots(Aml * parent_scope,PCIBus * bus)852 void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
853 {
854 int devfn;
855 Aml *dev, *notify_method = NULL, *method;
856 QObject *bsel = object_property_get_qobject(OBJECT(bus),
857 ACPI_PCIHP_PROP_BSEL, NULL);
858 uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
859 qobject_unref(bsel);
860
861 aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
862 notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
863
864 for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
865 int slot = PCI_SLOT(devfn);
866 int adr = slot << 16 | PCI_FUNC(devfn);
867
868 if (is_devfn_ignored_hotplug(devfn, bus)) {
869 continue;
870 }
871
872 if (bus->devices[devfn]) {
873 dev = aml_scope("S%.02X", devfn);
874 } else {
875 dev = aml_device("S%.02X", devfn);
876 aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
877 }
878
879 /*
880 * Can't declare _SUN here for every device as it changes 'slot'
881 * enumeration order in linux kernel, so use another variable for it
882 */
883 aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
884 aml_append(dev, aml_pci_device_dsm());
885
886 aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
887 /* add _EJ0 to make slot hotpluggable */
888 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
889 aml_append(method,
890 aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
891 );
892 aml_append(dev, method);
893
894 build_append_pcihp_notify_entry(notify_method, slot);
895
896 /* device descriptor has been composed, add it into parent context */
897 aml_append(parent_scope, dev);
898 }
899 aml_append(parent_scope, notify_method);
900 }
901
build_append_pci_bus_devices(Aml * parent_scope,PCIBus * bus)902 void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
903 {
904 int devfn;
905 Aml *dev;
906
907 for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
908 /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
909 int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
910 PCIDevice *pdev = bus->devices[devfn];
911
912 if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
913 continue;
914 }
915
916 /* start to compose PCI device descriptor */
917 dev = aml_device("S%.02X", devfn);
918 aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
919
920 call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
921 /* add _DSM if device has acpi-index set */
922 if (pdev->acpi_index &&
923 !object_property_get_bool(OBJECT(pdev), "hotpluggable",
924 &error_abort)) {
925 aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
926 }
927
928 /* device descriptor has been composed, add it into parent context */
929 aml_append(parent_scope, dev);
930 }
931 }
932
933 const VMStateDescription vmstate_acpi_pcihp_pci_status = {
934 .name = "acpi_pcihp_pci_status",
935 .version_id = 1,
936 .minimum_version_id = 1,
937 .fields = (const VMStateField[]) {
938 VMSTATE_UINT32(up, AcpiPciHpPciStatus),
939 VMSTATE_UINT32(down, AcpiPciHpPciStatus),
940 VMSTATE_END_OF_LIST()
941 }
942 };
943