1 /* 2 * ACPI implementation 3 * 4 * Copyright (c) 2006 Fabrice Bellard 5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp> 6 * VA Linux Systems Japan K.K. 7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com> 8 * 9 * This is based on acpi.c. 10 * 11 * This library is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU Lesser General Public 13 * License version 2 as published by the Free Software Foundation. 14 * 15 * This library is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * Lesser General Public License for more details. 19 * 20 * You should have received a copy of the GNU Lesser General Public 21 * License along with this library; if not, see <http://www.gnu.org/licenses/> 22 * 23 * Contributions after 2012-01-13 are licensed under the terms of the 24 * GNU GPL, version 2 or (at your option) any later version. 25 */ 26 #include "qemu/osdep.h" 27 #include "hw/hw.h" 28 #include "qapi/visitor.h" 29 #include "hw/i386/pc.h" 30 #include "hw/pci/pci.h" 31 #include "qemu/timer.h" 32 #include "sysemu/sysemu.h" 33 #include "hw/acpi/acpi.h" 34 #include "hw/acpi/tco.h" 35 #include "sysemu/kvm.h" 36 #include "exec/address-spaces.h" 37 38 #include "hw/i386/ich9.h" 39 #include "hw/mem/pc-dimm.h" 40 41 //#define DEBUG 42 43 #ifdef DEBUG 44 #define ICH9_DEBUG(fmt, ...) \ 45 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0) 46 #else 47 #define ICH9_DEBUG(fmt, ...) do { } while (0) 48 #endif 49 50 static void ich9_pm_update_sci_fn(ACPIREGS *regs) 51 { 52 ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs); 53 acpi_update_sci(&pm->acpi_regs, pm->irq); 54 } 55 56 static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width) 57 { 58 ICH9LPCPMRegs *pm = opaque; 59 return acpi_gpe_ioport_readb(&pm->acpi_regs, addr); 60 } 61 62 static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val, 63 unsigned width) 64 { 65 ICH9LPCPMRegs *pm = opaque; 66 acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val); 67 acpi_update_sci(&pm->acpi_regs, pm->irq); 68 } 69 70 static const MemoryRegionOps ich9_gpe_ops = { 71 .read = ich9_gpe_readb, 72 .write = ich9_gpe_writeb, 73 .valid.min_access_size = 1, 74 .valid.max_access_size = 4, 75 .impl.min_access_size = 1, 76 .impl.max_access_size = 1, 77 .endianness = DEVICE_LITTLE_ENDIAN, 78 }; 79 80 static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width) 81 { 82 ICH9LPCPMRegs *pm = opaque; 83 switch (addr) { 84 case 0: 85 return pm->smi_en; 86 case 4: 87 return pm->smi_sts; 88 default: 89 return 0; 90 } 91 } 92 93 static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val, 94 unsigned width) 95 { 96 ICH9LPCPMRegs *pm = opaque; 97 TCOIORegs *tr = &pm->tco_regs; 98 uint64_t tco_en; 99 100 switch (addr) { 101 case 0: 102 tco_en = pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN; 103 /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */ 104 if (tr->tco.cnt1 & TCO_LOCK) { 105 val = (val & ~ICH9_PMIO_SMI_EN_TCO_EN) | tco_en; 106 } 107 pm->smi_en &= ~pm->smi_en_wmask; 108 pm->smi_en |= (val & pm->smi_en_wmask); 109 break; 110 } 111 } 112 113 static const MemoryRegionOps ich9_smi_ops = { 114 .read = ich9_smi_readl, 115 .write = ich9_smi_writel, 116 .valid.min_access_size = 4, 117 .valid.max_access_size = 4, 118 .endianness = DEVICE_LITTLE_ENDIAN, 119 }; 120 121 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base) 122 { 123 ICH9_DEBUG("to 0x%x\n", pm_io_base); 124 125 assert((pm_io_base & ICH9_PMIO_MASK) == 0); 126 127 pm->pm_io_base = pm_io_base; 128 memory_region_transaction_begin(); 129 memory_region_set_enabled(&pm->io, pm->pm_io_base != 0); 130 memory_region_set_address(&pm->io, pm->pm_io_base); 131 memory_region_transaction_commit(); 132 } 133 134 static int ich9_pm_post_load(void *opaque, int version_id) 135 { 136 ICH9LPCPMRegs *pm = opaque; 137 uint32_t pm_io_base = pm->pm_io_base; 138 pm->pm_io_base = 0; 139 ich9_pm_iospace_update(pm, pm_io_base); 140 return 0; 141 } 142 143 #define VMSTATE_GPE_ARRAY(_field, _state) \ 144 { \ 145 .name = (stringify(_field)), \ 146 .version_id = 0, \ 147 .num = ICH9_PMIO_GPE0_LEN, \ 148 .info = &vmstate_info_uint8, \ 149 .size = sizeof(uint8_t), \ 150 .flags = VMS_ARRAY | VMS_POINTER, \ 151 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \ 152 } 153 154 static bool vmstate_test_use_memhp(void *opaque) 155 { 156 ICH9LPCPMRegs *s = opaque; 157 return s->acpi_memory_hotplug.is_enabled; 158 } 159 160 static const VMStateDescription vmstate_memhp_state = { 161 .name = "ich9_pm/memhp", 162 .version_id = 1, 163 .minimum_version_id = 1, 164 .minimum_version_id_old = 1, 165 .needed = vmstate_test_use_memhp, 166 .fields = (VMStateField[]) { 167 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs), 168 VMSTATE_END_OF_LIST() 169 } 170 }; 171 172 static bool vmstate_test_use_tco(void *opaque) 173 { 174 ICH9LPCPMRegs *s = opaque; 175 return s->enable_tco; 176 } 177 178 static const VMStateDescription vmstate_tco_io_state = { 179 .name = "ich9_pm/tco", 180 .version_id = 1, 181 .minimum_version_id = 1, 182 .minimum_version_id_old = 1, 183 .needed = vmstate_test_use_tco, 184 .fields = (VMStateField[]) { 185 VMSTATE_STRUCT(tco_regs, ICH9LPCPMRegs, 1, vmstate_tco_io_sts, 186 TCOIORegs), 187 VMSTATE_END_OF_LIST() 188 } 189 }; 190 191 const VMStateDescription vmstate_ich9_pm = { 192 .name = "ich9_pm", 193 .version_id = 1, 194 .minimum_version_id = 1, 195 .post_load = ich9_pm_post_load, 196 .fields = (VMStateField[]) { 197 VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs), 198 VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs), 199 VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs), 200 VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs), 201 VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs), 202 VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs), 203 VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs), 204 VMSTATE_UINT32(smi_en, ICH9LPCPMRegs), 205 VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs), 206 VMSTATE_END_OF_LIST() 207 }, 208 .subsections = (const VMStateDescription*[]) { 209 &vmstate_memhp_state, 210 &vmstate_tco_io_state, 211 NULL 212 } 213 }; 214 215 static void pm_reset(void *opaque) 216 { 217 ICH9LPCPMRegs *pm = opaque; 218 ich9_pm_iospace_update(pm, 0); 219 220 acpi_pm1_evt_reset(&pm->acpi_regs); 221 acpi_pm1_cnt_reset(&pm->acpi_regs); 222 acpi_pm_tmr_reset(&pm->acpi_regs); 223 acpi_gpe_reset(&pm->acpi_regs); 224 225 pm->smi_en = 0; 226 if (!pm->smm_enabled) { 227 /* Mark SMM as already inited to prevent SMM from running. */ 228 pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN; 229 } 230 pm->smi_en_wmask = ~0; 231 232 acpi_update_sci(&pm->acpi_regs, pm->irq); 233 } 234 235 static void pm_powerdown_req(Notifier *n, void *opaque) 236 { 237 ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier); 238 239 acpi_pm1_evt_power_down(&pm->acpi_regs); 240 } 241 242 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, 243 bool smm_enabled, bool enable_tco, 244 qemu_irq sci_irq) 245 { 246 memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE); 247 memory_region_set_enabled(&pm->io, false); 248 memory_region_add_subregion(pci_address_space_io(lpc_pci), 249 0, &pm->io); 250 251 acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); 252 acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); 253 acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4, 254 pm->s4_val); 255 256 acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN); 257 memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm, 258 "acpi-gpe0", ICH9_PMIO_GPE0_LEN); 259 memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe); 260 261 memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm, 262 "acpi-smi", 8); 263 memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi); 264 265 pm->smm_enabled = smm_enabled; 266 267 pm->enable_tco = enable_tco; 268 if (pm->enable_tco) { 269 acpi_pm_tco_init(&pm->tco_regs, &pm->io); 270 } 271 272 pm->irq = sci_irq; 273 qemu_register_reset(pm_reset, pm); 274 pm->powerdown_notifier.notify = pm_powerdown_req; 275 qemu_register_powerdown_notifier(&pm->powerdown_notifier); 276 277 acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), 278 &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE); 279 280 if (pm->acpi_memory_hotplug.is_enabled) { 281 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), 282 &pm->acpi_memory_hotplug); 283 } 284 } 285 286 static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name, 287 void *opaque, Error **errp) 288 { 289 ICH9LPCPMRegs *pm = opaque; 290 uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS; 291 292 visit_type_uint32(v, name, &value, errp); 293 } 294 295 static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp) 296 { 297 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 298 299 return s->pm.acpi_memory_hotplug.is_enabled; 300 } 301 302 static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value, 303 Error **errp) 304 { 305 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 306 307 s->pm.acpi_memory_hotplug.is_enabled = value; 308 } 309 310 static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, const char *name, 311 void *opaque, Error **errp) 312 { 313 ICH9LPCPMRegs *pm = opaque; 314 uint8_t value = pm->disable_s3; 315 316 visit_type_uint8(v, name, &value, errp); 317 } 318 319 static void ich9_pm_set_disable_s3(Object *obj, Visitor *v, const char *name, 320 void *opaque, Error **errp) 321 { 322 ICH9LPCPMRegs *pm = opaque; 323 Error *local_err = NULL; 324 uint8_t value; 325 326 visit_type_uint8(v, name, &value, &local_err); 327 if (local_err) { 328 goto out; 329 } 330 pm->disable_s3 = value; 331 out: 332 error_propagate(errp, local_err); 333 } 334 335 static void ich9_pm_get_disable_s4(Object *obj, Visitor *v, const char *name, 336 void *opaque, Error **errp) 337 { 338 ICH9LPCPMRegs *pm = opaque; 339 uint8_t value = pm->disable_s4; 340 341 visit_type_uint8(v, name, &value, errp); 342 } 343 344 static void ich9_pm_set_disable_s4(Object *obj, Visitor *v, const char *name, 345 void *opaque, Error **errp) 346 { 347 ICH9LPCPMRegs *pm = opaque; 348 Error *local_err = NULL; 349 uint8_t value; 350 351 visit_type_uint8(v, name, &value, &local_err); 352 if (local_err) { 353 goto out; 354 } 355 pm->disable_s4 = value; 356 out: 357 error_propagate(errp, local_err); 358 } 359 360 static void ich9_pm_get_s4_val(Object *obj, Visitor *v, const char *name, 361 void *opaque, Error **errp) 362 { 363 ICH9LPCPMRegs *pm = opaque; 364 uint8_t value = pm->s4_val; 365 366 visit_type_uint8(v, name, &value, errp); 367 } 368 369 static void ich9_pm_set_s4_val(Object *obj, Visitor *v, const char *name, 370 void *opaque, Error **errp) 371 { 372 ICH9LPCPMRegs *pm = opaque; 373 Error *local_err = NULL; 374 uint8_t value; 375 376 visit_type_uint8(v, name, &value, &local_err); 377 if (local_err) { 378 goto out; 379 } 380 pm->s4_val = value; 381 out: 382 error_propagate(errp, local_err); 383 } 384 385 static bool ich9_pm_get_enable_tco(Object *obj, Error **errp) 386 { 387 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 388 return s->pm.enable_tco; 389 } 390 391 static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp) 392 { 393 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 394 s->pm.enable_tco = value; 395 } 396 397 void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp) 398 { 399 static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN; 400 pm->acpi_memory_hotplug.is_enabled = true; 401 pm->disable_s3 = 0; 402 pm->disable_s4 = 0; 403 pm->s4_val = 2; 404 405 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE, 406 &pm->pm_io_base, errp); 407 object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32", 408 ich9_pm_get_gpe0_blk, 409 NULL, NULL, pm, NULL); 410 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN, 411 &gpe0_len, errp); 412 object_property_add_bool(obj, "memory-hotplug-support", 413 ich9_pm_get_memory_hotplug_support, 414 ich9_pm_set_memory_hotplug_support, 415 NULL); 416 object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8", 417 ich9_pm_get_disable_s3, 418 ich9_pm_set_disable_s3, 419 NULL, pm, NULL); 420 object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8", 421 ich9_pm_get_disable_s4, 422 ich9_pm_set_disable_s4, 423 NULL, pm, NULL); 424 object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8", 425 ich9_pm_get_s4_val, 426 ich9_pm_set_s4_val, 427 NULL, pm, NULL); 428 object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED, 429 ich9_pm_get_enable_tco, 430 ich9_pm_set_enable_tco, 431 NULL); 432 } 433 434 void ich9_pm_device_plug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, Error **errp) 435 { 436 if (pm->acpi_memory_hotplug.is_enabled && 437 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 438 acpi_memory_plug_cb(&pm->acpi_regs, pm->irq, &pm->acpi_memory_hotplug, 439 dev, errp); 440 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 441 acpi_cpu_plug_cb(&pm->acpi_regs, pm->irq, &pm->gpe_cpu, dev, errp); 442 } else { 443 error_setg(errp, "acpi: device plug request for not supported device" 444 " type: %s", object_get_typename(OBJECT(dev))); 445 } 446 } 447 448 void ich9_pm_device_unplug_request_cb(ICH9LPCPMRegs *pm, DeviceState *dev, 449 Error **errp) 450 { 451 if (pm->acpi_memory_hotplug.is_enabled && 452 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 453 acpi_memory_unplug_request_cb(&pm->acpi_regs, pm->irq, 454 &pm->acpi_memory_hotplug, dev, errp); 455 } else { 456 error_setg(errp, "acpi: device unplug request for not supported device" 457 " type: %s", object_get_typename(OBJECT(dev))); 458 } 459 } 460 461 void ich9_pm_device_unplug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, 462 Error **errp) 463 { 464 if (pm->acpi_memory_hotplug.is_enabled && 465 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 466 acpi_memory_unplug_cb(&pm->acpi_memory_hotplug, dev, errp); 467 } else { 468 error_setg(errp, "acpi: device unplug for not supported device" 469 " type: %s", object_get_typename(OBJECT(dev))); 470 } 471 } 472 473 void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list) 474 { 475 ICH9LPCState *s = ICH9_LPC_DEVICE(adev); 476 477 acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list); 478 } 479