1 /* 2 * ACPI implementation 3 * 4 * Copyright (c) 2006 Fabrice Bellard 5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp> 6 * VA Linux Systems Japan K.K. 7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com> 8 * 9 * This is based on acpi.c. 10 * 11 * This library is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU Lesser General Public 13 * License version 2 as published by the Free Software Foundation. 14 * 15 * This library is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * Lesser General Public License for more details. 19 * 20 * You should have received a copy of the GNU Lesser General Public 21 * License along with this library; if not, see <http://www.gnu.org/licenses/> 22 * 23 * Contributions after 2012-01-13 are licensed under the terms of the 24 * GNU GPL, version 2 or (at your option) any later version. 25 */ 26 #include "hw/hw.h" 27 #include "qapi/visitor.h" 28 #include "hw/i386/pc.h" 29 #include "hw/pci/pci.h" 30 #include "qemu/timer.h" 31 #include "sysemu/sysemu.h" 32 #include "hw/acpi/acpi.h" 33 #include "sysemu/kvm.h" 34 #include "exec/address-spaces.h" 35 36 #include "hw/i386/ich9.h" 37 #include "hw/mem/pc-dimm.h" 38 39 //#define DEBUG 40 41 #ifdef DEBUG 42 #define ICH9_DEBUG(fmt, ...) \ 43 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0) 44 #else 45 #define ICH9_DEBUG(fmt, ...) do { } while (0) 46 #endif 47 48 static void ich9_pm_update_sci_fn(ACPIREGS *regs) 49 { 50 ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs); 51 acpi_update_sci(&pm->acpi_regs, pm->irq); 52 } 53 54 static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width) 55 { 56 ICH9LPCPMRegs *pm = opaque; 57 return acpi_gpe_ioport_readb(&pm->acpi_regs, addr); 58 } 59 60 static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val, 61 unsigned width) 62 { 63 ICH9LPCPMRegs *pm = opaque; 64 acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val); 65 acpi_update_sci(&pm->acpi_regs, pm->irq); 66 } 67 68 static const MemoryRegionOps ich9_gpe_ops = { 69 .read = ich9_gpe_readb, 70 .write = ich9_gpe_writeb, 71 .valid.min_access_size = 1, 72 .valid.max_access_size = 4, 73 .impl.min_access_size = 1, 74 .impl.max_access_size = 1, 75 .endianness = DEVICE_LITTLE_ENDIAN, 76 }; 77 78 static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width) 79 { 80 ICH9LPCPMRegs *pm = opaque; 81 switch (addr) { 82 case 0: 83 return pm->smi_en; 84 case 4: 85 return pm->smi_sts; 86 default: 87 return 0; 88 } 89 } 90 91 static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val, 92 unsigned width) 93 { 94 ICH9LPCPMRegs *pm = opaque; 95 switch (addr) { 96 case 0: 97 pm->smi_en &= ~pm->smi_en_wmask; 98 pm->smi_en |= (val & pm->smi_en_wmask); 99 break; 100 } 101 } 102 103 static const MemoryRegionOps ich9_smi_ops = { 104 .read = ich9_smi_readl, 105 .write = ich9_smi_writel, 106 .valid.min_access_size = 4, 107 .valid.max_access_size = 4, 108 .endianness = DEVICE_LITTLE_ENDIAN, 109 }; 110 111 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base) 112 { 113 ICH9_DEBUG("to 0x%x\n", pm_io_base); 114 115 assert((pm_io_base & ICH9_PMIO_MASK) == 0); 116 117 pm->pm_io_base = pm_io_base; 118 memory_region_transaction_begin(); 119 memory_region_set_enabled(&pm->io, pm->pm_io_base != 0); 120 memory_region_set_address(&pm->io, pm->pm_io_base); 121 memory_region_transaction_commit(); 122 } 123 124 static int ich9_pm_post_load(void *opaque, int version_id) 125 { 126 ICH9LPCPMRegs *pm = opaque; 127 uint32_t pm_io_base = pm->pm_io_base; 128 pm->pm_io_base = 0; 129 ich9_pm_iospace_update(pm, pm_io_base); 130 return 0; 131 } 132 133 #define VMSTATE_GPE_ARRAY(_field, _state) \ 134 { \ 135 .name = (stringify(_field)), \ 136 .version_id = 0, \ 137 .num = ICH9_PMIO_GPE0_LEN, \ 138 .info = &vmstate_info_uint8, \ 139 .size = sizeof(uint8_t), \ 140 .flags = VMS_ARRAY | VMS_POINTER, \ 141 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \ 142 } 143 144 static bool vmstate_test_use_memhp(void *opaque) 145 { 146 ICH9LPCPMRegs *s = opaque; 147 return s->acpi_memory_hotplug.is_enabled; 148 } 149 150 static const VMStateDescription vmstate_memhp_state = { 151 .name = "ich9_pm/memhp", 152 .version_id = 1, 153 .minimum_version_id = 1, 154 .minimum_version_id_old = 1, 155 .fields = (VMStateField[]) { 156 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs), 157 VMSTATE_END_OF_LIST() 158 } 159 }; 160 161 const VMStateDescription vmstate_ich9_pm = { 162 .name = "ich9_pm", 163 .version_id = 1, 164 .minimum_version_id = 1, 165 .post_load = ich9_pm_post_load, 166 .fields = (VMStateField[]) { 167 VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs), 168 VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs), 169 VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs), 170 VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs), 171 VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs), 172 VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs), 173 VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs), 174 VMSTATE_UINT32(smi_en, ICH9LPCPMRegs), 175 VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs), 176 VMSTATE_END_OF_LIST() 177 }, 178 .subsections = (VMStateSubsection[]) { 179 { 180 .vmsd = &vmstate_memhp_state, 181 .needed = vmstate_test_use_memhp, 182 }, 183 VMSTATE_END_OF_LIST() 184 } 185 }; 186 187 static void pm_reset(void *opaque) 188 { 189 ICH9LPCPMRegs *pm = opaque; 190 ich9_pm_iospace_update(pm, 0); 191 192 acpi_pm1_evt_reset(&pm->acpi_regs); 193 acpi_pm1_cnt_reset(&pm->acpi_regs); 194 acpi_pm_tmr_reset(&pm->acpi_regs); 195 acpi_gpe_reset(&pm->acpi_regs); 196 197 if (kvm_enabled()) { 198 /* Mark SMM as already inited to prevent SMM from running. KVM does not 199 * support SMM mode. */ 200 pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN; 201 } 202 pm->smi_en_wmask = ~0; 203 204 acpi_update_sci(&pm->acpi_regs, pm->irq); 205 } 206 207 static void pm_powerdown_req(Notifier *n, void *opaque) 208 { 209 ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier); 210 211 acpi_pm1_evt_power_down(&pm->acpi_regs); 212 } 213 214 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, 215 qemu_irq sci_irq) 216 { 217 memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE); 218 memory_region_set_enabled(&pm->io, false); 219 memory_region_add_subregion(pci_address_space_io(lpc_pci), 220 0, &pm->io); 221 222 acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); 223 acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); 224 acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4, 225 pm->s4_val); 226 227 acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN); 228 memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm, 229 "acpi-gpe0", ICH9_PMIO_GPE0_LEN); 230 memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe); 231 232 memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm, 233 "acpi-smi", 8); 234 memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi); 235 236 pm->irq = sci_irq; 237 qemu_register_reset(pm_reset, pm); 238 pm->powerdown_notifier.notify = pm_powerdown_req; 239 qemu_register_powerdown_notifier(&pm->powerdown_notifier); 240 241 acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), 242 &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE); 243 244 if (pm->acpi_memory_hotplug.is_enabled) { 245 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), 246 &pm->acpi_memory_hotplug); 247 } 248 } 249 250 static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, 251 void *opaque, const char *name, 252 Error **errp) 253 { 254 ICH9LPCPMRegs *pm = opaque; 255 uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS; 256 257 visit_type_uint32(v, &value, name, errp); 258 } 259 260 static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp) 261 { 262 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 263 264 return s->pm.acpi_memory_hotplug.is_enabled; 265 } 266 267 static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value, 268 Error **errp) 269 { 270 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 271 272 s->pm.acpi_memory_hotplug.is_enabled = value; 273 } 274 275 static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, 276 void *opaque, const char *name, 277 Error **errp) 278 { 279 ICH9LPCPMRegs *pm = opaque; 280 uint8_t value = pm->disable_s3; 281 282 visit_type_uint8(v, &value, name, errp); 283 } 284 285 static void ich9_pm_set_disable_s3(Object *obj, Visitor *v, 286 void *opaque, const char *name, 287 Error **errp) 288 { 289 ICH9LPCPMRegs *pm = opaque; 290 Error *local_err = NULL; 291 uint8_t value; 292 293 visit_type_uint8(v, &value, name, &local_err); 294 if (local_err) { 295 goto out; 296 } 297 pm->disable_s3 = value; 298 out: 299 error_propagate(errp, local_err); 300 } 301 302 static void ich9_pm_get_disable_s4(Object *obj, Visitor *v, 303 void *opaque, const char *name, 304 Error **errp) 305 { 306 ICH9LPCPMRegs *pm = opaque; 307 uint8_t value = pm->disable_s4; 308 309 visit_type_uint8(v, &value, name, errp); 310 } 311 312 static void ich9_pm_set_disable_s4(Object *obj, Visitor *v, 313 void *opaque, const char *name, 314 Error **errp) 315 { 316 ICH9LPCPMRegs *pm = opaque; 317 Error *local_err = NULL; 318 uint8_t value; 319 320 visit_type_uint8(v, &value, name, &local_err); 321 if (local_err) { 322 goto out; 323 } 324 pm->disable_s4 = value; 325 out: 326 error_propagate(errp, local_err); 327 } 328 329 static void ich9_pm_get_s4_val(Object *obj, Visitor *v, 330 void *opaque, const char *name, 331 Error **errp) 332 { 333 ICH9LPCPMRegs *pm = opaque; 334 uint8_t value = pm->s4_val; 335 336 visit_type_uint8(v, &value, name, errp); 337 } 338 339 static void ich9_pm_set_s4_val(Object *obj, Visitor *v, 340 void *opaque, const char *name, 341 Error **errp) 342 { 343 ICH9LPCPMRegs *pm = opaque; 344 Error *local_err = NULL; 345 uint8_t value; 346 347 visit_type_uint8(v, &value, name, &local_err); 348 if (local_err) { 349 goto out; 350 } 351 pm->s4_val = value; 352 out: 353 error_propagate(errp, local_err); 354 } 355 356 void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp) 357 { 358 static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN; 359 pm->acpi_memory_hotplug.is_enabled = true; 360 pm->disable_s3 = 0; 361 pm->disable_s4 = 0; 362 pm->s4_val = 2; 363 364 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE, 365 &pm->pm_io_base, errp); 366 object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32", 367 ich9_pm_get_gpe0_blk, 368 NULL, NULL, pm, NULL); 369 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN, 370 &gpe0_len, errp); 371 object_property_add_bool(obj, "memory-hotplug-support", 372 ich9_pm_get_memory_hotplug_support, 373 ich9_pm_set_memory_hotplug_support, 374 NULL); 375 object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8", 376 ich9_pm_get_disable_s3, 377 ich9_pm_set_disable_s3, 378 NULL, pm, NULL); 379 object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8", 380 ich9_pm_get_disable_s4, 381 ich9_pm_set_disable_s4, 382 NULL, pm, NULL); 383 object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8", 384 ich9_pm_get_s4_val, 385 ich9_pm_set_s4_val, 386 NULL, pm, NULL); 387 } 388 389 void ich9_pm_device_plug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, Error **errp) 390 { 391 if (pm->acpi_memory_hotplug.is_enabled && 392 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 393 acpi_memory_plug_cb(&pm->acpi_regs, pm->irq, &pm->acpi_memory_hotplug, 394 dev, errp); 395 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 396 acpi_cpu_plug_cb(&pm->acpi_regs, pm->irq, &pm->gpe_cpu, dev, errp); 397 } else { 398 error_setg(errp, "acpi: device plug request for not supported device" 399 " type: %s", object_get_typename(OBJECT(dev))); 400 } 401 } 402 403 void ich9_pm_device_unplug_request_cb(ICH9LPCPMRegs *pm, DeviceState *dev, 404 Error **errp) 405 { 406 if (pm->acpi_memory_hotplug.is_enabled && 407 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 408 acpi_memory_unplug_request_cb(&pm->acpi_regs, pm->irq, 409 &pm->acpi_memory_hotplug, dev, errp); 410 } else { 411 error_setg(errp, "acpi: device unplug request for not supported device" 412 " type: %s", object_get_typename(OBJECT(dev))); 413 } 414 } 415 416 void ich9_pm_device_unplug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, 417 Error **errp) 418 { 419 if (pm->acpi_memory_hotplug.is_enabled && 420 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 421 acpi_memory_unplug_cb(&pm->acpi_memory_hotplug, dev, errp); 422 } else { 423 error_setg(errp, "acpi: device unplug for not supported device" 424 " type: %s", object_get_typename(OBJECT(dev))); 425 } 426 } 427 428 void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list) 429 { 430 ICH9LPCState *s = ICH9_LPC_DEVICE(adev); 431 432 acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list); 433 } 434