1 /* 2 * ACPI implementation 3 * 4 * Copyright (c) 2006 Fabrice Bellard 5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp> 6 * VA Linux Systems Japan K.K. 7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com> 8 * 9 * This is based on acpi.c. 10 * 11 * This library is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU Lesser General Public 13 * License version 2 as published by the Free Software Foundation. 14 * 15 * This library is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * Lesser General Public License for more details. 19 * 20 * You should have received a copy of the GNU Lesser General Public 21 * License along with this library; if not, see <http://www.gnu.org/licenses/> 22 * 23 * Contributions after 2012-01-13 are licensed under the terms of the 24 * GNU GPL, version 2 or (at your option) any later version. 25 */ 26 #include "hw/hw.h" 27 #include "qapi/visitor.h" 28 #include "hw/i386/pc.h" 29 #include "hw/pci/pci.h" 30 #include "qemu/timer.h" 31 #include "sysemu/sysemu.h" 32 #include "hw/acpi/acpi.h" 33 #include "sysemu/kvm.h" 34 #include "exec/address-spaces.h" 35 36 #include "hw/i386/ich9.h" 37 #include "hw/mem/pc-dimm.h" 38 39 //#define DEBUG 40 41 #ifdef DEBUG 42 #define ICH9_DEBUG(fmt, ...) \ 43 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0) 44 #else 45 #define ICH9_DEBUG(fmt, ...) do { } while (0) 46 #endif 47 48 static void ich9_pm_update_sci_fn(ACPIREGS *regs) 49 { 50 ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs); 51 acpi_update_sci(&pm->acpi_regs, pm->irq); 52 } 53 54 static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width) 55 { 56 ICH9LPCPMRegs *pm = opaque; 57 return acpi_gpe_ioport_readb(&pm->acpi_regs, addr); 58 } 59 60 static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val, 61 unsigned width) 62 { 63 ICH9LPCPMRegs *pm = opaque; 64 acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val); 65 acpi_update_sci(&pm->acpi_regs, pm->irq); 66 } 67 68 static const MemoryRegionOps ich9_gpe_ops = { 69 .read = ich9_gpe_readb, 70 .write = ich9_gpe_writeb, 71 .valid.min_access_size = 1, 72 .valid.max_access_size = 4, 73 .impl.min_access_size = 1, 74 .impl.max_access_size = 1, 75 .endianness = DEVICE_LITTLE_ENDIAN, 76 }; 77 78 static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width) 79 { 80 ICH9LPCPMRegs *pm = opaque; 81 switch (addr) { 82 case 0: 83 return pm->smi_en; 84 case 4: 85 return pm->smi_sts; 86 default: 87 return 0; 88 } 89 } 90 91 static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val, 92 unsigned width) 93 { 94 ICH9LPCPMRegs *pm = opaque; 95 switch (addr) { 96 case 0: 97 pm->smi_en = val; 98 break; 99 } 100 } 101 102 static const MemoryRegionOps ich9_smi_ops = { 103 .read = ich9_smi_readl, 104 .write = ich9_smi_writel, 105 .valid.min_access_size = 4, 106 .valid.max_access_size = 4, 107 .endianness = DEVICE_LITTLE_ENDIAN, 108 }; 109 110 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base) 111 { 112 ICH9_DEBUG("to 0x%x\n", pm_io_base); 113 114 assert((pm_io_base & ICH9_PMIO_MASK) == 0); 115 116 pm->pm_io_base = pm_io_base; 117 memory_region_transaction_begin(); 118 memory_region_set_enabled(&pm->io, pm->pm_io_base != 0); 119 memory_region_set_address(&pm->io, pm->pm_io_base); 120 memory_region_transaction_commit(); 121 } 122 123 static int ich9_pm_post_load(void *opaque, int version_id) 124 { 125 ICH9LPCPMRegs *pm = opaque; 126 uint32_t pm_io_base = pm->pm_io_base; 127 pm->pm_io_base = 0; 128 ich9_pm_iospace_update(pm, pm_io_base); 129 return 0; 130 } 131 132 #define VMSTATE_GPE_ARRAY(_field, _state) \ 133 { \ 134 .name = (stringify(_field)), \ 135 .version_id = 0, \ 136 .num = ICH9_PMIO_GPE0_LEN, \ 137 .info = &vmstate_info_uint8, \ 138 .size = sizeof(uint8_t), \ 139 .flags = VMS_ARRAY | VMS_POINTER, \ 140 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \ 141 } 142 143 static bool vmstate_test_use_memhp(void *opaque) 144 { 145 ICH9LPCPMRegs *s = opaque; 146 return s->acpi_memory_hotplug.is_enabled; 147 } 148 149 static const VMStateDescription vmstate_memhp_state = { 150 .name = "ich9_pm/memhp", 151 .version_id = 1, 152 .minimum_version_id = 1, 153 .minimum_version_id_old = 1, 154 .fields = (VMStateField[]) { 155 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs), 156 VMSTATE_END_OF_LIST() 157 } 158 }; 159 160 const VMStateDescription vmstate_ich9_pm = { 161 .name = "ich9_pm", 162 .version_id = 1, 163 .minimum_version_id = 1, 164 .post_load = ich9_pm_post_load, 165 .fields = (VMStateField[]) { 166 VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs), 167 VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs), 168 VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs), 169 VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs), 170 VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs), 171 VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs), 172 VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs), 173 VMSTATE_UINT32(smi_en, ICH9LPCPMRegs), 174 VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs), 175 VMSTATE_END_OF_LIST() 176 }, 177 .subsections = (VMStateSubsection[]) { 178 { 179 .vmsd = &vmstate_memhp_state, 180 .needed = vmstate_test_use_memhp, 181 }, 182 VMSTATE_END_OF_LIST() 183 } 184 }; 185 186 static void pm_reset(void *opaque) 187 { 188 ICH9LPCPMRegs *pm = opaque; 189 ich9_pm_iospace_update(pm, 0); 190 191 acpi_pm1_evt_reset(&pm->acpi_regs); 192 acpi_pm1_cnt_reset(&pm->acpi_regs); 193 acpi_pm_tmr_reset(&pm->acpi_regs); 194 acpi_gpe_reset(&pm->acpi_regs); 195 196 if (kvm_enabled()) { 197 /* Mark SMM as already inited to prevent SMM from running. KVM does not 198 * support SMM mode. */ 199 pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN; 200 } 201 202 acpi_update_sci(&pm->acpi_regs, pm->irq); 203 } 204 205 static void pm_powerdown_req(Notifier *n, void *opaque) 206 { 207 ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier); 208 209 acpi_pm1_evt_power_down(&pm->acpi_regs); 210 } 211 212 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, 213 qemu_irq sci_irq) 214 { 215 memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE); 216 memory_region_set_enabled(&pm->io, false); 217 memory_region_add_subregion(pci_address_space_io(lpc_pci), 218 0, &pm->io); 219 220 acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); 221 acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); 222 acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->s4_val); 223 224 acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN); 225 memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm, 226 "acpi-gpe0", ICH9_PMIO_GPE0_LEN); 227 memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe); 228 229 memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm, 230 "acpi-smi", 8); 231 memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi); 232 233 pm->irq = sci_irq; 234 qemu_register_reset(pm_reset, pm); 235 pm->powerdown_notifier.notify = pm_powerdown_req; 236 qemu_register_powerdown_notifier(&pm->powerdown_notifier); 237 238 acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), 239 &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE); 240 241 if (pm->acpi_memory_hotplug.is_enabled) { 242 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), 243 &pm->acpi_memory_hotplug); 244 } 245 } 246 247 static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, 248 void *opaque, const char *name, 249 Error **errp) 250 { 251 ICH9LPCPMRegs *pm = opaque; 252 uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS; 253 254 visit_type_uint32(v, &value, name, errp); 255 } 256 257 static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp) 258 { 259 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 260 261 return s->pm.acpi_memory_hotplug.is_enabled; 262 } 263 264 static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value, 265 Error **errp) 266 { 267 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 268 269 s->pm.acpi_memory_hotplug.is_enabled = value; 270 } 271 272 static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, 273 void *opaque, const char *name, 274 Error **errp) 275 { 276 ICH9LPCPMRegs *pm = opaque; 277 uint8_t value = pm->disable_s3; 278 279 visit_type_uint8(v, &value, name, errp); 280 } 281 282 static void ich9_pm_set_disable_s3(Object *obj, Visitor *v, 283 void *opaque, const char *name, 284 Error **errp) 285 { 286 ICH9LPCPMRegs *pm = opaque; 287 Error *local_err = NULL; 288 uint8_t value; 289 290 visit_type_uint8(v, &value, name, &local_err); 291 if (local_err) { 292 goto out; 293 } 294 pm->disable_s3 = value; 295 out: 296 error_propagate(errp, local_err); 297 } 298 299 static void ich9_pm_get_disable_s4(Object *obj, Visitor *v, 300 void *opaque, const char *name, 301 Error **errp) 302 { 303 ICH9LPCPMRegs *pm = opaque; 304 uint8_t value = pm->disable_s4; 305 306 visit_type_uint8(v, &value, name, errp); 307 } 308 309 static void ich9_pm_set_disable_s4(Object *obj, Visitor *v, 310 void *opaque, const char *name, 311 Error **errp) 312 { 313 ICH9LPCPMRegs *pm = opaque; 314 Error *local_err = NULL; 315 uint8_t value; 316 317 visit_type_uint8(v, &value, name, &local_err); 318 if (local_err) { 319 goto out; 320 } 321 pm->disable_s4 = value; 322 out: 323 error_propagate(errp, local_err); 324 } 325 326 static void ich9_pm_get_s4_val(Object *obj, Visitor *v, 327 void *opaque, const char *name, 328 Error **errp) 329 { 330 ICH9LPCPMRegs *pm = opaque; 331 uint8_t value = pm->s4_val; 332 333 visit_type_uint8(v, &value, name, errp); 334 } 335 336 static void ich9_pm_set_s4_val(Object *obj, Visitor *v, 337 void *opaque, const char *name, 338 Error **errp) 339 { 340 ICH9LPCPMRegs *pm = opaque; 341 Error *local_err = NULL; 342 uint8_t value; 343 344 visit_type_uint8(v, &value, name, &local_err); 345 if (local_err) { 346 goto out; 347 } 348 pm->s4_val = value; 349 out: 350 error_propagate(errp, local_err); 351 } 352 353 void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp) 354 { 355 static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN; 356 pm->acpi_memory_hotplug.is_enabled = true; 357 pm->disable_s3 = 0; 358 pm->disable_s4 = 0; 359 pm->s4_val = 2; 360 361 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE, 362 &pm->pm_io_base, errp); 363 object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32", 364 ich9_pm_get_gpe0_blk, 365 NULL, NULL, pm, NULL); 366 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN, 367 &gpe0_len, errp); 368 object_property_add_bool(obj, "memory-hotplug-support", 369 ich9_pm_get_memory_hotplug_support, 370 ich9_pm_set_memory_hotplug_support, 371 NULL); 372 object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8", 373 ich9_pm_get_disable_s3, 374 ich9_pm_set_disable_s3, 375 NULL, pm, NULL); 376 object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8", 377 ich9_pm_get_disable_s4, 378 ich9_pm_set_disable_s4, 379 NULL, pm, NULL); 380 object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8", 381 ich9_pm_get_s4_val, 382 ich9_pm_set_s4_val, 383 NULL, pm, NULL); 384 } 385 386 void ich9_pm_device_plug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, Error **errp) 387 { 388 if (pm->acpi_memory_hotplug.is_enabled && 389 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 390 acpi_memory_plug_cb(&pm->acpi_regs, pm->irq, &pm->acpi_memory_hotplug, 391 dev, errp); 392 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 393 acpi_cpu_plug_cb(&pm->acpi_regs, pm->irq, &pm->gpe_cpu, dev, errp); 394 } else { 395 error_setg(errp, "acpi: device plug request for not supported device" 396 " type: %s", object_get_typename(OBJECT(dev))); 397 } 398 } 399 400 void ich9_pm_device_unplug_request_cb(ICH9LPCPMRegs *pm, DeviceState *dev, 401 Error **errp) 402 { 403 error_setg(errp, "acpi: device unplug request for not supported device" 404 " type: %s", object_get_typename(OBJECT(dev))); 405 } 406 407 void ich9_pm_device_unplug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, 408 Error **errp) 409 { 410 error_setg(errp, "acpi: device unplug for not supported device" 411 " type: %s", object_get_typename(OBJECT(dev))); 412 } 413 414 void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list) 415 { 416 ICH9LPCState *s = ICH9_LPC_DEVICE(adev); 417 418 acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list); 419 } 420