xref: /openbmc/qemu/hw/acpi/cpu_hotplug.c (revision 3cad405b)
1 /*
2  * QEMU ACPI hotplug utilities
3  *
4  * Copyright (C) 2013 Red Hat Inc
5  *
6  * Authors:
7  *   Igor Mammedov <imammedo@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 #include "qemu/osdep.h"
13 #include "hw/acpi/cpu_hotplug.h"
14 #include "qapi/error.h"
15 #include "hw/core/cpu.h"
16 #include "hw/i386/pc.h"
17 #include "qemu/error-report.h"
18 
19 #define CPU_EJECT_METHOD "CPEJ"
20 #define CPU_MAT_METHOD "CPMA"
21 #define CPU_ON_BITMAP "CPON"
22 #define CPU_STATUS_METHOD "CPST"
23 #define CPU_STATUS_MAP "PRS"
24 #define CPU_SCAN_METHOD "PRSC"
25 
26 static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int size)
27 {
28     AcpiCpuHotplug *cpus = opaque;
29     uint64_t val = cpus->sts[addr];
30 
31     return val;
32 }
33 
34 static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data,
35                              unsigned int size)
36 {
37     /* firmware never used to write in CPU present bitmap so use
38        this fact as means to switch QEMU into modern CPU hotplug
39        mode by writing 0 at the beginning of legacy CPU bitmap
40      */
41     if (addr == 0 && data == 0) {
42         AcpiCpuHotplug *cpus = opaque;
43         object_property_set_bool(cpus->device, false, "cpu-hotplug-legacy",
44                                  &error_abort);
45     }
46 }
47 
48 static const MemoryRegionOps AcpiCpuHotplug_ops = {
49     .read = cpu_status_read,
50     .write = cpu_status_write,
51     .endianness = DEVICE_LITTLE_ENDIAN,
52     .valid = {
53         .min_access_size = 1,
54         .max_access_size = 1,
55     },
56 };
57 
58 static void acpi_set_cpu_present_bit(AcpiCpuHotplug *g, CPUState *cpu)
59 {
60     CPUClass *k = CPU_GET_CLASS(cpu);
61     int64_t cpu_id;
62 
63     cpu_id = k->get_arch_id(cpu);
64     if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) {
65         object_property_set_bool(g->device, false, "cpu-hotplug-legacy",
66                                  &error_abort);
67         return;
68     }
69 
70     g->sts[cpu_id / 8] |= (1 << (cpu_id % 8));
71 }
72 
73 void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
74                              AcpiCpuHotplug *g, DeviceState *dev, Error **errp)
75 {
76     acpi_set_cpu_present_bit(g, CPU(dev));
77     acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
78 }
79 
80 void legacy_acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner,
81                                   AcpiCpuHotplug *gpe_cpu, uint16_t base)
82 {
83     CPUState *cpu;
84 
85     memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops,
86                           gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN);
87     memory_region_add_subregion(parent, base, &gpe_cpu->io);
88     gpe_cpu->device = owner;
89 
90     CPU_FOREACH(cpu) {
91         acpi_set_cpu_present_bit(gpe_cpu, cpu);
92     }
93 }
94 
95 void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu,
96                                 CPUHotplugState *cpuhp_state,
97                                 uint16_t io_port)
98 {
99     MemoryRegion *parent = pci_address_space_io(PCI_DEVICE(gpe_cpu->device));
100 
101     memory_region_del_subregion(parent, &gpe_cpu->io);
102     cpu_hotplug_hw_init(parent, gpe_cpu->device, cpuhp_state, io_port);
103 }
104 
105 void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
106                                   uint16_t io_base)
107 {
108     Aml *dev;
109     Aml *crs;
110     Aml *pkg;
111     Aml *field;
112     Aml *method;
113     Aml *if_ctx;
114     Aml *else_ctx;
115     int i, apic_idx;
116     Aml *sb_scope = aml_scope("_SB");
117     uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0};
118     Aml *cpu_id = aml_arg(1);
119     Aml *apic_id = aml_arg(0);
120     Aml *cpu_on = aml_local(0);
121     Aml *madt = aml_local(1);
122     Aml *cpus_map = aml_name(CPU_ON_BITMAP);
123     Aml *zero = aml_int(0);
124     Aml *one = aml_int(1);
125     MachineClass *mc = MACHINE_GET_CLASS(machine);
126     const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
127     X86MachineState *x86ms = X86_MACHINE(machine);
128 
129     /*
130      * _MAT method - creates an madt apic buffer
131      * apic_id = Arg0 = Local APIC ID
132      * cpu_id  = Arg1 = Processor ID
133      * cpu_on = Local0 = CPON flag for this cpu
134      * madt = Local1 = Buffer (in madt apic form) to return
135      */
136     method = aml_method(CPU_MAT_METHOD, 2, AML_NOTSERIALIZED);
137     aml_append(method,
138         aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
139     aml_append(method,
140         aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt));
141     /* Update the processor id, lapic id, and enable/disable status */
142     aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2))));
143     aml_append(method, aml_store(apic_id, aml_index(madt, aml_int(3))));
144     aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4))));
145     aml_append(method, aml_return(madt));
146     aml_append(sb_scope, method);
147 
148     /*
149      * _STA method - return ON status of cpu
150      * apic_id = Arg0 = Local APIC ID
151      * cpu_on = Local0 = CPON flag for this cpu
152      */
153     method = aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED);
154     aml_append(method,
155         aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
156     if_ctx = aml_if(cpu_on);
157     {
158         aml_append(if_ctx, aml_return(aml_int(0xF)));
159     }
160     aml_append(method, if_ctx);
161     else_ctx = aml_else();
162     {
163         aml_append(else_ctx, aml_return(zero));
164     }
165     aml_append(method, else_ctx);
166     aml_append(sb_scope, method);
167 
168     method = aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED);
169     aml_append(method, aml_sleep(200));
170     aml_append(sb_scope, method);
171 
172     method = aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED);
173     {
174         Aml *while_ctx, *if_ctx2, *else_ctx2;
175         Aml *bus_check_evt = aml_int(1);
176         Aml *remove_evt = aml_int(3);
177         Aml *status_map = aml_local(5); /* Local5 = active cpu bitmap */
178         Aml *byte = aml_local(2); /* Local2 = last read byte from bitmap */
179         Aml *idx = aml_local(0); /* Processor ID / APIC ID iterator */
180         Aml *is_cpu_on = aml_local(1); /* Local1 = CPON flag for cpu */
181         Aml *status = aml_local(3); /* Local3 = active state for cpu */
182 
183         aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map));
184         aml_append(method, aml_store(zero, byte));
185         aml_append(method, aml_store(zero, idx));
186 
187         /* While (idx < SizeOf(CPON)) */
188         while_ctx = aml_while(aml_lless(idx, aml_sizeof(cpus_map)));
189         aml_append(while_ctx,
190             aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on));
191 
192         if_ctx = aml_if(aml_and(idx, aml_int(0x07), NULL));
193         {
194             /* Shift down previously read bitmap byte */
195             aml_append(if_ctx, aml_shiftright(byte, one, byte));
196         }
197         aml_append(while_ctx, if_ctx);
198 
199         else_ctx = aml_else();
200         {
201             /* Read next byte from cpu bitmap */
202             aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_map,
203                        aml_shiftright(idx, aml_int(3), NULL))), byte));
204         }
205         aml_append(while_ctx, else_ctx);
206 
207         aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status));
208         if_ctx = aml_if(aml_lnot(aml_equal(is_cpu_on, status)));
209         {
210             /* State change - update CPON with new state */
211             aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx)));
212             if_ctx2 = aml_if(aml_equal(status, one));
213             {
214                 aml_append(if_ctx2,
215                     aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt));
216             }
217             aml_append(if_ctx, if_ctx2);
218             else_ctx2 = aml_else();
219             {
220                 aml_append(else_ctx2,
221                     aml_call2(AML_NOTIFY_METHOD, idx, remove_evt));
222             }
223         }
224         aml_append(if_ctx, else_ctx2);
225         aml_append(while_ctx, if_ctx);
226 
227         aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */
228         aml_append(method, while_ctx);
229     }
230     aml_append(sb_scope, method);
231 
232     /* The current AML generator can cover the APIC ID range [0..255],
233      * inclusive, for VCPU hotplug. */
234     QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
235     if (x86ms->apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {
236         error_report("max_cpus is too large. APIC ID of last CPU is %u",
237                      x86ms->apic_id_limit - 1);
238         exit(1);
239     }
240 
241     /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */
242     dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE));
243     aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
244     aml_append(dev,
245         aml_name_decl("_UID", aml_string("CPU Hotplug resources"))
246     );
247     /* device present, functioning, decoding, not shown in UI */
248     aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
249     crs = aml_resource_template();
250     aml_append(crs,
251         aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_GPE_PROC_LEN)
252     );
253     aml_append(dev, aml_name_decl("_CRS", crs));
254     aml_append(sb_scope, dev);
255     /* declare CPU hotplug MMIO region and PRS field to access it */
256     aml_append(sb_scope, aml_operation_region(
257         "PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_GPE_PROC_LEN));
258     field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
259     aml_append(field, aml_named_field("PRS", 256));
260     aml_append(sb_scope, field);
261 
262     /* build Processor object for each processor */
263     for (i = 0; i < apic_ids->len; i++) {
264         int apic_id = apic_ids->cpus[i].arch_id;
265 
266         assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
267 
268         dev = aml_processor(i, 0, 0, "CP%.02X", apic_id);
269 
270         method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
271         aml_append(method,
272             aml_return(aml_call2(CPU_MAT_METHOD, aml_int(apic_id), aml_int(i))
273         ));
274         aml_append(dev, method);
275 
276         method = aml_method("_STA", 0, AML_NOTSERIALIZED);
277         aml_append(method,
278             aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id))));
279         aml_append(dev, method);
280 
281         method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
282         aml_append(method,
283             aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id),
284                 aml_arg(0)))
285         );
286         aml_append(dev, method);
287 
288         aml_append(sb_scope, dev);
289     }
290 
291     /* build this code:
292      *   Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
293      */
294     /* Arg0 = APIC ID */
295     method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
296     for (i = 0; i < apic_ids->len; i++) {
297         int apic_id = apic_ids->cpus[i].arch_id;
298 
299         if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id)));
300         aml_append(if_ctx,
301             aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1))
302         );
303         aml_append(method, if_ctx);
304     }
305     aml_append(sb_scope, method);
306 
307     /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
308      *
309      * Note: The ability to create variable-sized packages was first
310      * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages
311      * ith up to 255 elements. Windows guests up to win2k8 fail when
312      * VarPackageOp is used.
313      */
314     pkg = x86ms->apic_id_limit <= 255 ? aml_package(x86ms->apic_id_limit) :
315                                         aml_varpackage(x86ms->apic_id_limit);
316 
317     for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
318         int apic_id = apic_ids->cpus[i].arch_id;
319 
320         for (; apic_idx < apic_id; apic_idx++) {
321             aml_append(pkg, aml_int(0));
322         }
323         aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
324         apic_idx = apic_id + 1;
325     }
326     aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
327     aml_append(ctx, sb_scope);
328 
329     method = aml_method("\\_GPE._E02", 0, AML_NOTSERIALIZED);
330     aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
331     aml_append(ctx, method);
332 }
333