xref: /openbmc/qemu/hw/acpi/cpu_hotplug.c (revision 0c0c1fd9)
1 /*
2  * QEMU ACPI hotplug utilities
3  *
4  * Copyright (C) 2013 Red Hat Inc
5  *
6  * Authors:
7  *   Igor Mammedov <imammedo@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 #include "qemu/osdep.h"
13 #include "hw/hw.h"
14 #include "hw/acpi/cpu_hotplug.h"
15 #include "qapi/error.h"
16 #include "qom/cpu.h"
17 #include "hw/i386/pc.h"
18 
19 #define CPU_EJECT_METHOD "CPEJ"
20 #define CPU_MAT_METHOD "CPMA"
21 #define CPU_ON_BITMAP "CPON"
22 #define CPU_STATUS_METHOD "CPST"
23 #define CPU_STATUS_MAP "PRS"
24 #define CPU_SCAN_METHOD "PRSC"
25 
26 static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int size)
27 {
28     AcpiCpuHotplug *cpus = opaque;
29     uint64_t val = cpus->sts[addr];
30 
31     return val;
32 }
33 
34 static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data,
35                              unsigned int size)
36 {
37     /* firmware never used to write in CPU present bitmap so use
38        this fact as means to switch QEMU into modern CPU hotplug
39        mode by writing 0 at the beginning of legacy CPU bitmap
40      */
41     if (addr == 0 && data == 0) {
42         AcpiCpuHotplug *cpus = opaque;
43         object_property_set_bool(cpus->device, false, "cpu-hotplug-legacy",
44                                  &error_abort);
45     }
46 }
47 
48 static const MemoryRegionOps AcpiCpuHotplug_ops = {
49     .read = cpu_status_read,
50     .write = cpu_status_write,
51     .endianness = DEVICE_LITTLE_ENDIAN,
52     .valid = {
53         .min_access_size = 1,
54         .max_access_size = 1,
55     },
56 };
57 
58 static void acpi_set_cpu_present_bit(AcpiCpuHotplug *g, CPUState *cpu,
59                                      Error **errp)
60 {
61     CPUClass *k = CPU_GET_CLASS(cpu);
62     int64_t cpu_id;
63 
64     cpu_id = k->get_arch_id(cpu);
65     if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) {
66         error_setg(errp, "acpi: invalid cpu id: %" PRIi64, cpu_id);
67         return;
68     }
69 
70     g->sts[cpu_id / 8] |= (1 << (cpu_id % 8));
71 }
72 
73 void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
74                              AcpiCpuHotplug *g, DeviceState *dev, Error **errp)
75 {
76     acpi_set_cpu_present_bit(g, CPU(dev), errp);
77     if (*errp != NULL) {
78         return;
79     }
80     acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
81 }
82 
83 void legacy_acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner,
84                                   AcpiCpuHotplug *gpe_cpu, uint16_t base)
85 {
86     CPUState *cpu;
87 
88     CPU_FOREACH(cpu) {
89         acpi_set_cpu_present_bit(gpe_cpu, cpu, &error_abort);
90     }
91     memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops,
92                           gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN);
93     memory_region_add_subregion(parent, base, &gpe_cpu->io);
94     gpe_cpu->device = owner;
95 }
96 
97 void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu,
98                                 CPUHotplugState *cpuhp_state,
99                                 uint16_t io_port)
100 {
101     MemoryRegion *parent = pci_address_space_io(PCI_DEVICE(gpe_cpu->device));
102 
103     memory_region_del_subregion(parent, &gpe_cpu->io);
104     cpu_hotplug_hw_init(parent, gpe_cpu->device, cpuhp_state, io_port);
105 }
106 
107 void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
108                                   uint16_t io_base)
109 {
110     Aml *dev;
111     Aml *crs;
112     Aml *pkg;
113     Aml *field;
114     Aml *method;
115     Aml *if_ctx;
116     Aml *else_ctx;
117     int i, apic_idx;
118     Aml *sb_scope = aml_scope("_SB");
119     uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0};
120     Aml *cpu_id = aml_arg(1);
121     Aml *apic_id = aml_arg(0);
122     Aml *cpu_on = aml_local(0);
123     Aml *madt = aml_local(1);
124     Aml *cpus_map = aml_name(CPU_ON_BITMAP);
125     Aml *zero = aml_int(0);
126     Aml *one = aml_int(1);
127     MachineClass *mc = MACHINE_GET_CLASS(machine);
128     CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
129     PCMachineState *pcms = PC_MACHINE(machine);
130 
131     /*
132      * _MAT method - creates an madt apic buffer
133      * apic_id = Arg0 = Local APIC ID
134      * cpu_id  = Arg1 = Processor ID
135      * cpu_on = Local0 = CPON flag for this cpu
136      * madt = Local1 = Buffer (in madt apic form) to return
137      */
138     method = aml_method(CPU_MAT_METHOD, 2, AML_NOTSERIALIZED);
139     aml_append(method,
140         aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
141     aml_append(method,
142         aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt));
143     /* Update the processor id, lapic id, and enable/disable status */
144     aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2))));
145     aml_append(method, aml_store(apic_id, aml_index(madt, aml_int(3))));
146     aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4))));
147     aml_append(method, aml_return(madt));
148     aml_append(sb_scope, method);
149 
150     /*
151      * _STA method - return ON status of cpu
152      * apic_id = Arg0 = Local APIC ID
153      * cpu_on = Local0 = CPON flag for this cpu
154      */
155     method = aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED);
156     aml_append(method,
157         aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
158     if_ctx = aml_if(cpu_on);
159     {
160         aml_append(if_ctx, aml_return(aml_int(0xF)));
161     }
162     aml_append(method, if_ctx);
163     else_ctx = aml_else();
164     {
165         aml_append(else_ctx, aml_return(zero));
166     }
167     aml_append(method, else_ctx);
168     aml_append(sb_scope, method);
169 
170     method = aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED);
171     aml_append(method, aml_sleep(200));
172     aml_append(sb_scope, method);
173 
174     method = aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED);
175     {
176         Aml *while_ctx, *if_ctx2, *else_ctx2;
177         Aml *bus_check_evt = aml_int(1);
178         Aml *remove_evt = aml_int(3);
179         Aml *status_map = aml_local(5); /* Local5 = active cpu bitmap */
180         Aml *byte = aml_local(2); /* Local2 = last read byte from bitmap */
181         Aml *idx = aml_local(0); /* Processor ID / APIC ID iterator */
182         Aml *is_cpu_on = aml_local(1); /* Local1 = CPON flag for cpu */
183         Aml *status = aml_local(3); /* Local3 = active state for cpu */
184 
185         aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map));
186         aml_append(method, aml_store(zero, byte));
187         aml_append(method, aml_store(zero, idx));
188 
189         /* While (idx < SizeOf(CPON)) */
190         while_ctx = aml_while(aml_lless(idx, aml_sizeof(cpus_map)));
191         aml_append(while_ctx,
192             aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on));
193 
194         if_ctx = aml_if(aml_and(idx, aml_int(0x07), NULL));
195         {
196             /* Shift down previously read bitmap byte */
197             aml_append(if_ctx, aml_shiftright(byte, one, byte));
198         }
199         aml_append(while_ctx, if_ctx);
200 
201         else_ctx = aml_else();
202         {
203             /* Read next byte from cpu bitmap */
204             aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_map,
205                        aml_shiftright(idx, aml_int(3), NULL))), byte));
206         }
207         aml_append(while_ctx, else_ctx);
208 
209         aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status));
210         if_ctx = aml_if(aml_lnot(aml_equal(is_cpu_on, status)));
211         {
212             /* State change - update CPON with new state */
213             aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx)));
214             if_ctx2 = aml_if(aml_equal(status, one));
215             {
216                 aml_append(if_ctx2,
217                     aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt));
218             }
219             aml_append(if_ctx, if_ctx2);
220             else_ctx2 = aml_else();
221             {
222                 aml_append(else_ctx2,
223                     aml_call2(AML_NOTIFY_METHOD, idx, remove_evt));
224             }
225         }
226         aml_append(if_ctx, else_ctx2);
227         aml_append(while_ctx, if_ctx);
228 
229         aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */
230         aml_append(method, while_ctx);
231     }
232     aml_append(sb_scope, method);
233 
234     /* The current AML generator can cover the APIC ID range [0..255],
235      * inclusive, for VCPU hotplug. */
236     QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
237     g_assert(pcms->apic_id_limit <= ACPI_CPU_HOTPLUG_ID_LIMIT);
238 
239     /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */
240     dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE));
241     aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
242     aml_append(dev,
243         aml_name_decl("_UID", aml_string("CPU Hotplug resources"))
244     );
245     /* device present, functioning, decoding, not shown in UI */
246     aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
247     crs = aml_resource_template();
248     aml_append(crs,
249         aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_GPE_PROC_LEN)
250     );
251     aml_append(dev, aml_name_decl("_CRS", crs));
252     aml_append(sb_scope, dev);
253     /* declare CPU hotplug MMIO region and PRS field to access it */
254     aml_append(sb_scope, aml_operation_region(
255         "PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_GPE_PROC_LEN));
256     field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
257     aml_append(field, aml_named_field("PRS", 256));
258     aml_append(sb_scope, field);
259 
260     /* build Processor object for each processor */
261     for (i = 0; i < apic_ids->len; i++) {
262         int apic_id = apic_ids->cpus[i].arch_id;
263 
264         assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
265 
266         dev = aml_processor(i, 0, 0, "CP%.02X", apic_id);
267 
268         method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
269         aml_append(method,
270             aml_return(aml_call2(CPU_MAT_METHOD, aml_int(apic_id), aml_int(i))
271         ));
272         aml_append(dev, method);
273 
274         method = aml_method("_STA", 0, AML_NOTSERIALIZED);
275         aml_append(method,
276             aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id))));
277         aml_append(dev, method);
278 
279         method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
280         aml_append(method,
281             aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id),
282                 aml_arg(0)))
283         );
284         aml_append(dev, method);
285 
286         aml_append(sb_scope, dev);
287     }
288 
289     /* build this code:
290      *   Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
291      */
292     /* Arg0 = APIC ID */
293     method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
294     for (i = 0; i < apic_ids->len; i++) {
295         int apic_id = apic_ids->cpus[i].arch_id;
296 
297         if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id)));
298         aml_append(if_ctx,
299             aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1))
300         );
301         aml_append(method, if_ctx);
302     }
303     aml_append(sb_scope, method);
304 
305     /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
306      *
307      * Note: The ability to create variable-sized packages was first
308      * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages
309      * ith up to 255 elements. Windows guests up to win2k8 fail when
310      * VarPackageOp is used.
311      */
312     pkg = pcms->apic_id_limit <= 255 ? aml_package(pcms->apic_id_limit) :
313                                        aml_varpackage(pcms->apic_id_limit);
314 
315     for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
316         int apic_id = apic_ids->cpus[i].arch_id;
317 
318         for (; apic_idx < apic_id; apic_idx++) {
319             aml_append(pkg, aml_int(0));
320         }
321         aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
322         apic_idx = apic_id + 1;
323     }
324     aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
325     g_free(apic_ids);
326 
327     aml_append(ctx, sb_scope);
328 
329     method = aml_method("\\_GPE._E02", 0, AML_NOTSERIALIZED);
330     aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
331     aml_append(ctx, method);
332 }
333