1 #include "qemu/osdep.h" 2 #include "hw/boards.h" 3 #include "migration/vmstate.h" 4 #include "hw/acpi/cpu.h" 5 #include "qapi/error.h" 6 #include "qapi/qapi-events-misc.h" 7 #include "trace.h" 8 #include "sysemu/numa.h" 9 10 #define ACPI_CPU_HOTPLUG_REG_LEN 12 11 #define ACPI_CPU_SELECTOR_OFFSET_WR 0 12 #define ACPI_CPU_FLAGS_OFFSET_RW 4 13 #define ACPI_CPU_CMD_OFFSET_WR 5 14 #define ACPI_CPU_CMD_DATA_OFFSET_RW 8 15 #define ACPI_CPU_CMD_DATA2_OFFSET_R 0 16 17 enum { 18 CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0, 19 CPHP_OST_EVENT_CMD = 1, 20 CPHP_OST_STATUS_CMD = 2, 21 CPHP_CMD_MAX 22 }; 23 24 static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev) 25 { 26 ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1); 27 28 info->slot_type = ACPI_SLOT_TYPE_CPU; 29 info->slot = g_strdup_printf("%d", idx); 30 info->source = cdev->ost_event; 31 info->status = cdev->ost_status; 32 if (cdev->cpu) { 33 DeviceState *dev = DEVICE(cdev->cpu); 34 if (dev->id) { 35 info->device = g_strdup(dev->id); 36 info->has_device = true; 37 } 38 } 39 return info; 40 } 41 42 void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list) 43 { 44 int i; 45 46 for (i = 0; i < cpu_st->dev_count; i++) { 47 ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1); 48 elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]); 49 elem->next = NULL; 50 **list = elem; 51 *list = &elem->next; 52 } 53 } 54 55 static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size) 56 { 57 uint64_t val = 0; 58 CPUHotplugState *cpu_st = opaque; 59 AcpiCpuStatus *cdev; 60 61 if (cpu_st->selector >= cpu_st->dev_count) { 62 return val; 63 } 64 65 cdev = &cpu_st->devs[cpu_st->selector]; 66 switch (addr) { 67 case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */ 68 val |= cdev->cpu ? 1 : 0; 69 val |= cdev->is_inserting ? 2 : 0; 70 val |= cdev->is_removing ? 4 : 0; 71 trace_cpuhp_acpi_read_flags(cpu_st->selector, val); 72 break; 73 case ACPI_CPU_CMD_DATA_OFFSET_RW: 74 switch (cpu_st->command) { 75 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD: 76 val = cpu_st->selector; 77 break; 78 default: 79 break; 80 } 81 trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val); 82 break; 83 case ACPI_CPU_CMD_DATA2_OFFSET_R: 84 switch (cpu_st->command) { 85 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD: 86 val = 0; 87 break; 88 default: 89 break; 90 } 91 trace_cpuhp_acpi_read_cmd_data2(cpu_st->selector, val); 92 break; 93 default: 94 break; 95 } 96 return val; 97 } 98 99 static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data, 100 unsigned int size) 101 { 102 CPUHotplugState *cpu_st = opaque; 103 AcpiCpuStatus *cdev; 104 ACPIOSTInfo *info; 105 106 assert(cpu_st->dev_count); 107 108 if (addr) { 109 if (cpu_st->selector >= cpu_st->dev_count) { 110 trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector); 111 return; 112 } 113 } 114 115 switch (addr) { 116 case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */ 117 cpu_st->selector = data; 118 trace_cpuhp_acpi_write_idx(cpu_st->selector); 119 break; 120 case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */ 121 cdev = &cpu_st->devs[cpu_st->selector]; 122 if (data & 2) { /* clear insert event */ 123 cdev->is_inserting = false; 124 trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector); 125 } else if (data & 4) { /* clear remove event */ 126 cdev->is_removing = false; 127 trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector); 128 } else if (data & 8) { 129 DeviceState *dev = NULL; 130 HotplugHandler *hotplug_ctrl = NULL; 131 132 if (!cdev->cpu || cdev->cpu == first_cpu) { 133 trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector); 134 break; 135 } 136 137 trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector); 138 dev = DEVICE(cdev->cpu); 139 hotplug_ctrl = qdev_get_hotplug_handler(dev); 140 hotplug_handler_unplug(hotplug_ctrl, dev, NULL); 141 object_unparent(OBJECT(dev)); 142 } 143 break; 144 case ACPI_CPU_CMD_OFFSET_WR: 145 trace_cpuhp_acpi_write_cmd(cpu_st->selector, data); 146 if (data < CPHP_CMD_MAX) { 147 cpu_st->command = data; 148 if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) { 149 uint32_t iter = cpu_st->selector; 150 151 do { 152 cdev = &cpu_st->devs[iter]; 153 if (cdev->is_inserting || cdev->is_removing) { 154 cpu_st->selector = iter; 155 trace_cpuhp_acpi_cpu_has_events(cpu_st->selector, 156 cdev->is_inserting, cdev->is_removing); 157 break; 158 } 159 iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0; 160 } while (iter != cpu_st->selector); 161 } 162 } 163 break; 164 case ACPI_CPU_CMD_DATA_OFFSET_RW: 165 switch (cpu_st->command) { 166 case CPHP_OST_EVENT_CMD: { 167 cdev = &cpu_st->devs[cpu_st->selector]; 168 cdev->ost_event = data; 169 trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event); 170 break; 171 } 172 case CPHP_OST_STATUS_CMD: { 173 cdev = &cpu_st->devs[cpu_st->selector]; 174 cdev->ost_status = data; 175 info = acpi_cpu_device_status(cpu_st->selector, cdev); 176 qapi_event_send_acpi_device_ost(info); 177 qapi_free_ACPIOSTInfo(info); 178 trace_cpuhp_acpi_write_ost_status(cpu_st->selector, 179 cdev->ost_status); 180 break; 181 } 182 default: 183 break; 184 } 185 break; 186 default: 187 break; 188 } 189 } 190 191 static const MemoryRegionOps cpu_hotplug_ops = { 192 .read = cpu_hotplug_rd, 193 .write = cpu_hotplug_wr, 194 .endianness = DEVICE_LITTLE_ENDIAN, 195 .valid = { 196 .min_access_size = 1, 197 .max_access_size = 4, 198 }, 199 }; 200 201 void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, 202 CPUHotplugState *state, hwaddr base_addr) 203 { 204 MachineState *machine = MACHINE(qdev_get_machine()); 205 MachineClass *mc = MACHINE_GET_CLASS(machine); 206 const CPUArchIdList *id_list; 207 int i; 208 209 assert(mc->possible_cpu_arch_ids); 210 id_list = mc->possible_cpu_arch_ids(machine); 211 state->dev_count = id_list->len; 212 state->devs = g_new0(typeof(*state->devs), state->dev_count); 213 for (i = 0; i < id_list->len; i++) { 214 state->devs[i].cpu = CPU(id_list->cpus[i].cpu); 215 state->devs[i].arch_id = id_list->cpus[i].arch_id; 216 } 217 memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state, 218 "acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN); 219 memory_region_add_subregion(as, base_addr, &state->ctrl_reg); 220 } 221 222 static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev) 223 { 224 CPUClass *k = CPU_GET_CLASS(dev); 225 uint64_t cpu_arch_id = k->get_arch_id(CPU(dev)); 226 int i; 227 228 for (i = 0; i < cpu_st->dev_count; i++) { 229 if (cpu_arch_id == cpu_st->devs[i].arch_id) { 230 return &cpu_st->devs[i]; 231 } 232 } 233 return NULL; 234 } 235 236 void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev, 237 CPUHotplugState *cpu_st, DeviceState *dev, Error **errp) 238 { 239 AcpiCpuStatus *cdev; 240 241 cdev = get_cpu_status(cpu_st, dev); 242 if (!cdev) { 243 return; 244 } 245 246 cdev->cpu = CPU(dev); 247 if (dev->hotplugged) { 248 cdev->is_inserting = true; 249 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 250 } 251 } 252 253 void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 254 CPUHotplugState *cpu_st, 255 DeviceState *dev, Error **errp) 256 { 257 AcpiCpuStatus *cdev; 258 259 cdev = get_cpu_status(cpu_st, dev); 260 if (!cdev) { 261 return; 262 } 263 264 cdev->is_removing = true; 265 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 266 } 267 268 void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st, 269 DeviceState *dev, Error **errp) 270 { 271 AcpiCpuStatus *cdev; 272 273 cdev = get_cpu_status(cpu_st, dev); 274 if (!cdev) { 275 return; 276 } 277 278 cdev->cpu = NULL; 279 } 280 281 static const VMStateDescription vmstate_cpuhp_sts = { 282 .name = "CPU hotplug device state", 283 .version_id = 1, 284 .minimum_version_id = 1, 285 .minimum_version_id_old = 1, 286 .fields = (VMStateField[]) { 287 VMSTATE_BOOL(is_inserting, AcpiCpuStatus), 288 VMSTATE_BOOL(is_removing, AcpiCpuStatus), 289 VMSTATE_UINT32(ost_event, AcpiCpuStatus), 290 VMSTATE_UINT32(ost_status, AcpiCpuStatus), 291 VMSTATE_END_OF_LIST() 292 } 293 }; 294 295 const VMStateDescription vmstate_cpu_hotplug = { 296 .name = "CPU hotplug state", 297 .version_id = 1, 298 .minimum_version_id = 1, 299 .minimum_version_id_old = 1, 300 .fields = (VMStateField[]) { 301 VMSTATE_UINT32(selector, CPUHotplugState), 302 VMSTATE_UINT8(command, CPUHotplugState), 303 VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count, 304 vmstate_cpuhp_sts, AcpiCpuStatus), 305 VMSTATE_END_OF_LIST() 306 } 307 }; 308 309 #define CPU_NAME_FMT "C%.03X" 310 #define CPUHP_RES_DEVICE "PRES" 311 #define CPU_LOCK "CPLK" 312 #define CPU_STS_METHOD "CSTA" 313 #define CPU_SCAN_METHOD "CSCN" 314 #define CPU_NOTIFY_METHOD "CTFY" 315 #define CPU_EJECT_METHOD "CEJ0" 316 #define CPU_OST_METHOD "COST" 317 318 #define CPU_ENABLED "CPEN" 319 #define CPU_SELECTOR "CSEL" 320 #define CPU_COMMAND "CCMD" 321 #define CPU_DATA "CDAT" 322 #define CPU_INSERT_EVENT "CINS" 323 #define CPU_REMOVE_EVENT "CRMV" 324 #define CPU_EJECT_EVENT "CEJ0" 325 326 void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, 327 hwaddr io_base, 328 const char *res_root, 329 const char *event_handler_method) 330 { 331 Aml *ifctx; 332 Aml *field; 333 Aml *method; 334 Aml *cpu_ctrl_dev; 335 Aml *cpus_dev; 336 Aml *zero = aml_int(0); 337 Aml *one = aml_int(1); 338 Aml *sb_scope = aml_scope("_SB"); 339 MachineClass *mc = MACHINE_GET_CLASS(machine); 340 const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine); 341 char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root); 342 Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL); 343 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj); 344 AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj); 345 346 cpu_ctrl_dev = aml_device("%s", cphp_res_path); 347 { 348 Aml *crs; 349 350 aml_append(cpu_ctrl_dev, 351 aml_name_decl("_HID", aml_eisaid("PNP0A06"))); 352 aml_append(cpu_ctrl_dev, 353 aml_name_decl("_UID", aml_string("CPU Hotplug resources"))); 354 aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0)); 355 356 crs = aml_resource_template(); 357 aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1, 358 ACPI_CPU_HOTPLUG_REG_LEN)); 359 aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs)); 360 361 /* declare CPU hotplug MMIO region with related access fields */ 362 aml_append(cpu_ctrl_dev, 363 aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base), 364 ACPI_CPU_HOTPLUG_REG_LEN)); 365 366 field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, 367 AML_WRITE_AS_ZEROS); 368 aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8)); 369 /* 1 if enabled, read only */ 370 aml_append(field, aml_named_field(CPU_ENABLED, 1)); 371 /* (read) 1 if has a insert event. (write) 1 to clear event */ 372 aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1)); 373 /* (read) 1 if has a remove event. (write) 1 to clear event */ 374 aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1)); 375 /* initiates device eject, write only */ 376 aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1)); 377 aml_append(field, aml_reserved_field(4)); 378 aml_append(field, aml_named_field(CPU_COMMAND, 8)); 379 aml_append(cpu_ctrl_dev, field); 380 381 field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); 382 /* CPU selector, write only */ 383 aml_append(field, aml_named_field(CPU_SELECTOR, 32)); 384 /* flags + cmd + 2byte align */ 385 aml_append(field, aml_reserved_field(4 * 8)); 386 aml_append(field, aml_named_field(CPU_DATA, 32)); 387 aml_append(cpu_ctrl_dev, field); 388 389 if (opts.has_legacy_cphp) { 390 method = aml_method("_INI", 0, AML_SERIALIZED); 391 /* switch off legacy CPU hotplug HW and use new one, 392 * on reboot system is in new mode and writing 0 393 * in CPU_SELECTOR selects BSP, which is NOP at 394 * the time _INI is called */ 395 aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR))); 396 aml_append(cpu_ctrl_dev, method); 397 } 398 } 399 aml_append(sb_scope, cpu_ctrl_dev); 400 401 cpus_dev = aml_device("\\_SB.CPUS"); 402 { 403 int i; 404 Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK); 405 Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR); 406 Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED); 407 Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND); 408 Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA); 409 Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT); 410 Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT); 411 Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT); 412 413 aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010"))); 414 aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05"))); 415 416 method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); 417 for (i = 0; i < arch_ids->len; i++) { 418 Aml *cpu = aml_name(CPU_NAME_FMT, i); 419 Aml *uid = aml_arg(0); 420 Aml *event = aml_arg(1); 421 422 ifctx = aml_if(aml_equal(uid, aml_int(i))); 423 { 424 aml_append(ifctx, aml_notify(cpu, event)); 425 } 426 aml_append(method, ifctx); 427 } 428 aml_append(cpus_dev, method); 429 430 method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED); 431 { 432 Aml *idx = aml_arg(0); 433 Aml *sta = aml_local(0); 434 435 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 436 aml_append(method, aml_store(idx, cpu_selector)); 437 aml_append(method, aml_store(zero, sta)); 438 ifctx = aml_if(aml_equal(is_enabled, one)); 439 { 440 aml_append(ifctx, aml_store(aml_int(0xF), sta)); 441 } 442 aml_append(method, ifctx); 443 aml_append(method, aml_release(ctrl_lock)); 444 aml_append(method, aml_return(sta)); 445 } 446 aml_append(cpus_dev, method); 447 448 method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED); 449 { 450 Aml *idx = aml_arg(0); 451 452 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 453 aml_append(method, aml_store(idx, cpu_selector)); 454 aml_append(method, aml_store(one, ej_evt)); 455 aml_append(method, aml_release(ctrl_lock)); 456 } 457 aml_append(cpus_dev, method); 458 459 method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED); 460 { 461 Aml *else_ctx; 462 Aml *while_ctx; 463 Aml *has_event = aml_local(0); 464 Aml *dev_chk = aml_int(1); 465 Aml *eject_req = aml_int(3); 466 Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD); 467 468 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 469 aml_append(method, aml_store(one, has_event)); 470 while_ctx = aml_while(aml_equal(has_event, one)); 471 { 472 /* clear loop exit condition, ins_evt/rm_evt checks 473 * will set it to 1 while next_cpu_cmd returns a CPU 474 * with events */ 475 aml_append(while_ctx, aml_store(zero, has_event)); 476 aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd)); 477 ifctx = aml_if(aml_equal(ins_evt, one)); 478 { 479 aml_append(ifctx, 480 aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk)); 481 aml_append(ifctx, aml_store(one, ins_evt)); 482 aml_append(ifctx, aml_store(one, has_event)); 483 } 484 aml_append(while_ctx, ifctx); 485 else_ctx = aml_else(); 486 ifctx = aml_if(aml_equal(rm_evt, one)); 487 { 488 aml_append(ifctx, 489 aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req)); 490 aml_append(ifctx, aml_store(one, rm_evt)); 491 aml_append(ifctx, aml_store(one, has_event)); 492 } 493 aml_append(else_ctx, ifctx); 494 aml_append(while_ctx, else_ctx); 495 } 496 aml_append(method, while_ctx); 497 aml_append(method, aml_release(ctrl_lock)); 498 } 499 aml_append(cpus_dev, method); 500 501 method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED); 502 { 503 Aml *uid = aml_arg(0); 504 Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD); 505 Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD); 506 507 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 508 aml_append(method, aml_store(uid, cpu_selector)); 509 aml_append(method, aml_store(ev_cmd, cpu_cmd)); 510 aml_append(method, aml_store(aml_arg(1), cpu_data)); 511 aml_append(method, aml_store(st_cmd, cpu_cmd)); 512 aml_append(method, aml_store(aml_arg(2), cpu_data)); 513 aml_append(method, aml_release(ctrl_lock)); 514 } 515 aml_append(cpus_dev, method); 516 517 /* build Processor object for each processor */ 518 for (i = 0; i < arch_ids->len; i++) { 519 Aml *dev; 520 Aml *uid = aml_int(i); 521 GArray *madt_buf = g_array_new(0, 1, 1); 522 int arch_id = arch_ids->cpus[i].arch_id; 523 524 if (opts.acpi_1_compatible && arch_id < 255) { 525 dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i); 526 } else { 527 dev = aml_device(CPU_NAME_FMT, i); 528 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007"))); 529 aml_append(dev, aml_name_decl("_UID", uid)); 530 } 531 532 method = aml_method("_STA", 0, AML_SERIALIZED); 533 aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid))); 534 aml_append(dev, method); 535 536 /* build _MAT object */ 537 assert(adevc && adevc->madt_cpu); 538 adevc->madt_cpu(adev, i, arch_ids, madt_buf); 539 switch (madt_buf->data[0]) { 540 case ACPI_APIC_PROCESSOR: { 541 AcpiMadtProcessorApic *apic = (void *)madt_buf->data; 542 apic->flags = cpu_to_le32(1); 543 break; 544 } 545 case ACPI_APIC_LOCAL_X2APIC: { 546 AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data; 547 apic->flags = cpu_to_le32(1); 548 break; 549 } 550 default: 551 assert(0); 552 } 553 aml_append(dev, aml_name_decl("_MAT", 554 aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data))); 555 g_array_free(madt_buf, true); 556 557 if (CPU(arch_ids->cpus[i].cpu) != first_cpu) { 558 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); 559 aml_append(method, aml_call1(CPU_EJECT_METHOD, uid)); 560 aml_append(dev, method); 561 } 562 563 method = aml_method("_OST", 3, AML_SERIALIZED); 564 aml_append(method, 565 aml_call4(CPU_OST_METHOD, uid, aml_arg(0), 566 aml_arg(1), aml_arg(2)) 567 ); 568 aml_append(dev, method); 569 570 /* Linux guests discard SRAT info for non-present CPUs 571 * as a result _PXM is required for all CPUs which might 572 * be hot-plugged. For simplicity, add it for all CPUs. 573 */ 574 if (arch_ids->cpus[i].props.has_node_id) { 575 aml_append(dev, aml_name_decl("_PXM", 576 aml_int(arch_ids->cpus[i].props.node_id))); 577 } 578 579 aml_append(cpus_dev, dev); 580 } 581 } 582 aml_append(sb_scope, cpus_dev); 583 aml_append(table, sb_scope); 584 585 method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED); 586 aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD)); 587 aml_append(table, method); 588 589 g_free(cphp_res_path); 590 } 591