1 #include "qemu/osdep.h" 2 #include "hw/boards.h" 3 #include "hw/acpi/cpu.h" 4 #include "qapi/error.h" 5 #include "qapi/qapi-events-misc.h" 6 #include "trace.h" 7 #include "sysemu/numa.h" 8 9 #define ACPI_CPU_HOTPLUG_REG_LEN 12 10 #define ACPI_CPU_SELECTOR_OFFSET_WR 0 11 #define ACPI_CPU_FLAGS_OFFSET_RW 4 12 #define ACPI_CPU_CMD_OFFSET_WR 5 13 #define ACPI_CPU_CMD_DATA_OFFSET_RW 8 14 15 enum { 16 CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0, 17 CPHP_OST_EVENT_CMD = 1, 18 CPHP_OST_STATUS_CMD = 2, 19 CPHP_CMD_MAX 20 }; 21 22 static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev) 23 { 24 ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1); 25 26 info->slot_type = ACPI_SLOT_TYPE_CPU; 27 info->slot = g_strdup_printf("%d", idx); 28 info->source = cdev->ost_event; 29 info->status = cdev->ost_status; 30 if (cdev->cpu) { 31 DeviceState *dev = DEVICE(cdev->cpu); 32 if (dev->id) { 33 info->device = g_strdup(dev->id); 34 info->has_device = true; 35 } 36 } 37 return info; 38 } 39 40 void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list) 41 { 42 int i; 43 44 for (i = 0; i < cpu_st->dev_count; i++) { 45 ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1); 46 elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]); 47 elem->next = NULL; 48 **list = elem; 49 *list = &elem->next; 50 } 51 } 52 53 static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size) 54 { 55 uint64_t val = 0; 56 CPUHotplugState *cpu_st = opaque; 57 AcpiCpuStatus *cdev; 58 59 if (cpu_st->selector >= cpu_st->dev_count) { 60 return val; 61 } 62 63 cdev = &cpu_st->devs[cpu_st->selector]; 64 switch (addr) { 65 case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */ 66 val |= cdev->cpu ? 1 : 0; 67 val |= cdev->is_inserting ? 2 : 0; 68 val |= cdev->is_removing ? 4 : 0; 69 trace_cpuhp_acpi_read_flags(cpu_st->selector, val); 70 break; 71 case ACPI_CPU_CMD_DATA_OFFSET_RW: 72 switch (cpu_st->command) { 73 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD: 74 val = cpu_st->selector; 75 break; 76 default: 77 break; 78 } 79 trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val); 80 break; 81 default: 82 break; 83 } 84 return val; 85 } 86 87 static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data, 88 unsigned int size) 89 { 90 CPUHotplugState *cpu_st = opaque; 91 AcpiCpuStatus *cdev; 92 ACPIOSTInfo *info; 93 94 assert(cpu_st->dev_count); 95 96 if (addr) { 97 if (cpu_st->selector >= cpu_st->dev_count) { 98 trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector); 99 return; 100 } 101 } 102 103 switch (addr) { 104 case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */ 105 cpu_st->selector = data; 106 trace_cpuhp_acpi_write_idx(cpu_st->selector); 107 break; 108 case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */ 109 cdev = &cpu_st->devs[cpu_st->selector]; 110 if (data & 2) { /* clear insert event */ 111 cdev->is_inserting = false; 112 trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector); 113 } else if (data & 4) { /* clear remove event */ 114 cdev->is_removing = false; 115 trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector); 116 } else if (data & 8) { 117 DeviceState *dev = NULL; 118 HotplugHandler *hotplug_ctrl = NULL; 119 120 if (!cdev->cpu || cdev->cpu == first_cpu) { 121 trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector); 122 break; 123 } 124 125 trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector); 126 dev = DEVICE(cdev->cpu); 127 hotplug_ctrl = qdev_get_hotplug_handler(dev); 128 hotplug_handler_unplug(hotplug_ctrl, dev, NULL); 129 object_unparent(OBJECT(dev)); 130 } 131 break; 132 case ACPI_CPU_CMD_OFFSET_WR: 133 trace_cpuhp_acpi_write_cmd(cpu_st->selector, data); 134 if (data < CPHP_CMD_MAX) { 135 cpu_st->command = data; 136 if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) { 137 uint32_t iter = cpu_st->selector; 138 139 do { 140 cdev = &cpu_st->devs[iter]; 141 if (cdev->is_inserting || cdev->is_removing) { 142 cpu_st->selector = iter; 143 trace_cpuhp_acpi_cpu_has_events(cpu_st->selector, 144 cdev->is_inserting, cdev->is_removing); 145 break; 146 } 147 iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0; 148 } while (iter != cpu_st->selector); 149 } 150 } 151 break; 152 case ACPI_CPU_CMD_DATA_OFFSET_RW: 153 switch (cpu_st->command) { 154 case CPHP_OST_EVENT_CMD: { 155 cdev = &cpu_st->devs[cpu_st->selector]; 156 cdev->ost_event = data; 157 trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event); 158 break; 159 } 160 case CPHP_OST_STATUS_CMD: { 161 cdev = &cpu_st->devs[cpu_st->selector]; 162 cdev->ost_status = data; 163 info = acpi_cpu_device_status(cpu_st->selector, cdev); 164 qapi_event_send_acpi_device_ost(info); 165 qapi_free_ACPIOSTInfo(info); 166 trace_cpuhp_acpi_write_ost_status(cpu_st->selector, 167 cdev->ost_status); 168 break; 169 } 170 default: 171 break; 172 } 173 break; 174 default: 175 break; 176 } 177 } 178 179 static const MemoryRegionOps cpu_hotplug_ops = { 180 .read = cpu_hotplug_rd, 181 .write = cpu_hotplug_wr, 182 .endianness = DEVICE_LITTLE_ENDIAN, 183 .valid = { 184 .min_access_size = 1, 185 .max_access_size = 4, 186 }, 187 }; 188 189 void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, 190 CPUHotplugState *state, hwaddr base_addr) 191 { 192 MachineState *machine = MACHINE(qdev_get_machine()); 193 MachineClass *mc = MACHINE_GET_CLASS(machine); 194 const CPUArchIdList *id_list; 195 int i; 196 197 assert(mc->possible_cpu_arch_ids); 198 id_list = mc->possible_cpu_arch_ids(machine); 199 state->dev_count = id_list->len; 200 state->devs = g_new0(typeof(*state->devs), state->dev_count); 201 for (i = 0; i < id_list->len; i++) { 202 state->devs[i].cpu = CPU(id_list->cpus[i].cpu); 203 state->devs[i].arch_id = id_list->cpus[i].arch_id; 204 } 205 memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state, 206 "acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN); 207 memory_region_add_subregion(as, base_addr, &state->ctrl_reg); 208 } 209 210 static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev) 211 { 212 CPUClass *k = CPU_GET_CLASS(dev); 213 uint64_t cpu_arch_id = k->get_arch_id(CPU(dev)); 214 int i; 215 216 for (i = 0; i < cpu_st->dev_count; i++) { 217 if (cpu_arch_id == cpu_st->devs[i].arch_id) { 218 return &cpu_st->devs[i]; 219 } 220 } 221 return NULL; 222 } 223 224 void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev, 225 CPUHotplugState *cpu_st, DeviceState *dev, Error **errp) 226 { 227 AcpiCpuStatus *cdev; 228 229 cdev = get_cpu_status(cpu_st, dev); 230 if (!cdev) { 231 return; 232 } 233 234 cdev->cpu = CPU(dev); 235 if (dev->hotplugged) { 236 cdev->is_inserting = true; 237 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 238 } 239 } 240 241 void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 242 CPUHotplugState *cpu_st, 243 DeviceState *dev, Error **errp) 244 { 245 AcpiCpuStatus *cdev; 246 247 cdev = get_cpu_status(cpu_st, dev); 248 if (!cdev) { 249 return; 250 } 251 252 cdev->is_removing = true; 253 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 254 } 255 256 void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st, 257 DeviceState *dev, Error **errp) 258 { 259 AcpiCpuStatus *cdev; 260 261 cdev = get_cpu_status(cpu_st, dev); 262 if (!cdev) { 263 return; 264 } 265 266 cdev->cpu = NULL; 267 } 268 269 static const VMStateDescription vmstate_cpuhp_sts = { 270 .name = "CPU hotplug device state", 271 .version_id = 1, 272 .minimum_version_id = 1, 273 .minimum_version_id_old = 1, 274 .fields = (VMStateField[]) { 275 VMSTATE_BOOL(is_inserting, AcpiCpuStatus), 276 VMSTATE_BOOL(is_removing, AcpiCpuStatus), 277 VMSTATE_UINT32(ost_event, AcpiCpuStatus), 278 VMSTATE_UINT32(ost_status, AcpiCpuStatus), 279 VMSTATE_END_OF_LIST() 280 } 281 }; 282 283 const VMStateDescription vmstate_cpu_hotplug = { 284 .name = "CPU hotplug state", 285 .version_id = 1, 286 .minimum_version_id = 1, 287 .minimum_version_id_old = 1, 288 .fields = (VMStateField[]) { 289 VMSTATE_UINT32(selector, CPUHotplugState), 290 VMSTATE_UINT8(command, CPUHotplugState), 291 VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count, 292 vmstate_cpuhp_sts, AcpiCpuStatus), 293 VMSTATE_END_OF_LIST() 294 } 295 }; 296 297 #define CPU_NAME_FMT "C%.03X" 298 #define CPUHP_RES_DEVICE "PRES" 299 #define CPU_LOCK "CPLK" 300 #define CPU_STS_METHOD "CSTA" 301 #define CPU_SCAN_METHOD "CSCN" 302 #define CPU_NOTIFY_METHOD "CTFY" 303 #define CPU_EJECT_METHOD "CEJ0" 304 #define CPU_OST_METHOD "COST" 305 306 #define CPU_ENABLED "CPEN" 307 #define CPU_SELECTOR "CSEL" 308 #define CPU_COMMAND "CCMD" 309 #define CPU_DATA "CDAT" 310 #define CPU_INSERT_EVENT "CINS" 311 #define CPU_REMOVE_EVENT "CRMV" 312 #define CPU_EJECT_EVENT "CEJ0" 313 314 void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, 315 hwaddr io_base, 316 const char *res_root, 317 const char *event_handler_method) 318 { 319 Aml *ifctx; 320 Aml *field; 321 Aml *method; 322 Aml *cpu_ctrl_dev; 323 Aml *cpus_dev; 324 Aml *zero = aml_int(0); 325 Aml *one = aml_int(1); 326 Aml *sb_scope = aml_scope("_SB"); 327 MachineClass *mc = MACHINE_GET_CLASS(machine); 328 const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine); 329 char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root); 330 Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL); 331 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj); 332 AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj); 333 334 cpu_ctrl_dev = aml_device("%s", cphp_res_path); 335 { 336 Aml *crs; 337 338 aml_append(cpu_ctrl_dev, 339 aml_name_decl("_HID", aml_eisaid("PNP0A06"))); 340 aml_append(cpu_ctrl_dev, 341 aml_name_decl("_UID", aml_string("CPU Hotplug resources"))); 342 aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0)); 343 344 crs = aml_resource_template(); 345 aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1, 346 ACPI_CPU_HOTPLUG_REG_LEN)); 347 aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs)); 348 349 /* declare CPU hotplug MMIO region with related access fields */ 350 aml_append(cpu_ctrl_dev, 351 aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base), 352 ACPI_CPU_HOTPLUG_REG_LEN)); 353 354 field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, 355 AML_WRITE_AS_ZEROS); 356 aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8)); 357 /* 1 if enabled, read only */ 358 aml_append(field, aml_named_field(CPU_ENABLED, 1)); 359 /* (read) 1 if has a insert event. (write) 1 to clear event */ 360 aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1)); 361 /* (read) 1 if has a remove event. (write) 1 to clear event */ 362 aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1)); 363 /* initiates device eject, write only */ 364 aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1)); 365 aml_append(field, aml_reserved_field(4)); 366 aml_append(field, aml_named_field(CPU_COMMAND, 8)); 367 aml_append(cpu_ctrl_dev, field); 368 369 field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); 370 /* CPU selector, write only */ 371 aml_append(field, aml_named_field(CPU_SELECTOR, 32)); 372 /* flags + cmd + 2byte align */ 373 aml_append(field, aml_reserved_field(4 * 8)); 374 aml_append(field, aml_named_field(CPU_DATA, 32)); 375 aml_append(cpu_ctrl_dev, field); 376 377 if (opts.has_legacy_cphp) { 378 method = aml_method("_INI", 0, AML_SERIALIZED); 379 /* switch off legacy CPU hotplug HW and use new one, 380 * on reboot system is in new mode and writing 0 381 * in CPU_SELECTOR selects BSP, which is NOP at 382 * the time _INI is called */ 383 aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR))); 384 aml_append(cpu_ctrl_dev, method); 385 } 386 } 387 aml_append(sb_scope, cpu_ctrl_dev); 388 389 cpus_dev = aml_device("\\_SB.CPUS"); 390 { 391 int i; 392 Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK); 393 Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR); 394 Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED); 395 Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND); 396 Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA); 397 Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT); 398 Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT); 399 Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT); 400 401 aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010"))); 402 aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05"))); 403 404 method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); 405 for (i = 0; i < arch_ids->len; i++) { 406 Aml *cpu = aml_name(CPU_NAME_FMT, i); 407 Aml *uid = aml_arg(0); 408 Aml *event = aml_arg(1); 409 410 ifctx = aml_if(aml_equal(uid, aml_int(i))); 411 { 412 aml_append(ifctx, aml_notify(cpu, event)); 413 } 414 aml_append(method, ifctx); 415 } 416 aml_append(cpus_dev, method); 417 418 method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED); 419 { 420 Aml *idx = aml_arg(0); 421 Aml *sta = aml_local(0); 422 423 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 424 aml_append(method, aml_store(idx, cpu_selector)); 425 aml_append(method, aml_store(zero, sta)); 426 ifctx = aml_if(aml_equal(is_enabled, one)); 427 { 428 aml_append(ifctx, aml_store(aml_int(0xF), sta)); 429 } 430 aml_append(method, ifctx); 431 aml_append(method, aml_release(ctrl_lock)); 432 aml_append(method, aml_return(sta)); 433 } 434 aml_append(cpus_dev, method); 435 436 method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED); 437 { 438 Aml *idx = aml_arg(0); 439 440 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 441 aml_append(method, aml_store(idx, cpu_selector)); 442 aml_append(method, aml_store(one, ej_evt)); 443 aml_append(method, aml_release(ctrl_lock)); 444 } 445 aml_append(cpus_dev, method); 446 447 method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED); 448 { 449 Aml *else_ctx; 450 Aml *while_ctx; 451 Aml *has_event = aml_local(0); 452 Aml *dev_chk = aml_int(1); 453 Aml *eject_req = aml_int(3); 454 Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD); 455 456 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 457 aml_append(method, aml_store(one, has_event)); 458 while_ctx = aml_while(aml_equal(has_event, one)); 459 { 460 /* clear loop exit condition, ins_evt/rm_evt checks 461 * will set it to 1 while next_cpu_cmd returns a CPU 462 * with events */ 463 aml_append(while_ctx, aml_store(zero, has_event)); 464 aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd)); 465 ifctx = aml_if(aml_equal(ins_evt, one)); 466 { 467 aml_append(ifctx, 468 aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk)); 469 aml_append(ifctx, aml_store(one, ins_evt)); 470 aml_append(ifctx, aml_store(one, has_event)); 471 } 472 aml_append(while_ctx, ifctx); 473 else_ctx = aml_else(); 474 ifctx = aml_if(aml_equal(rm_evt, one)); 475 { 476 aml_append(ifctx, 477 aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req)); 478 aml_append(ifctx, aml_store(one, rm_evt)); 479 aml_append(ifctx, aml_store(one, has_event)); 480 } 481 aml_append(else_ctx, ifctx); 482 aml_append(while_ctx, else_ctx); 483 } 484 aml_append(method, while_ctx); 485 aml_append(method, aml_release(ctrl_lock)); 486 } 487 aml_append(cpus_dev, method); 488 489 method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED); 490 { 491 Aml *uid = aml_arg(0); 492 Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD); 493 Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD); 494 495 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 496 aml_append(method, aml_store(uid, cpu_selector)); 497 aml_append(method, aml_store(ev_cmd, cpu_cmd)); 498 aml_append(method, aml_store(aml_arg(1), cpu_data)); 499 aml_append(method, aml_store(st_cmd, cpu_cmd)); 500 aml_append(method, aml_store(aml_arg(2), cpu_data)); 501 aml_append(method, aml_release(ctrl_lock)); 502 } 503 aml_append(cpus_dev, method); 504 505 /* build Processor object for each processor */ 506 for (i = 0; i < arch_ids->len; i++) { 507 Aml *dev; 508 Aml *uid = aml_int(i); 509 GArray *madt_buf = g_array_new(0, 1, 1); 510 int arch_id = arch_ids->cpus[i].arch_id; 511 512 if (opts.acpi_1_compatible && arch_id < 255) { 513 dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i); 514 } else { 515 dev = aml_device(CPU_NAME_FMT, i); 516 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007"))); 517 aml_append(dev, aml_name_decl("_UID", uid)); 518 } 519 520 method = aml_method("_STA", 0, AML_SERIALIZED); 521 aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid))); 522 aml_append(dev, method); 523 524 /* build _MAT object */ 525 assert(adevc && adevc->madt_cpu); 526 adevc->madt_cpu(adev, i, arch_ids, madt_buf); 527 switch (madt_buf->data[0]) { 528 case ACPI_APIC_PROCESSOR: { 529 AcpiMadtProcessorApic *apic = (void *)madt_buf->data; 530 apic->flags = cpu_to_le32(1); 531 break; 532 } 533 case ACPI_APIC_LOCAL_X2APIC: { 534 AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data; 535 apic->flags = cpu_to_le32(1); 536 break; 537 } 538 default: 539 assert(0); 540 } 541 aml_append(dev, aml_name_decl("_MAT", 542 aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data))); 543 g_array_free(madt_buf, true); 544 545 if (CPU(arch_ids->cpus[i].cpu) != first_cpu) { 546 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); 547 aml_append(method, aml_call1(CPU_EJECT_METHOD, uid)); 548 aml_append(dev, method); 549 } 550 551 method = aml_method("_OST", 3, AML_SERIALIZED); 552 aml_append(method, 553 aml_call4(CPU_OST_METHOD, uid, aml_arg(0), 554 aml_arg(1), aml_arg(2)) 555 ); 556 aml_append(dev, method); 557 558 /* Linux guests discard SRAT info for non-present CPUs 559 * as a result _PXM is required for all CPUs which might 560 * be hot-plugged. For simplicity, add it for all CPUs. 561 */ 562 if (arch_ids->cpus[i].props.has_node_id) { 563 aml_append(dev, aml_name_decl("_PXM", 564 aml_int(arch_ids->cpus[i].props.node_id))); 565 } 566 567 aml_append(cpus_dev, dev); 568 } 569 } 570 aml_append(sb_scope, cpus_dev); 571 aml_append(table, sb_scope); 572 573 method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED); 574 aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD)); 575 aml_append(table, method); 576 577 g_free(cphp_res_path); 578 } 579