1 #include "qemu/osdep.h" 2 #include "migration/vmstate.h" 3 #include "hw/acpi/cpu.h" 4 #include "hw/core/cpu.h" 5 #include "qapi/error.h" 6 #include "qapi/qapi-events-acpi.h" 7 #include "trace.h" 8 #include "sysemu/numa.h" 9 10 #define ACPI_CPU_SELECTOR_OFFSET_WR 0 11 #define ACPI_CPU_FLAGS_OFFSET_RW 4 12 #define ACPI_CPU_CMD_OFFSET_WR 5 13 #define ACPI_CPU_CMD_DATA_OFFSET_RW 8 14 #define ACPI_CPU_CMD_DATA2_OFFSET_R 0 15 16 #define OVMF_CPUHP_SMI_CMD 4 17 18 enum { 19 CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0, 20 CPHP_OST_EVENT_CMD = 1, 21 CPHP_OST_STATUS_CMD = 2, 22 CPHP_GET_CPU_ID_CMD = 3, 23 CPHP_CMD_MAX 24 }; 25 26 static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev) 27 { 28 ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1); 29 30 info->slot_type = ACPI_SLOT_TYPE_CPU; 31 info->slot = g_strdup_printf("%d", idx); 32 info->source = cdev->ost_event; 33 info->status = cdev->ost_status; 34 if (cdev->cpu) { 35 DeviceState *dev = DEVICE(cdev->cpu); 36 if (dev->id) { 37 info->device = g_strdup(dev->id); 38 } 39 } 40 return info; 41 } 42 43 void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list) 44 { 45 ACPIOSTInfoList ***tail = list; 46 int i; 47 48 for (i = 0; i < cpu_st->dev_count; i++) { 49 QAPI_LIST_APPEND(*tail, acpi_cpu_device_status(i, &cpu_st->devs[i])); 50 } 51 } 52 53 static bool check_cpu_enabled_status(DeviceState *dev) 54 { 55 CPUClass *k = dev ? CPU_GET_CLASS(dev) : NULL; 56 CPUState *cpu = CPU(dev); 57 58 if (cpu && (!k->cpu_enabled_status || k->cpu_enabled_status(cpu))) { 59 return true; 60 } 61 62 return false; 63 } 64 65 static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size) 66 { 67 uint64_t val = 0; 68 CPUHotplugState *cpu_st = opaque; 69 AcpiCpuStatus *cdev; 70 71 if (cpu_st->selector >= cpu_st->dev_count) { 72 return val; 73 } 74 75 cdev = &cpu_st->devs[cpu_st->selector]; 76 switch (addr) { 77 case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */ 78 val |= check_cpu_enabled_status(DEVICE(cdev->cpu)) ? 1 : 0; 79 val |= cdev->is_inserting ? 2 : 0; 80 val |= cdev->is_removing ? 4 : 0; 81 val |= cdev->fw_remove ? 16 : 0; 82 val |= cdev->cpu ? 32 : 0; 83 trace_cpuhp_acpi_read_flags(cpu_st->selector, val); 84 break; 85 case ACPI_CPU_CMD_DATA_OFFSET_RW: 86 switch (cpu_st->command) { 87 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD: 88 val = cpu_st->selector; 89 break; 90 case CPHP_GET_CPU_ID_CMD: 91 val = cdev->arch_id & 0xFFFFFFFF; 92 break; 93 default: 94 break; 95 } 96 trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val); 97 break; 98 case ACPI_CPU_CMD_DATA2_OFFSET_R: 99 switch (cpu_st->command) { 100 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD: 101 val = 0; 102 break; 103 case CPHP_GET_CPU_ID_CMD: 104 val = cdev->arch_id >> 32; 105 break; 106 default: 107 break; 108 } 109 trace_cpuhp_acpi_read_cmd_data2(cpu_st->selector, val); 110 break; 111 default: 112 break; 113 } 114 return val; 115 } 116 117 static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data, 118 unsigned int size) 119 { 120 CPUHotplugState *cpu_st = opaque; 121 AcpiCpuStatus *cdev; 122 ACPIOSTInfo *info; 123 124 assert(cpu_st->dev_count); 125 126 if (addr) { 127 if (cpu_st->selector >= cpu_st->dev_count) { 128 trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector); 129 return; 130 } 131 } 132 133 switch (addr) { 134 case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */ 135 cpu_st->selector = data; 136 trace_cpuhp_acpi_write_idx(cpu_st->selector); 137 break; 138 case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */ 139 cdev = &cpu_st->devs[cpu_st->selector]; 140 if (data & 2) { /* clear insert event */ 141 cdev->is_inserting = false; 142 trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector); 143 } else if (data & 4) { /* clear remove event */ 144 cdev->is_removing = false; 145 trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector); 146 } else if (data & 8) { 147 DeviceState *dev = NULL; 148 HotplugHandler *hotplug_ctrl = NULL; 149 150 if (!cdev->cpu || cdev->cpu == first_cpu) { 151 trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector); 152 break; 153 } 154 155 trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector); 156 dev = DEVICE(cdev->cpu); 157 hotplug_ctrl = qdev_get_hotplug_handler(dev); 158 hotplug_handler_unplug(hotplug_ctrl, dev, NULL); 159 object_unparent(OBJECT(dev)); 160 cdev->fw_remove = false; 161 } else if (data & 16) { 162 if (!cdev->cpu || cdev->cpu == first_cpu) { 163 trace_cpuhp_acpi_fw_remove_invalid_cpu(cpu_st->selector); 164 break; 165 } 166 trace_cpuhp_acpi_fw_remove_cpu(cpu_st->selector); 167 cdev->fw_remove = true; 168 } 169 break; 170 case ACPI_CPU_CMD_OFFSET_WR: 171 trace_cpuhp_acpi_write_cmd(cpu_st->selector, data); 172 if (data < CPHP_CMD_MAX) { 173 cpu_st->command = data; 174 if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) { 175 uint32_t iter = cpu_st->selector; 176 177 do { 178 cdev = &cpu_st->devs[iter]; 179 if (cdev->is_inserting || cdev->is_removing || 180 cdev->fw_remove) { 181 cpu_st->selector = iter; 182 trace_cpuhp_acpi_cpu_has_events(cpu_st->selector, 183 cdev->is_inserting, cdev->is_removing); 184 break; 185 } 186 iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0; 187 } while (iter != cpu_st->selector); 188 } 189 } 190 break; 191 case ACPI_CPU_CMD_DATA_OFFSET_RW: 192 switch (cpu_st->command) { 193 case CPHP_OST_EVENT_CMD: { 194 cdev = &cpu_st->devs[cpu_st->selector]; 195 cdev->ost_event = data; 196 trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event); 197 break; 198 } 199 case CPHP_OST_STATUS_CMD: { 200 cdev = &cpu_st->devs[cpu_st->selector]; 201 cdev->ost_status = data; 202 info = acpi_cpu_device_status(cpu_st->selector, cdev); 203 qapi_event_send_acpi_device_ost(info); 204 qapi_free_ACPIOSTInfo(info); 205 trace_cpuhp_acpi_write_ost_status(cpu_st->selector, 206 cdev->ost_status); 207 break; 208 } 209 default: 210 break; 211 } 212 break; 213 default: 214 break; 215 } 216 } 217 218 static const MemoryRegionOps cpu_hotplug_ops = { 219 .read = cpu_hotplug_rd, 220 .write = cpu_hotplug_wr, 221 .endianness = DEVICE_LITTLE_ENDIAN, 222 .valid = { 223 .min_access_size = 1, 224 .max_access_size = 4, 225 }, 226 }; 227 228 void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, 229 CPUHotplugState *state, hwaddr base_addr) 230 { 231 MachineState *machine = MACHINE(qdev_get_machine()); 232 MachineClass *mc = MACHINE_GET_CLASS(machine); 233 const CPUArchIdList *id_list; 234 int i; 235 236 assert(mc->possible_cpu_arch_ids); 237 id_list = mc->possible_cpu_arch_ids(machine); 238 state->dev_count = id_list->len; 239 state->devs = g_new0(typeof(*state->devs), state->dev_count); 240 for (i = 0; i < id_list->len; i++) { 241 state->devs[i].cpu = CPU(id_list->cpus[i].cpu); 242 state->devs[i].arch_id = id_list->cpus[i].arch_id; 243 } 244 memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state, 245 "acpi-cpu-hotplug", ACPI_CPU_HOTPLUG_REG_LEN); 246 memory_region_add_subregion(as, base_addr, &state->ctrl_reg); 247 } 248 249 static bool should_remain_acpi_present(DeviceState *dev) 250 { 251 CPUClass *k = CPU_GET_CLASS(dev); 252 /* 253 * A system may contain CPUs that are always present on one die, NUMA node, 254 * or socket, yet may be non-present on another simultaneously. Check from 255 * architecture specific code. 256 */ 257 return k->cpu_persistent_status && k->cpu_persistent_status(CPU(dev)); 258 } 259 260 static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev) 261 { 262 CPUClass *k = CPU_GET_CLASS(dev); 263 uint64_t cpu_arch_id = k->get_arch_id(CPU(dev)); 264 int i; 265 266 for (i = 0; i < cpu_st->dev_count; i++) { 267 if (cpu_arch_id == cpu_st->devs[i].arch_id) { 268 return &cpu_st->devs[i]; 269 } 270 } 271 return NULL; 272 } 273 274 void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev, 275 CPUHotplugState *cpu_st, DeviceState *dev, Error **errp) 276 { 277 AcpiCpuStatus *cdev; 278 279 cdev = get_cpu_status(cpu_st, dev); 280 if (!cdev) { 281 return; 282 } 283 284 cdev->cpu = CPU(dev); 285 if (dev->hotplugged) { 286 cdev->is_inserting = true; 287 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 288 } 289 } 290 291 void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 292 CPUHotplugState *cpu_st, 293 DeviceState *dev, Error **errp) 294 { 295 AcpiCpuStatus *cdev; 296 297 cdev = get_cpu_status(cpu_st, dev); 298 if (!cdev) { 299 return; 300 } 301 302 cdev->is_removing = true; 303 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 304 } 305 306 void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st, 307 DeviceState *dev, Error **errp) 308 { 309 AcpiCpuStatus *cdev; 310 311 cdev = get_cpu_status(cpu_st, dev); 312 if (!cdev) { 313 return; 314 } 315 316 if (!should_remain_acpi_present(dev)) { 317 cdev->cpu = NULL; 318 } 319 } 320 321 static const VMStateDescription vmstate_cpuhp_sts = { 322 .name = "CPU hotplug device state", 323 .version_id = 1, 324 .minimum_version_id = 1, 325 .fields = (const VMStateField[]) { 326 VMSTATE_BOOL(is_inserting, AcpiCpuStatus), 327 VMSTATE_BOOL(is_removing, AcpiCpuStatus), 328 VMSTATE_UINT32(ost_event, AcpiCpuStatus), 329 VMSTATE_UINT32(ost_status, AcpiCpuStatus), 330 VMSTATE_END_OF_LIST() 331 } 332 }; 333 334 const VMStateDescription vmstate_cpu_hotplug = { 335 .name = "CPU hotplug state", 336 .version_id = 1, 337 .minimum_version_id = 1, 338 .fields = (const VMStateField[]) { 339 VMSTATE_UINT32(selector, CPUHotplugState), 340 VMSTATE_UINT8(command, CPUHotplugState), 341 VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count, 342 vmstate_cpuhp_sts, AcpiCpuStatus), 343 VMSTATE_END_OF_LIST() 344 } 345 }; 346 347 #define CPU_NAME_FMT "C%.03X" 348 #define CPUHP_RES_DEVICE "PRES" 349 #define CPU_LOCK "CPLK" 350 #define CPU_STS_METHOD "CSTA" 351 #define CPU_SCAN_METHOD "CSCN" 352 #define CPU_NOTIFY_METHOD "CTFY" 353 #define CPU_EJECT_METHOD "CEJ0" 354 #define CPU_OST_METHOD "COST" 355 #define CPU_ADDED_LIST "CNEW" 356 357 #define CPU_ENABLED "CPEN" 358 #define CPU_SELECTOR "CSEL" 359 #define CPU_COMMAND "CCMD" 360 #define CPU_DATA "CDAT" 361 #define CPU_INSERT_EVENT "CINS" 362 #define CPU_REMOVE_EVENT "CRMV" 363 #define CPU_EJECT_EVENT "CEJ0" 364 #define CPU_FW_EJECT_EVENT "CEJF" 365 #define CPU_PRESENT "CPRS" 366 367 void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, 368 build_madt_cpu_fn build_madt_cpu, hwaddr base_addr, 369 const char *res_root, 370 const char *event_handler_method, 371 AmlRegionSpace rs) 372 { 373 Aml *ifctx; 374 Aml *field; 375 Aml *method; 376 Aml *cpu_ctrl_dev; 377 Aml *cpus_dev; 378 Aml *zero = aml_int(0); 379 Aml *one = aml_int(1); 380 Aml *sb_scope = aml_scope("_SB"); 381 MachineClass *mc = MACHINE_GET_CLASS(machine); 382 const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine); 383 char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root); 384 385 cpu_ctrl_dev = aml_device("%s", cphp_res_path); 386 { 387 Aml *crs; 388 389 aml_append(cpu_ctrl_dev, 390 aml_name_decl("_HID", aml_eisaid("PNP0A06"))); 391 aml_append(cpu_ctrl_dev, 392 aml_name_decl("_UID", aml_string("CPU Hotplug resources"))); 393 aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0)); 394 395 assert((rs == AML_SYSTEM_IO) || (rs == AML_SYSTEM_MEMORY)); 396 397 crs = aml_resource_template(); 398 if (rs == AML_SYSTEM_IO) { 399 aml_append(crs, aml_io(AML_DECODE16, base_addr, base_addr, 1, 400 ACPI_CPU_HOTPLUG_REG_LEN)); 401 } else if (rs == AML_SYSTEM_MEMORY) { 402 aml_append(crs, aml_memory32_fixed(base_addr, 403 ACPI_CPU_HOTPLUG_REG_LEN, AML_READ_WRITE)); 404 } 405 406 aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs)); 407 408 /* declare CPU hotplug MMIO region with related access fields */ 409 aml_append(cpu_ctrl_dev, 410 aml_operation_region("PRST", rs, aml_int(base_addr), 411 ACPI_CPU_HOTPLUG_REG_LEN)); 412 413 field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, 414 AML_WRITE_AS_ZEROS); 415 aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8)); 416 /* 1 if enabled, read only */ 417 aml_append(field, aml_named_field(CPU_ENABLED, 1)); 418 /* (read) 1 if has a insert event. (write) 1 to clear event */ 419 aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1)); 420 /* (read) 1 if has a remove event. (write) 1 to clear event */ 421 aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1)); 422 /* initiates device eject, write only */ 423 aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1)); 424 /* tell firmware to do device eject, write only */ 425 aml_append(field, aml_named_field(CPU_FW_EJECT_EVENT, 1)); 426 /* 1 if present, read only */ 427 aml_append(field, aml_named_field(CPU_PRESENT, 1)); 428 aml_append(field, aml_reserved_field(2)); 429 aml_append(field, aml_named_field(CPU_COMMAND, 8)); 430 aml_append(cpu_ctrl_dev, field); 431 432 field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); 433 /* CPU selector, write only */ 434 aml_append(field, aml_named_field(CPU_SELECTOR, 32)); 435 /* flags + cmd + 2byte align */ 436 aml_append(field, aml_reserved_field(4 * 8)); 437 aml_append(field, aml_named_field(CPU_DATA, 32)); 438 aml_append(cpu_ctrl_dev, field); 439 440 if (opts.has_legacy_cphp) { 441 method = aml_method("_INI", 0, AML_SERIALIZED); 442 /* switch off legacy CPU hotplug HW and use new one, 443 * on reboot system is in new mode and writing 0 444 * in CPU_SELECTOR selects BSP, which is NOP at 445 * the time _INI is called */ 446 aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR))); 447 aml_append(cpu_ctrl_dev, method); 448 } 449 } 450 aml_append(sb_scope, cpu_ctrl_dev); 451 452 cpus_dev = aml_device("\\_SB.CPUS"); 453 { 454 int i; 455 Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK); 456 Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR); 457 Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED); 458 Aml *is_present = aml_name("%s.%s", cphp_res_path, CPU_PRESENT); 459 Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND); 460 Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA); 461 Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT); 462 Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT); 463 Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT); 464 Aml *fw_ej_evt = aml_name("%s.%s", cphp_res_path, CPU_FW_EJECT_EVENT); 465 466 aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010"))); 467 aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05"))); 468 469 method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); 470 for (i = 0; i < arch_ids->len; i++) { 471 Aml *cpu = aml_name(CPU_NAME_FMT, i); 472 Aml *uid = aml_arg(0); 473 Aml *event = aml_arg(1); 474 475 ifctx = aml_if(aml_equal(uid, aml_int(i))); 476 { 477 aml_append(ifctx, aml_notify(cpu, event)); 478 } 479 aml_append(method, ifctx); 480 } 481 aml_append(cpus_dev, method); 482 483 method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED); 484 { 485 Aml *idx = aml_arg(0); 486 Aml *sta = aml_local(0); 487 Aml *ifctx2; 488 Aml *else_ctx; 489 490 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 491 aml_append(method, aml_store(idx, cpu_selector)); 492 aml_append(method, aml_store(zero, sta)); 493 ifctx = aml_if(aml_equal(is_present, one)); 494 { 495 ifctx2 = aml_if(aml_equal(is_enabled, one)); 496 { 497 /* cpu is present and enabled */ 498 aml_append(ifctx2, aml_store(aml_int(0xF), sta)); 499 } 500 aml_append(ifctx, ifctx2); 501 else_ctx = aml_else(); 502 { 503 /* cpu is present but disabled */ 504 aml_append(else_ctx, aml_store(aml_int(0xD), sta)); 505 } 506 aml_append(ifctx, else_ctx); 507 } 508 aml_append(method, ifctx); 509 aml_append(method, aml_release(ctrl_lock)); 510 aml_append(method, aml_return(sta)); 511 } 512 aml_append(cpus_dev, method); 513 514 method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED); 515 { 516 Aml *idx = aml_arg(0); 517 518 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 519 aml_append(method, aml_store(idx, cpu_selector)); 520 if (opts.fw_unplugs_cpu) { 521 aml_append(method, aml_store(one, fw_ej_evt)); 522 aml_append(method, aml_store(aml_int(OVMF_CPUHP_SMI_CMD), 523 aml_name("%s", opts.smi_path))); 524 } else { 525 aml_append(method, aml_store(one, ej_evt)); 526 } 527 aml_append(method, aml_release(ctrl_lock)); 528 } 529 aml_append(cpus_dev, method); 530 531 method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED); 532 { 533 const uint8_t max_cpus_per_pass = 255; 534 Aml *else_ctx; 535 Aml *while_ctx, *while_ctx2; 536 Aml *has_event = aml_local(0); 537 Aml *dev_chk = aml_int(1); 538 Aml *eject_req = aml_int(3); 539 Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD); 540 Aml *num_added_cpus = aml_local(1); 541 Aml *cpu_idx = aml_local(2); 542 Aml *uid = aml_local(3); 543 Aml *has_job = aml_local(4); 544 Aml *new_cpus = aml_name(CPU_ADDED_LIST); 545 546 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 547 548 /* 549 * Windows versions newer than XP (including Windows 10/Windows 550 * Server 2019), do support* VarPackageOp but, it is cripled to hold 551 * the same elements number as old PackageOp. 552 * For compatibility with Windows XP (so it won't crash) use ACPI1.0 553 * PackageOp which can hold max 255 elements. 554 * 555 * use named package as old Windows don't support it in local var 556 */ 557 aml_append(method, aml_name_decl(CPU_ADDED_LIST, 558 aml_package(max_cpus_per_pass))); 559 560 aml_append(method, aml_store(zero, uid)); 561 aml_append(method, aml_store(one, has_job)); 562 /* 563 * CPU_ADDED_LIST can hold limited number of elements, outer loop 564 * allows to process CPUs in batches which let us to handle more 565 * CPUs than CPU_ADDED_LIST can hold. 566 */ 567 while_ctx2 = aml_while(aml_equal(has_job, one)); 568 { 569 aml_append(while_ctx2, aml_store(zero, has_job)); 570 571 aml_append(while_ctx2, aml_store(one, has_event)); 572 aml_append(while_ctx2, aml_store(zero, num_added_cpus)); 573 574 /* 575 * Scan CPUs, till there are CPUs with events or 576 * CPU_ADDED_LIST capacity is exhausted 577 */ 578 while_ctx = aml_while(aml_land(aml_equal(has_event, one), 579 aml_lless(uid, aml_int(arch_ids->len)))); 580 { 581 /* 582 * clear loop exit condition, ins_evt/rm_evt checks will 583 * set it to 1 while next_cpu_cmd returns a CPU with events 584 */ 585 aml_append(while_ctx, aml_store(zero, has_event)); 586 587 aml_append(while_ctx, aml_store(uid, cpu_selector)); 588 aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd)); 589 590 /* 591 * wrap around case, scan is complete, exit loop. 592 * It happens since events are not cleared in scan loop, 593 * so next_cpu_cmd continues to find already processed CPUs 594 */ 595 ifctx = aml_if(aml_lless(cpu_data, uid)); 596 { 597 aml_append(ifctx, aml_break()); 598 } 599 aml_append(while_ctx, ifctx); 600 601 /* 602 * if CPU_ADDED_LIST is full, exit inner loop and process 603 * collected CPUs 604 */ 605 ifctx = aml_if( 606 aml_equal(num_added_cpus, aml_int(max_cpus_per_pass))); 607 { 608 aml_append(ifctx, aml_store(one, has_job)); 609 aml_append(ifctx, aml_break()); 610 } 611 aml_append(while_ctx, ifctx); 612 613 aml_append(while_ctx, aml_store(cpu_data, uid)); 614 ifctx = aml_if(aml_equal(ins_evt, one)); 615 { 616 /* cache added CPUs to Notify/Wakeup later */ 617 aml_append(ifctx, aml_store(uid, 618 aml_index(new_cpus, num_added_cpus))); 619 aml_append(ifctx, aml_increment(num_added_cpus)); 620 aml_append(ifctx, aml_store(one, has_event)); 621 } 622 aml_append(while_ctx, ifctx); 623 else_ctx = aml_else(); 624 ifctx = aml_if(aml_equal(rm_evt, one)); 625 { 626 aml_append(ifctx, 627 aml_call2(CPU_NOTIFY_METHOD, uid, eject_req)); 628 aml_append(ifctx, aml_store(one, rm_evt)); 629 aml_append(ifctx, aml_store(one, has_event)); 630 } 631 aml_append(else_ctx, ifctx); 632 aml_append(while_ctx, else_ctx); 633 aml_append(while_ctx, aml_increment(uid)); 634 } 635 aml_append(while_ctx2, while_ctx); 636 637 /* 638 * in case FW negotiated ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT, 639 * make upcall to FW, so it can pull in new CPUs before 640 * OS is notified and wakes them up 641 */ 642 if (opts.smi_path) { 643 ifctx = aml_if(aml_lgreater(num_added_cpus, zero)); 644 { 645 aml_append(ifctx, aml_store(aml_int(OVMF_CPUHP_SMI_CMD), 646 aml_name("%s", opts.smi_path))); 647 } 648 aml_append(while_ctx2, ifctx); 649 } 650 651 /* Notify OSPM about new CPUs and clear insert events */ 652 aml_append(while_ctx2, aml_store(zero, cpu_idx)); 653 while_ctx = aml_while(aml_lless(cpu_idx, num_added_cpus)); 654 { 655 aml_append(while_ctx, 656 aml_store(aml_derefof(aml_index(new_cpus, cpu_idx)), 657 uid)); 658 aml_append(while_ctx, 659 aml_call2(CPU_NOTIFY_METHOD, uid, dev_chk)); 660 aml_append(while_ctx, aml_store(uid, aml_debug())); 661 aml_append(while_ctx, aml_store(uid, cpu_selector)); 662 aml_append(while_ctx, aml_store(one, ins_evt)); 663 aml_append(while_ctx, aml_increment(cpu_idx)); 664 } 665 aml_append(while_ctx2, while_ctx); 666 /* 667 * If another batch is needed, then it will resume scanning 668 * exactly at -- and not after -- the last CPU that's currently 669 * in CPU_ADDED_LIST. In other words, the last CPU in 670 * CPU_ADDED_LIST is going to be re-checked. That's OK: we've 671 * just cleared the insert event for *all* CPUs in 672 * CPU_ADDED_LIST, including the last one. So the scan will 673 * simply seek past it. 674 */ 675 } 676 aml_append(method, while_ctx2); 677 aml_append(method, aml_release(ctrl_lock)); 678 } 679 aml_append(cpus_dev, method); 680 681 method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED); 682 { 683 Aml *uid = aml_arg(0); 684 Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD); 685 Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD); 686 687 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 688 aml_append(method, aml_store(uid, cpu_selector)); 689 aml_append(method, aml_store(ev_cmd, cpu_cmd)); 690 aml_append(method, aml_store(aml_arg(1), cpu_data)); 691 aml_append(method, aml_store(st_cmd, cpu_cmd)); 692 aml_append(method, aml_store(aml_arg(2), cpu_data)); 693 aml_append(method, aml_release(ctrl_lock)); 694 } 695 aml_append(cpus_dev, method); 696 697 /* build Processor object for each processor */ 698 for (i = 0; i < arch_ids->len; i++) { 699 Aml *dev; 700 Aml *uid = aml_int(i); 701 GArray *madt_buf = g_array_new(0, 1, 1); 702 int arch_id = arch_ids->cpus[i].arch_id; 703 704 if (opts.acpi_1_compatible && arch_id < 255) { 705 dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i); 706 } else { 707 dev = aml_device(CPU_NAME_FMT, i); 708 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007"))); 709 aml_append(dev, aml_name_decl("_UID", uid)); 710 } 711 712 method = aml_method("_STA", 0, AML_SERIALIZED); 713 aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid))); 714 aml_append(dev, method); 715 716 /* build _MAT object */ 717 build_madt_cpu(i, arch_ids, madt_buf, true); /* set enabled flag */ 718 aml_append(dev, aml_name_decl("_MAT", 719 aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data))); 720 g_array_free(madt_buf, true); 721 722 if (CPU(arch_ids->cpus[i].cpu) != first_cpu) { 723 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); 724 aml_append(method, aml_call1(CPU_EJECT_METHOD, uid)); 725 aml_append(dev, method); 726 } 727 728 method = aml_method("_OST", 3, AML_SERIALIZED); 729 aml_append(method, 730 aml_call4(CPU_OST_METHOD, uid, aml_arg(0), 731 aml_arg(1), aml_arg(2)) 732 ); 733 aml_append(dev, method); 734 735 /* Linux guests discard SRAT info for non-present CPUs 736 * as a result _PXM is required for all CPUs which might 737 * be hot-plugged. For simplicity, add it for all CPUs. 738 */ 739 if (arch_ids->cpus[i].props.has_node_id) { 740 aml_append(dev, aml_name_decl("_PXM", 741 aml_int(arch_ids->cpus[i].props.node_id))); 742 } 743 744 aml_append(cpus_dev, dev); 745 } 746 } 747 aml_append(sb_scope, cpus_dev); 748 aml_append(table, sb_scope); 749 750 method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED); 751 aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD)); 752 aml_append(table, method); 753 754 g_free(cphp_res_path); 755 } 756