xref: /openbmc/qemu/gdb-xml/loongarch-fpu.xml (revision 17ffe331)
1<?xml version="1.0"?>
2<!-- Copyright (C) 2021 Free Software Foundation, Inc.
3
4     Copying and distribution of this file, with or without modification,
5     are permitted in any medium without royalty provided the copyright
6     notice and this notice are preserved.  -->
7
8<!DOCTYPE feature SYSTEM "gdb-target.dtd">
9<feature name="org.gnu.gdb.loongarch.fpu">
10
11  <union id="fputype">
12    <field name="f" type="ieee_single"/>
13    <field name="d" type="ieee_double"/>
14  </union>
15
16  <reg name="f0" bitsize="64" type="fputype" group="float"/>
17  <reg name="f1" bitsize="64" type="fputype" group="float"/>
18  <reg name="f2" bitsize="64" type="fputype" group="float"/>
19  <reg name="f3" bitsize="64" type="fputype" group="float"/>
20  <reg name="f4" bitsize="64" type="fputype" group="float"/>
21  <reg name="f5" bitsize="64" type="fputype" group="float"/>
22  <reg name="f6" bitsize="64" type="fputype" group="float"/>
23  <reg name="f7" bitsize="64" type="fputype" group="float"/>
24  <reg name="f8" bitsize="64" type="fputype" group="float"/>
25  <reg name="f9" bitsize="64" type="fputype" group="float"/>
26  <reg name="f10" bitsize="64" type="fputype" group="float"/>
27  <reg name="f11" bitsize="64" type="fputype" group="float"/>
28  <reg name="f12" bitsize="64" type="fputype" group="float"/>
29  <reg name="f13" bitsize="64" type="fputype" group="float"/>
30  <reg name="f14" bitsize="64" type="fputype" group="float"/>
31  <reg name="f15" bitsize="64" type="fputype" group="float"/>
32  <reg name="f16" bitsize="64" type="fputype" group="float"/>
33  <reg name="f17" bitsize="64" type="fputype" group="float"/>
34  <reg name="f18" bitsize="64" type="fputype" group="float"/>
35  <reg name="f19" bitsize="64" type="fputype" group="float"/>
36  <reg name="f20" bitsize="64" type="fputype" group="float"/>
37  <reg name="f21" bitsize="64" type="fputype" group="float"/>
38  <reg name="f22" bitsize="64" type="fputype" group="float"/>
39  <reg name="f23" bitsize="64" type="fputype" group="float"/>
40  <reg name="f24" bitsize="64" type="fputype" group="float"/>
41  <reg name="f25" bitsize="64" type="fputype" group="float"/>
42  <reg name="f26" bitsize="64" type="fputype" group="float"/>
43  <reg name="f27" bitsize="64" type="fputype" group="float"/>
44  <reg name="f28" bitsize="64" type="fputype" group="float"/>
45  <reg name="f29" bitsize="64" type="fputype" group="float"/>
46  <reg name="f30" bitsize="64" type="fputype" group="float"/>
47  <reg name="f31" bitsize="64" type="fputype" group="float"/>
48  <reg name="fcc0" bitsize="8" type="uint8" group="float"/>
49  <reg name="fcc1" bitsize="8" type="uint8" group="float"/>
50  <reg name="fcc2" bitsize="8" type="uint8" group="float"/>
51  <reg name="fcc3" bitsize="8" type="uint8" group="float"/>
52  <reg name="fcc4" bitsize="8" type="uint8" group="float"/>
53  <reg name="fcc5" bitsize="8" type="uint8" group="float"/>
54  <reg name="fcc6" bitsize="8" type="uint8" group="float"/>
55  <reg name="fcc7" bitsize="8" type="uint8" group="float"/>
56  <reg name="fcsr" bitsize="32" type="uint32" group="float"/>
57</feature>
58