1*5a28fa5bSYodel Eldar<?xml version="1.0"?> 2*5a28fa5bSYodel Eldar<!-- Copyright (C) 2025 Free Software Foundation, Inc. 3*5a28fa5bSYodel Eldar 4*5a28fa5bSYodel Eldar Copying and distribution of this file, with or without modification, 5*5a28fa5bSYodel Eldar are permitted in any medium without royalty provided the copyright 6*5a28fa5bSYodel Eldar notice and this notice are preserved. --> 7*5a28fa5bSYodel Eldar 8*5a28fa5bSYodel Eldar<!DOCTYPE feature SYSTEM "gdb-target.dtd"> 9*5a28fa5bSYodel Eldar<feature name="org.gnu.gdb.alpha.core"> 10*5a28fa5bSYodel Eldar <!-- IEEE rounding mode values --> 11*5a28fa5bSYodel Eldar <enum id="dyn_rm_enum" size="8"> 12*5a28fa5bSYodel Eldar <!-- Chopped rounding mode --> 13*5a28fa5bSYodel Eldar <evalue name="chop" value="0"/> 14*5a28fa5bSYodel Eldar <!-- Minus infinity --> 15*5a28fa5bSYodel Eldar <evalue name="-inf" value="1"/> 16*5a28fa5bSYodel Eldar <!-- Normal rounding --> 17*5a28fa5bSYodel Eldar <evalue name="norm" value="2"/> 18*5a28fa5bSYodel Eldar <!-- Plus infinity --> 19*5a28fa5bSYodel Eldar <evalue name="+inf" value="3"/> 20*5a28fa5bSYodel Eldar </enum> 21*5a28fa5bSYodel Eldar 22*5a28fa5bSYodel Eldar <!-- Floating-Point Control Register Flags --> 23*5a28fa5bSYodel Eldar <flags id="fpcr_flags" size="8"> 24*5a28fa5bSYodel Eldar <!-- Denormal Operand Exception Disable --> 25*5a28fa5bSYodel Eldar <field name="DNOD" start="47" end="47"/> 26*5a28fa5bSYodel Eldar <!-- Denormal Operands to Zero --> 27*5a28fa5bSYodel Eldar <field name="DNZ" start="48" end="48"/> 28*5a28fa5bSYodel Eldar <!-- Invalid Operation Disable --> 29*5a28fa5bSYodel Eldar <field name="INVD" start="49" end="49"/> 30*5a28fa5bSYodel Eldar <!-- Division by Zero Disable --> 31*5a28fa5bSYodel Eldar <field name="DZED" start="50" end="50"/> 32*5a28fa5bSYodel Eldar <!-- Overflow Disable --> 33*5a28fa5bSYodel Eldar <field name="OVFD" start="51" end="51"/> 34*5a28fa5bSYodel Eldar <!-- Invalid Operation --> 35*5a28fa5bSYodel Eldar <field name="INV" start="52" end="52"/> 36*5a28fa5bSYodel Eldar <!-- Division by Zero --> 37*5a28fa5bSYodel Eldar <field name="DZE" start="53" end="53"/> 38*5a28fa5bSYodel Eldar <!-- Overflow --> 39*5a28fa5bSYodel Eldar <field name="OVF" start="54" end="54"/> 40*5a28fa5bSYodel Eldar <!-- Underflow --> 41*5a28fa5bSYodel Eldar <field name="UNF" start="55" end="55"/> 42*5a28fa5bSYodel Eldar <!-- Inexact Result --> 43*5a28fa5bSYodel Eldar <field name="INE" start="56" end="56"/> 44*5a28fa5bSYodel Eldar <!-- Integer Overflow --> 45*5a28fa5bSYodel Eldar <field name="IOV" start="57" end="57"/> 46*5a28fa5bSYodel Eldar <!-- Dynamic Rounding Mode --> 47*5a28fa5bSYodel Eldar <field name="DYN_RM" start="58" end="59" type="dyn_rm_enum"/> 48*5a28fa5bSYodel Eldar <!-- Underflow to Zero --> 49*5a28fa5bSYodel Eldar <field name="UNDZ" start="60" end="60"/> 50*5a28fa5bSYodel Eldar <!-- Underflow Disable --> 51*5a28fa5bSYodel Eldar <field name="UNFD" start="61" end="61"/> 52*5a28fa5bSYodel Eldar <!-- Inexact Disable --> 53*5a28fa5bSYodel Eldar <field name="INED" start="62" end="62"/> 54*5a28fa5bSYodel Eldar <!-- Summary Bit --> 55*5a28fa5bSYodel Eldar <field name="SUM" start="63" end="63"/> 56*5a28fa5bSYodel Eldar </flags> 57*5a28fa5bSYodel Eldar 58*5a28fa5bSYodel Eldar <!-- Integer Registers --> 59*5a28fa5bSYodel Eldar <reg name="v0" bitsize="64" type="int64"/> 60*5a28fa5bSYodel Eldar <reg name="t0" bitsize="64" type="int64"/> 61*5a28fa5bSYodel Eldar <reg name="t1" bitsize="64" type="int64"/> 62*5a28fa5bSYodel Eldar <reg name="t2" bitsize="64" type="int64"/> 63*5a28fa5bSYodel Eldar <reg name="t3" bitsize="64" type="int64"/> 64*5a28fa5bSYodel Eldar <reg name="t4" bitsize="64" type="int64"/> 65*5a28fa5bSYodel Eldar <reg name="t5" bitsize="64" type="int64"/> 66*5a28fa5bSYodel Eldar <reg name="t6" bitsize="64" type="int64"/> 67*5a28fa5bSYodel Eldar <reg name="t7" bitsize="64" type="int64"/> 68*5a28fa5bSYodel Eldar <reg name="s0" bitsize="64" type="int64"/> 69*5a28fa5bSYodel Eldar <reg name="s1" bitsize="64" type="int64"/> 70*5a28fa5bSYodel Eldar <reg name="s2" bitsize="64" type="int64"/> 71*5a28fa5bSYodel Eldar <reg name="s3" bitsize="64" type="int64"/> 72*5a28fa5bSYodel Eldar <reg name="s4" bitsize="64" type="int64"/> 73*5a28fa5bSYodel Eldar <reg name="s5" bitsize="64" type="int64"/> 74*5a28fa5bSYodel Eldar <reg name="fp" bitsize="64" type="int64"/> 75*5a28fa5bSYodel Eldar <reg name="a0" bitsize="64" type="int64"/> 76*5a28fa5bSYodel Eldar <reg name="a1" bitsize="64" type="int64"/> 77*5a28fa5bSYodel Eldar <reg name="a2" bitsize="64" type="int64"/> 78*5a28fa5bSYodel Eldar <reg name="a3" bitsize="64" type="int64"/> 79*5a28fa5bSYodel Eldar <reg name="a4" bitsize="64" type="int64"/> 80*5a28fa5bSYodel Eldar <reg name="a5" bitsize="64" type="int64"/> 81*5a28fa5bSYodel Eldar <reg name="t8" bitsize="64" type="int64"/> 82*5a28fa5bSYodel Eldar <reg name="t9" bitsize="64" type="int64"/> 83*5a28fa5bSYodel Eldar <reg name="t10" bitsize="64" type="int64"/> 84*5a28fa5bSYodel Eldar <reg name="t11" bitsize="64" type="int64"/> 85*5a28fa5bSYodel Eldar <reg name="ra" bitsize="64" type="int64"/> 86*5a28fa5bSYodel Eldar <reg name="t12" bitsize="64" type="int64"/> 87*5a28fa5bSYodel Eldar <reg name="at" bitsize="64" type="int64"/> 88*5a28fa5bSYodel Eldar <reg name="gp" bitsize="64" type="data_ptr"/> 89*5a28fa5bSYodel Eldar <reg name="sp" bitsize="64" type="data_ptr"/> 90*5a28fa5bSYodel Eldar <reg name="zero" bitsize="64" type="int64" save-restore="no"/> 91*5a28fa5bSYodel Eldar 92*5a28fa5bSYodel Eldar <!-- Floating-Point Registers --> 93*5a28fa5bSYodel Eldar <reg name="f0" bitsize="64" type="float" group="float"/> 94*5a28fa5bSYodel Eldar <reg name="f1" bitsize="64" type="float" group="float"/> 95*5a28fa5bSYodel Eldar <reg name="f2" bitsize="64" type="float" group="float"/> 96*5a28fa5bSYodel Eldar <reg name="f3" bitsize="64" type="float" group="float"/> 97*5a28fa5bSYodel Eldar <reg name="f4" bitsize="64" type="float" group="float"/> 98*5a28fa5bSYodel Eldar <reg name="f5" bitsize="64" type="float" group="float"/> 99*5a28fa5bSYodel Eldar <reg name="f6" bitsize="64" type="float" group="float"/> 100*5a28fa5bSYodel Eldar <reg name="f7" bitsize="64" type="float" group="float"/> 101*5a28fa5bSYodel Eldar <reg name="f8" bitsize="64" type="float" group="float"/> 102*5a28fa5bSYodel Eldar <reg name="f9" bitsize="64" type="float" group="float"/> 103*5a28fa5bSYodel Eldar <reg name="f10" bitsize="64" type="float" group="float"/> 104*5a28fa5bSYodel Eldar <reg name="f11" bitsize="64" type="float" group="float"/> 105*5a28fa5bSYodel Eldar <reg name="f12" bitsize="64" type="float" group="float"/> 106*5a28fa5bSYodel Eldar <reg name="f13" bitsize="64" type="float" group="float"/> 107*5a28fa5bSYodel Eldar <reg name="f14" bitsize="64" type="float" group="float"/> 108*5a28fa5bSYodel Eldar <reg name="f15" bitsize="64" type="float" group="float"/> 109*5a28fa5bSYodel Eldar <reg name="f16" bitsize="64" type="float" group="float"/> 110*5a28fa5bSYodel Eldar <reg name="f17" bitsize="64" type="float" group="float"/> 111*5a28fa5bSYodel Eldar <reg name="f18" bitsize="64" type="float" group="float"/> 112*5a28fa5bSYodel Eldar <reg name="f19" bitsize="64" type="float" group="float"/> 113*5a28fa5bSYodel Eldar <reg name="f20" bitsize="64" type="float" group="float"/> 114*5a28fa5bSYodel Eldar <reg name="f21" bitsize="64" type="float" group="float"/> 115*5a28fa5bSYodel Eldar <reg name="f22" bitsize="64" type="float" group="float"/> 116*5a28fa5bSYodel Eldar <reg name="f23" bitsize="64" type="float" group="float"/> 117*5a28fa5bSYodel Eldar <reg name="f24" bitsize="64" type="float" group="float"/> 118*5a28fa5bSYodel Eldar <reg name="f25" bitsize="64" type="float" group="float"/> 119*5a28fa5bSYodel Eldar <reg name="f26" bitsize="64" type="float" group="float"/> 120*5a28fa5bSYodel Eldar <reg name="f27" bitsize="64" type="float" group="float"/> 121*5a28fa5bSYodel Eldar <reg name="f28" bitsize="64" type="float" group="float"/> 122*5a28fa5bSYodel Eldar <reg name="f29" bitsize="64" type="float" group="float"/> 123*5a28fa5bSYodel Eldar <reg name="f30" bitsize="64" type="float" group="float"/> 124*5a28fa5bSYodel Eldar 125*5a28fa5bSYodel Eldar <!-- Floating-Point Control Register --> 126*5a28fa5bSYodel Eldar <reg name="fpcr" bitsize="64" type="fpcr_flags" group="float"/> 127*5a28fa5bSYodel Eldar 128*5a28fa5bSYodel Eldar <!-- Program Counter --> 129*5a28fa5bSYodel Eldar <reg name="pc" bitsize="64" type="code_ptr"/> 130*5a28fa5bSYodel Eldar 131*5a28fa5bSYodel Eldar <!-- Reserved Index for Former Virtual Register --> 132*5a28fa5bSYodel Eldar <reg name="" bitsize="64" type="int64" save-restore="no"/> 133*5a28fa5bSYodel Eldar 134*5a28fa5bSYodel Eldar <!-- PALcode Memory Slot --> 135*5a28fa5bSYodel Eldar <reg name="unique" bitsize="64" type="int64" group="system"/> 136*5a28fa5bSYodel Eldar</feature> 137