xref: /openbmc/qemu/docs/system/target-xtensa.rst (revision 705f48cc221fea128abdcc334606931e971229e4)
1.. _Xtensa-System-emulator:
2
3Xtensa System emulator
4----------------------
5
6Two executables cover simulation of both Xtensa endian options,
7``qemu-system-xtensa`` and ``qemu-system-xtensaeb``. Two different
8machine types are emulated:
9
10-  Xtensa emulator pseudo board \"sim\"
11
12-  Avnet LX60/LX110/LX200 board
13
14The sim pseudo board emulation provides an environment similar to one
15provided by the proprietary Tensilica ISS. It supports:
16
17-  A range of Xtensa CPUs, default is the DC232B
18
19-  Console and filesystem access via semihosting calls
20
21The Avnet LX60/LX110/LX200 emulation supports:
22
23-  A range of Xtensa CPUs, default is the DC232B
24
25-  16550 UART
26
27-  OpenCores 10/100 Mbps Ethernet MAC
28
29The following options are specific to the Xtensa emulation:
30
31``-semihosting``
32   Enable semihosting syscall emulation.
33
34   Xtensa semihosting provides basic file IO calls, such as
35   open/read/write/seek/select. Tensilica baremetal libc for ISS and
36   linux platform \"sim\" use this interface.
37
38   Note that this allows guest direct access to the host filesystem, so
39   should only be used with trusted guest OS.
40