xref: /openbmc/qemu/docs/system/openrisc/cpu-features.rst (revision e018489d8b4c1d85a3851fbe48b0befd2ccfc647)
1CPU Features
2============
3
4The QEMU emulation of the OpenRISC architecture provides following built in
5features.
6
7- Shadow GPRs
8- MMU TLB with 128 entries, 1 way
9- Power Management (PM)
10- Programmable Interrupt Controller (PIC)
11- Tick Timer
12
13These features are on by default and the presence can be confirmed by checking
14the contents of the Unit Presence Register (``UPR``) and CPU Configuration
15Register (``CPUCFGR``).
16