xref: /openbmc/qemu/docs/system/arm/virt.rst (revision 64c9a921)
1'virt' generic virtual platform (``virt``)
2==========================================
3
4The `virt` board is a platform which does not correspond to any
5real hardware; it is designed for use in virtual machines.
6It is the recommended board type if you simply want to run
7a guest such as Linux and do not care about reproducing the
8idiosyncrasies and limitations of a particular bit of real-world
9hardware.
10
11This is a "versioned" board model, so as well as the ``virt`` machine
12type itself (which may have improvements, bugfixes and other minor
13changes between QEMU versions) a version is provided that guarantees
14to have the same behaviour as that of previous QEMU releases, so
15that VM migration will work between QEMU versions. For instance the
16``virt-5.0`` machine type will behave like the ``virt`` machine from
17the QEMU 5.0 release, and migration should work between ``virt-5.0``
18of the 5.0 release and ``virt-5.0`` of the 5.1 release. Migration
19is not guaranteed to work between different QEMU releases for
20the non-versioned ``virt`` machine type.
21
22Supported devices
23"""""""""""""""""
24
25The virt board supports:
26
27- PCI/PCIe devices
28- Flash memory
29- One PL011 UART
30- An RTC
31- The fw_cfg device that allows a guest to obtain data from QEMU
32- A PL061 GPIO controller
33- An optional SMMUv3 IOMMU
34- hotpluggable DIMMs
35- hotpluggable NVDIMMs
36- An MSI controller (GICv2M or ITS). GICv2M is selected by default along
37  with GICv2. ITS is selected by default with GICv3 (>= virt-2.7). Note
38  that ITS is not modeled in TCG mode.
39- 32 virtio-mmio transport devices
40- running guests using the KVM accelerator on aarch64 hardware
41- large amounts of RAM (at least 255GB, and more if using highmem)
42- many CPUs (up to 512 if using a GICv3 and highmem)
43- Secure-World-only devices if the CPU has TrustZone:
44
45  - A second PL011 UART
46  - A second PL061 GPIO controller, with GPIO lines for triggering
47    a system reset or system poweroff
48  - A secure flash memory
49  - 16MB of secure RAM
50
51Supported guest CPU types:
52
53- ``cortex-a7`` (32-bit)
54- ``cortex-a15`` (32-bit; the default)
55- ``cortex-a53`` (64-bit)
56- ``cortex-a57`` (64-bit)
57- ``cortex-a72`` (64-bit)
58- ``host`` (with KVM only)
59- ``max`` (same as ``host`` for KVM; best possible emulation with TCG)
60
61Note that the default is ``cortex-a15``, so for an AArch64 guest you must
62specify a CPU type.
63
64Graphics output is available, but unlike the x86 PC machine types
65there is no default display device enabled: you should select one from
66the Display devices section of "-device help". The recommended option
67is ``virtio-gpu-pci``; this is the only one which will work correctly
68with KVM. You may also need to ensure your guest kernel is configured
69with support for this; see below.
70
71Machine-specific options
72""""""""""""""""""""""""
73
74The following machine-specific options are supported:
75
76secure
77  Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the
78  Arm Security Extensions (TrustZone). The default is ``off``.
79
80virtualization
81  Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the
82  Arm Virtualization Extensions. The default is ``off``.
83
84mte
85  Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the
86  Arm Memory Tagging Extensions. The default is ``off``.
87
88highmem
89  Set ``on``/``off`` to enable/disable placing devices and RAM in physical
90  address space above 32 bits. The default is ``on`` for machine types
91  later than ``virt-2.12``.
92
93gic-version
94  Specify the version of the Generic Interrupt Controller (GIC) to provide.
95  Valid values are:
96
97  ``2``
98    GICv2
99  ``3``
100    GICv3
101  ``host``
102    Use the same GIC version the host provides, when using KVM
103  ``max``
104    Use the best GIC version possible (same as host when using KVM;
105    currently same as ``3``` for TCG, but this may change in future)
106
107its
108  Set ``on``/``off`` to enable/disable ITS instantiation. The default is ``on``
109  for machine types later than ``virt-2.7``.
110
111iommu
112  Set the IOMMU type to create for the guest. Valid values are:
113
114  ``none``
115    Don't create an IOMMU (the default)
116  ``smmuv3``
117    Create an SMMUv3
118
119ras
120  Set ``on``/``off`` to enable/disable reporting host memory errors to a guest
121  using ACPI and guest external abort exceptions. The default is off.
122
123Linux guest kernel configuration
124""""""""""""""""""""""""""""""""
125
126The 'defconfig' for Linux arm and arm64 kernels should include the
127right device drivers for virtio and the PCI controller; however some older
128kernel versions, especially for 32-bit Arm, did not have everything
129enabled by default. If you're not seeing PCI devices that you expect,
130then check that your guest config has::
131
132  CONFIG_PCI=y
133  CONFIG_VIRTIO_PCI=y
134  CONFIG_PCI_HOST_GENERIC=y
135
136If you want to use the ``virtio-gpu-pci`` graphics device you will also
137need::
138
139  CONFIG_DRM=y
140  CONFIG_DRM_VIRTIO_GPU=y
141
142Hardware configuration information for bare-metal programming
143"""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""
144
145The ``virt`` board automatically generates a device tree blob ("dtb")
146which it passes to the guest. This provides information about the
147addresses, interrupt lines and other configuration of the various devices
148in the system. Guest code can rely on and hard-code the following
149addresses:
150
151- Flash memory starts at address 0x0000_0000
152
153- RAM starts at 0x4000_0000
154
155All other information about device locations may change between
156QEMU versions, so guest code must look in the DTB.
157
158QEMU supports two types of guest image boot for ``virt``, and
159the way for the guest code to locate the dtb binary differs:
160
161- For guests using the Linux kernel boot protocol (this means any
162  non-ELF file passed to the QEMU ``-kernel`` option) the address
163  of the DTB is passed in a register (``r2`` for 32-bit guests,
164  or ``x0`` for 64-bit guests)
165
166- For guests booting as "bare-metal" (any other kind of boot),
167  the DTB is at the start of RAM (0x4000_0000)
168