xref: /openbmc/qemu/docs/system/arm/nuvoton.rst (revision cba42d61)
1Nuvoton iBMC boards (``npcm750-evb``, ``quanta-gsj``)
2=====================================================
3
4The `Nuvoton iBMC`_ chips (NPCM7xx) are a family of ARM-based SoCs that are
5designed to be used as Baseboard Management Controllers (BMCs) in various
6servers. They all feature one or two ARM Cortex A9 CPU cores, as well as an
7assortment of peripherals targeted for either Enterprise or Data Center /
8Hyperscale applications. The former is a superset of the latter, so NPCM750 has
9all the peripherals of NPCM730 and more.
10
11.. _Nuvoton iBMC: https://www.nuvoton.com/products/cloud-computing/ibmc/
12
13The NPCM750 SoC has two Cortex A9 cores and is targeted for the Enterprise
14segment. The following machines are based on this chip :
15
16- ``npcm750-evb``       Nuvoton NPCM750 Evaluation board
17
18The NPCM730 SoC has two Cortex A9 cores and is targeted for Data Center and
19Hyperscale applications. The following machines are based on this chip :
20
21- ``quanta-gsj``        Quanta GSJ server BMC
22
23There are also two more SoCs, NPCM710 and NPCM705, which are single-core
24variants of NPCM750 and NPCM730, respectively. These are currently not
25supported by QEMU.
26
27Supported devices
28-----------------
29
30 * SMP (Dual Core Cortex-A9)
31 * Cortex-A9MPCore built-in peripherals: SCU, GIC, Global Timer, Private Timer
32   and Watchdog.
33 * SRAM, ROM and DRAM mappings
34 * System Global Control Registers (GCR)
35 * Clock and reset controller (CLK)
36 * Timer controller (TIM)
37 * Serial ports (16550-based)
38 * DDR4 memory controller (dummy interface indicating memory training is done)
39 * OTP controllers (no protection features)
40 * Flash Interface Unit (FIU; no protection features)
41 * Random Number Generator (RNG)
42 * USB host (USBH)
43 * GPIO controller
44 * Analog to Digital Converter (ADC)
45 * Pulse Width Modulation (PWM)
46 * SMBus controller (SMBF)
47 * Ethernet controller (EMC)
48
49Missing devices
50---------------
51
52 * LPC/eSPI host-to-BMC interface, including
53
54   * Keyboard and mouse controller interface (KBCI)
55   * Keyboard Controller Style (KCS) channels
56   * BIOS POST code FIFO
57   * System Wake-up Control (SWC)
58   * Shared memory (SHM)
59   * eSPI slave interface
60
61 * Ethernet controller (GMAC)
62 * USB device (USBD)
63 * Peripheral SPI controller (PSPI)
64 * SD/MMC host
65 * PECI interface
66 * Tachometer
67 * PCI and PCIe root complex and bridges
68 * VDM and MCTP support
69 * Serial I/O expansion
70 * LPC/eSPI host
71 * Coprocessor
72 * Graphics
73 * Video capture
74 * Encoding compression engine
75 * Security features
76
77Boot options
78------------
79
80The Nuvoton machines can boot from an OpenBMC firmware image, or directly into
81a kernel using the ``-kernel`` option. OpenBMC images for `quanta-gsj` and
82possibly others can be downloaded from the OpenPOWER jenkins :
83
84   https://openpower.xyz/
85
86The firmware image should be attached as an MTD drive. Example :
87
88.. code-block:: bash
89
90  $ qemu-system-arm -machine quanta-gsj -nographic \
91      -drive file=image-bmc,if=mtd,bus=0,unit=0,format=raw
92
93The default root password for test images is usually ``0penBmc``.
94