xref: /openbmc/qemu/docs/system/arm/nuvoton.rst (revision 1580b897)
1Nuvoton iBMC boards (``*-bmc``, ``npcm750-evb``, ``quanta-gsj``)
2================================================================
3
4The `Nuvoton iBMC`_ chips (NPCM7xx) are a family of ARM-based SoCs that are
5designed to be used as Baseboard Management Controllers (BMCs) in various
6servers. They all feature one or two ARM Cortex-A9 CPU cores, as well as an
7assortment of peripherals targeted for either Enterprise or Data Center /
8Hyperscale applications. The former is a superset of the latter, so NPCM750 has
9all the peripherals of NPCM730 and more.
10
11.. _Nuvoton iBMC: https://www.nuvoton.com/products/cloud-computing/ibmc/
12
13The NPCM750 SoC has two Cortex-A9 cores and is targeted for the Enterprise
14segment. The following machines are based on this chip :
15
16- ``npcm750-evb``       Nuvoton NPCM750 Evaluation board
17
18The NPCM730 SoC has two Cortex-A9 cores and is targeted for Data Center and
19Hyperscale applications. The following machines are based on this chip :
20
21- ``quanta-gbs-bmc``    Quanta GBS server BMC
22- ``quanta-gsj``        Quanta GSJ server BMC
23
24There are also two more SoCs, NPCM710 and NPCM705, which are single-core
25variants of NPCM750 and NPCM730, respectively. These are currently not
26supported by QEMU.
27
28Supported devices
29-----------------
30
31 * SMP (Dual Core Cortex-A9)
32 * Cortex-A9MPCore built-in peripherals: SCU, GIC, Global Timer, Private Timer
33   and Watchdog.
34 * SRAM, ROM and DRAM mappings
35 * System Global Control Registers (GCR)
36 * Clock and reset controller (CLK)
37 * Timer controller (TIM)
38 * Serial ports (16550-based)
39 * DDR4 memory controller (dummy interface indicating memory training is done)
40 * OTP controllers (no protection features)
41 * Flash Interface Unit (FIU; no protection features)
42 * Random Number Generator (RNG)
43 * USB host (USBH)
44 * GPIO controller
45 * Analog to Digital Converter (ADC)
46 * Pulse Width Modulation (PWM)
47 * SMBus controller (SMBF)
48 * Ethernet controller (EMC)
49 * Tachometer
50
51Missing devices
52---------------
53
54 * LPC/eSPI host-to-BMC interface, including
55
56   * Keyboard and mouse controller interface (KBCI)
57   * Keyboard Controller Style (KCS) channels
58   * BIOS POST code FIFO
59   * System Wake-up Control (SWC)
60   * Shared memory (SHM)
61   * eSPI slave interface
62
63 * Ethernet controller (GMAC)
64 * USB device (USBD)
65 * Peripheral SPI controller (PSPI)
66 * SD/MMC host
67 * PECI interface
68 * PCI and PCIe root complex and bridges
69 * VDM and MCTP support
70 * Serial I/O expansion
71 * LPC/eSPI host
72 * Coprocessor
73 * Graphics
74 * Video capture
75 * Encoding compression engine
76 * Security features
77
78Boot options
79------------
80
81The Nuvoton machines can boot from an OpenBMC firmware image, or directly into
82a kernel using the ``-kernel`` option. OpenBMC images for `quanta-gsj` and
83possibly others can be downloaded from the OpenPOWER jenkins :
84
85   https://openpower.xyz/
86
87The firmware image should be attached as an MTD drive. Example :
88
89.. code-block:: bash
90
91  $ qemu-system-arm -machine quanta-gsj -nographic \
92      -drive file=image-bmc,if=mtd,bus=0,unit=0,format=raw
93
94The default root password for test images is usually ``0penBmc``.
95