xref: /openbmc/qemu/docs/system/arm/musca.rst (revision f6476697)
1Arm Musca boards (``musca-a``, ``musca-b1``)
2============================================
3
4The Arm Musca development boards are a reference implementation
5of a system using the SSE-200 Subsystem for Embedded. They are
6dual Cortex-M33 systems.
7
8QEMU provides models of the A and B1 variants of this board.
9
10Unimplemented devices:
11
12- SPI
13- |I2C|
14- |I2S|
15- PWM
16- QSPI
17- Timer
18- SCC
19- GPIO
20- eFlash
21- MHU
22- PVT
23- SDIO
24- CryptoCell
25
26Note that (like the real hardware) the Musca-A machine is
27asymmetric: CPU 0 does not have the FPU or DSP extensions,
28but CPU 1 does. Also like the real hardware, the memory maps
29for the A and B1 variants differ significantly, so guest
30software must be built for the right variant.
31
32