1Arm MPS2 boards (``mps2-an385``, ``mps2-an386``, ``mps2-an500``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``) 2================================================================================================================ 3 4These board models all use Arm M-profile CPUs. 5 6The Arm MPS2 and MPS2+ dev boards are FPGA based (the 2+ has a bigger 7FPGA but is otherwise the same as the 2). Since the CPU itself 8and most of the devices are in the FPGA, the details of the board 9as seen by the guest depend significantly on the FPGA image. 10 11QEMU models the following FPGA images: 12 13``mps2-an385`` 14 Cortex-M3 as documented in Arm Application Note AN385 15``mps2-an386`` 16 Cortex-M4 as documented in Arm Application Note AN386 17``mps2-an500`` 18 Cortex-M7 as documented in Arm Application Note AN500 19``mps2-an505`` 20 Cortex-M33 as documented in Arm Application Note AN505 21``mps2-an511`` 22 Cortex-M3 'DesignStart' as documented in Arm Application Note AN511 23``mps2-an521`` 24 Dual Cortex-M33 as documented in Arm Application Note AN521 25 26Differences between QEMU and real hardware: 27 28- AN385/AN386 remapping of low 16K of memory to either ZBT SSRAM1 or to 29 block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as 30 if zbt_boot_ctrl is always zero) 31- QEMU provides a LAN9118 ethernet rather than LAN9220; the only guest 32 visible difference is that the LAN9118 doesn't support checksum 33 offloading 34